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// ========== Copyright Header Begin ==========================================
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//
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// OpenSPARC T1 Processor File: sparc_ifu_wseldp.v
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// Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
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//
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// The above named program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU General Public
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// License version 2 as published by the Free Software Foundation.
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//
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// The above named program is distributed in the hope that it will be
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// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// General Public License for more details.
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//
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// You should have received a copy of the GNU General Public
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// License along with this work; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// ========== Copyright Header End ============================================
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//////////////////////////////////////////////////////////////////////
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/*
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// Module Name: sparc_ifu_wsel
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// Description:
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// Way selects removed from icache and done here
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*/
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module sparc_ifu_wseldp (/*AUTOARG*/
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// Outputs
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wsel_fdp_fetdata_s1, wsel_fdp_topdata_s1, wsel_mbist_icache_data,
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so,
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// Inputs
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rclk, se, si, icd_wsel_fetdata_s1, icd_wsel_topdata_s1,
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itlb_wsel_waysel_s1, ifq_erb_asiway_f
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);
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input rclk,
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se,
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si;
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input [135:0] icd_wsel_fetdata_s1,
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icd_wsel_topdata_s1;
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input [3:0] itlb_wsel_waysel_s1;
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input [1:0] ifq_erb_asiway_f;
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output [33:0] wsel_fdp_fetdata_s1;
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output [33:0] wsel_fdp_topdata_s1;
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output [67:0] wsel_mbist_icache_data;
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output so;
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// local signals
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wire [3:0] dec_asiway_s_l,
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waysel_buf_s1;
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wire [1:0] asiway_s;
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wire [33:0] rdc_fetdata_s1,
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rdc_topdata_s1,
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erb_asidata_s,
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asi_topdata_s;
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wire clk;
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//
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// Code begins here
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//
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//------------------
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// Control Portion
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//------------------
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assign clk = rclk;
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// flop and decode waysel
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dff_s #(2) asiway_reg(.din (ifq_erb_asiway_f),
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.q (asiway_s),
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.clk (clk), .se(se), .si(), .so());
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assign dec_asiway_s_l[0] = ~(~asiway_s[1] & ~asiway_s[0]);
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assign dec_asiway_s_l[1] = ~(~asiway_s[1] & asiway_s[0]);
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assign dec_asiway_s_l[2] = ~( asiway_s[1] & ~asiway_s[0]);
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assign dec_asiway_s_l[3] = ~( asiway_s[1] & asiway_s[0]);
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//--------------------------
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// Datapath Section
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//--------------------------
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// buffer wayselect from itlb
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// align these buffers with the corresponding pins in itlb
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assign waysel_buf_s1 = itlb_wsel_waysel_s1;
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// Very Timing Critical Wayselect Muxes
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// !!Cannot be a one-hot mux!!
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// use ao2222
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// bw_u1_ao2222_2x #(34) fetway_mx(.z (rdc_fetdata_s1[33:0]),
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// .a2 (icd_wsel_fetdata_s1[33:0]),
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// .b2 (icd_wsel_fetdata_s1[67:34]),
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// .c2 (icd_wsel_fetdata_s1[101:68]),
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// .d2 (icd_wsel_fetdata_s1[135:102]),
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// .a1 (waysel_buf_s1[0]),
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// .b1 (waysel_buf_s1[1]),
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// .c1 (waysel_buf_s1[2]),
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// .d1 (waysel_buf_s1[3]));
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// bw_u1_ao2222_2x #(34) topway_mx(.z (rdc_topdata_s1[33:0]),
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// .a2 (icd_wsel_topdata_s1[33:0]),
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// .b2 (icd_wsel_topdata_s1[67:34]),
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// .c2 (icd_wsel_topdata_s1[101:68]),
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// .d2 (icd_wsel_topdata_s1[135:102]),
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// .a1 (waysel_buf_s1[0]),
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// .b1 (waysel_buf_s1[1]),
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// .c1 (waysel_buf_s1[2]),
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// .d1 (waysel_buf_s1[3]));
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assign rdc_fetdata_s1 = icd_wsel_fetdata_s1[33:0] & {34{waysel_buf_s1[0]}} |
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icd_wsel_fetdata_s1[67:34] & {34{waysel_buf_s1[1]}} |
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icd_wsel_fetdata_s1[101:68] & {34{waysel_buf_s1[2]}} |
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icd_wsel_fetdata_s1[135:102] & {34{waysel_buf_s1[3]}};
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assign rdc_topdata_s1 = icd_wsel_topdata_s1[33:0] & {34{waysel_buf_s1[0]}} |
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icd_wsel_topdata_s1[67:34] & {34{waysel_buf_s1[1]}} |
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icd_wsel_topdata_s1[101:68] & {34{waysel_buf_s1[2]}} |
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icd_wsel_topdata_s1[135:102] & {34{waysel_buf_s1[3]}};
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// buffer and send to fdp
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assign wsel_fdp_fetdata_s1 = rdc_fetdata_s1;
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assign wsel_fdp_topdata_s1 = rdc_topdata_s1;
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// mux for asi data, not critical
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dp_mux4ds #(34) asid_mx(.dout (erb_asidata_s[33:0]),
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.in0 (icd_wsel_fetdata_s1[33:0]),
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.in1 (icd_wsel_fetdata_s1[67:34]),
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.in2 (icd_wsel_fetdata_s1[101:68]),
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.in3 (icd_wsel_fetdata_s1[135:102]),
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.sel0_l (dec_asiway_s_l[0]),
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.sel1_l (dec_asiway_s_l[1]),
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.sel2_l (dec_asiway_s_l[2]),
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.sel3_l (dec_asiway_s_l[3]));
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dp_mux4ds #(34) asitop_mx(.dout (asi_topdata_s[33:0]),
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.in0 (icd_wsel_topdata_s1[33:0]),
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.in1 (icd_wsel_topdata_s1[67:34]),
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.in2 (icd_wsel_topdata_s1[101:68]),
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.in3 (icd_wsel_topdata_s1[135:102]),
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.sel0_l (dec_asiway_s_l[0]),
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.sel1_l (dec_asiway_s_l[1]),
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.sel2_l (dec_asiway_s_l[2]),
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.sel3_l (dec_asiway_s_l[3]));
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// buffer before sending to bist/errdp
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assign wsel_mbist_icache_data = {asi_topdata_s[33:32],
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erb_asidata_s[33:32],
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asi_topdata_s[31:0],
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erb_asidata_s[31:0]};
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// Everything below can be ignored for physical implementation
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// monitor for waysel -- moved here from itlb
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// Keeping this around for 0-in. cmp level check is in icache_mutex_mon.v
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`ifdef DEFINE_0IN
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always @ (negedge clk)
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begin
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if (!((waysel_buf_s1 == 4'b0001) ||
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(waysel_buf_s1 == 4'b0010) ||
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(waysel_buf_s1 == 4'b0100) ||
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(waysel_buf_s1 == 4'b1000) ||
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(waysel_buf_s1 == 4'b0000)))
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begin
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// 0in <fire -message "FATAL ERROR: icache waysel not mutex"
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//$error("IC_WAYSEL", "FATAL ERROR: icache waysel not mutex %b",
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// waysel_buf_s1);
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end
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end // always @ (negedge clk)
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`endif
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endmodule // sparc_ifu_wseldp
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