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1 2 dmitryr 
// ========== Copyright Header Begin ==========================================
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//
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// OpenSPARC T1 Processor File: tlu.v
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// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
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//
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// The above named program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU General Public
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// License version 2 as published by the Free Software Foundation.
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//
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// The above named program is distributed in the hope that it will be
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// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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// General Public License for more details.
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//
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// You should have received a copy of the GNU General Public
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// License along with this work; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// ========== Copyright Header End ============================================
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////////////////////////////////////////////////////////////////////////
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/*
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//  Module Name:
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//      Description:    Trap Logic and Memory Management Unit (TLU) :
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//                      - Contains :
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//                              - Trap Stack Array (TSA)
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//                              - Trap Control Logic (TCL)
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//                              - Mmu internal Register Array (MRA)
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//                              - Mmu Control Logic (MCL)
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//
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*/
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////////////////////////////////////////////////////////////////////////
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// Global header file includes
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////////////////////////////////////////////////////////////////////////
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`include        "sys.h" // system level definition file which contains the
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                        // time scale definition
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`include        "tlu.h"
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////////////////////////////////////////////////////////////////////////
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// Local header file includes / local defines
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////////////////////////////////////////////////////////////////////////
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module tlu (/*AUTOARG*/
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            short_si0,short_si1,short_so0,short_so1,si0,si1,so0,so1,
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   tlu_sftint_vld, tlu_hintp_vld, tlu_rerr_vld, tlu_lsu_tl_zero,
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   tlu_lsu_stxa_ack, tlu_lsu_redmode_rst_d1, // tlu_lsu_async_ack_w2,
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   tlu_lsu_pstate_priv, tlu_lsu_pstate_cle, tlu_lsu_pstate_am, tlu_lsu_tid_m,
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   tlu_lsu_pcxpkt, tlu_lsu_ldxa_tid_w2, tlu_lsu_stxa_ack_tid, tlu_lsu_redmode,
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   tlu_lsu_asi_update_m, tlu_lsu_asi_m,
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   tlu_itlb_wr_vld_g, tlu_itlb_tte_tag_w2, tlu_itlb_tte_data_w2,
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   tlu_itlb_tag_rd_g, tlu_itlb_rw_index_vld_g, tlu_itlb_rw_index_g,
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   tlu_itlb_dmp_actxt_g, tlu_itlb_invalidate_all_g, tlu_itlb_dmp_vld_g,
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   tlu_itlb_dmp_all_g, tlu_itlb_dmp_nctxt_g, tlu_ifu_trapnpc_w2,
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   tlu_sscan_test_data, // tlu_sscan_pc,
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   tlu_itlb_data_rd_g, tlu_ifu_trappc_vld_w1, tlu_ifu_trappc_w2,
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   tlu_ifu_trapnpc_vld_w1, tlu_ifu_trap_tid_w1, tlu_ifu_rstthr_i2,
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   tlu_ifu_rstint_i2, tlu_ifu_resumint_i2, tlu_ifu_pstate_pef,
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   tlu_ifu_pstate_ie, tlu_ifu_nukeint_i2, // tlu_ifu_int_activate_i3,
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   tlu_ifu_hwint_i3, tlu_idtlb_dmp_thrid_g, tlu_idtlb_dmp_key_g,
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   tlu_exu_cwpccr_update_m, tlu_exu_cwp_retry_m,
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   tlu_exu_cwp_m, tlu_exu_ccr_m, tlu_exu_agp_swap, tlu_exu_agp,
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   tlu_dtlb_tte_tag_w2, tlu_dtlb_tte_data_w2,
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   tlu_dtlb_tag_rd_g, tlu_dtlb_rw_index_vld_g, tlu_dtlb_rw_index_g,
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   tlu_dtlb_invalidate_all_g, tlu_dtlb_dmp_vld_g, tlu_exu_rsr_data_m,
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   tlu_dtlb_dmp_sctxt_g, tlu_dtlb_dmp_pctxt_g, tlu_dtlb_dmp_nctxt_g,
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   tlu_dtlb_dmp_all_g, tlu_dtlb_dmp_actxt_g, tlu_dtlb_data_rd_g,
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   tlu_lsu_int_ldxa_vld_w2, tlu_lsu_ldxa_async_data_vld, // tlu_ifu_flush_pipe_w,
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   ifu_lsu_error_inj, tlu_exu_agp_tid, tlu_hpstate_priv, tlu_hpstate_ibe,
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   tlu_hpstate_enb, tlu_early_flush_pipe_w, tlu_exu_early_flush_pipe_w,
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   tlu_early_flush_pipe2_w, tlu_lsu_int_ldxa_data_w2, tlu_lsu_int_ld_ill_va_w2,
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   tlu_exu_priv_trap_m, tlu_exu_pic_onebelow_m, tlu_exu_pic_twobelow_m,
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   lsu_exu_ldxa_m, lsu_exu_ldxa_data_g, tlu_dsfsr_flt_vld, tlu_lsu_priv_trap_m,
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   // tlu_lsu_priv_trap_w,
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   // Inputs
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   se, arst_l, grst_l, sehold, mem_write_disable, // rst_tri_en,
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   mux_drive_disable, lsu_tlu_wtchpt_trp_g, ifu_tlu_flush_fd3_w,
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   lsu_tlu_ttype_vld_m2, ifu_tlu_flush_fd_w, ifu_tlu_flush_fd2_w,
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   lsu_tlu_ttype_m2, lsu_tlu_tlb_st_inst_m, // lsu_tlu_tte_ebit_g,
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   lsu_tlu_tlb_ldst_va_m, lsu_tlu_tlb_ld_inst_m, lsu_tlu_tlb_dmp_va_m,
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   lsu_tlu_tlb_asi_state_m, lsu_tlu_tlb_access_tid_m, ifu_tlu_flush_m,
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   lsu_tlu_st_rs3_data_g, lsu_tlu_early_flush_w, lsu_tlu_early_flush2_w,
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   lsu_tlu_priv_action_g, lsu_tlu_pcxpkt_ack, // lsu_tlu_priv_violtn_g,
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   lsu_tlu_pctxt_m, lsu_tlu_async_ttype_vld_g, // lsu_tlu_nonalt_ldst_m,
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   lsu_tlu_misalign_addr_ldst_atm_m, ctu_sscan_tid, lsu_tlu_intpkt,
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   lsu_tlu_async_ttype_g, lsu_tlu_rs3_data_g, lsu_tlu_defr_trp_taken_g,
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   lsu_tlu_dtlb_done, lsu_tlu_dside_ctxt_m, // lsu_tlu_flt_ld_nfo_pg_g,
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   lsu_tlu_dmmu_miss_g, lsu_tlu_daccess_prot_g, // lsu_tlu_derr_tid_g,
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   lsu_tlu_daccess_excptn_g, lsu_tlu_cpx_vld, ifu_tlu_pc_oor_e,
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   lsu_tlu_cpx_req, ifu_tlu_inst_vld_m_bf1, ifu_mmu_trap_m, ifu_tlu_trap_m,
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   lsu_asi_state, lsu_asi_reg3, lsu_asi_reg2, lsu_tlu_async_tid_g,
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   lsu_asi_reg1, lsu_asi_reg0, ifu_tlu_ttype_vld_m, ifu_tlu_ttype_m,
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   ifu_tlu_thrid_d, ifu_tlu_swint_m, ifu_tlu_sir_inst_m, ifu_tlu_l2imiss,
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   ifu_tlu_rstint_m, ifu_tlu_retry_inst_d, ifu_tlu_priv_violtn_m, ifu_tlu_pc_m,
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   ifu_tlu_npc_m, ifu_tlu_immu_miss_m, ifu_tlu_itlb_done,  ifu_tlu_inst_vld_m,
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   ifu_tlu_hwint_m, ifu_lsu_imm_asi_d, ifu_lsu_imm_asi_vld_d, ifu_tlu_done_inst_d,
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   ifu_lsu_st_inst_e, ifu_lsu_memref_d, ifu_lsu_ld_inst_e, ffu_tlu_trap_ue,
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   ffu_tlu_trap_other, ffu_tlu_trap_ieee754, ffu_tlu_ill_inst_m, ffu_ifu_tid_w2,
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   exu_tlu_va_oor_jl_ret_m, exu_tlu_ttype_vld_m, exu_tlu_ttype_m, exu_tlu_va_oor_m,
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   exu_tlu_spill_tid, exu_tlu_spill, exu_tlu_spill_other, exu_tlu_spill_wtype,
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   exu_tlu_misalign_addr_jmpl_rtn_m, exu_tlu_cwp_retry, exu_mmu_early_va_e,
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   exu_tlu_cwp_cmplt_tid, // exu_tlu_spill_ttype,  exu_tlu_cwp_fastcmplt_w,
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   exu_tlu_cwp_cmplt, exu_tlu_cwp3, exu_tlu_cwp2, exu_tlu_cwp1,
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   exu_tlu_cwp0, exu_tlu_ccr3_w, exu_tlu_ccr2_w, lsu_tlu_ldst_va_m,
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   exu_tlu_ccr1_w, exu_tlu_ccr0_w, exu_lsu_ldst_va_e, const_cpuid,
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   rclk, ifu_tlu_sraddr_d, ifu_tlu_rsr_inst_d, // ifu_tlu_wsr_inst_d,
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   exu_tlu_wsr_data_m,  lsu_tlu_rsr_data_e, ifu_tlu_sraddr_d_v2,
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   ifu_lsu_alt_space_e, lsu_tlu_squash_va_oor_m, ifu_tlu_imiss_e,
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   lsu_tlu_dcache_miss_w2, lsu_tlu_l2_dmiss, lsu_tlu_stb_full_w2,
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   ffu_tlu_fpu_tid, ffu_tlu_fpu_cmplt, spu_tlu_rsrv_illgl_m,
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   lsu_pid_state0, lsu_pid_state1, lsu_pid_state2, lsu_pid_state3,
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   lsu_tlu_nucleus_ctxt_m,lsu_tlu_tte_pg_sz_g, exu_tlu_ue_trap_m,
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   lsu_ifu_inj_ack, ifu_tlu_alt_space_d, // lsu_tlu_ill_inst_m,
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   ifu_lsu_thrid_s,lsu_dsfsr_din_g,lsu_dmmu_sfsr_trp_wr,lsu_mmu_flush_pipe_w,
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   exu_lsu_priority_trap_m, lsu_tlu_wsr_inst_e, lsu_mmu_defr_trp_taken_g);
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/*AUTOINPUT*/
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// Beginning of automatic inputs (from unused autoinst inputs)
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//
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// input                        clk;                    // To tlu_int of sparc_tlu_int.v, ...
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input                   rclk;                   // To tlu_int of sparc_tlu_int.v, ...
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input [3:0]              const_cpuid;            // To tlu_int of sparc_tlu_int.v, ...
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input [`ASI_VA_WIDTH-1:0] exu_lsu_ldst_va_e;     // To mmu_dp of tlu_mmu_dp.v
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input [`TLU_ASI_VA_WIDTH-1:0] lsu_tlu_ldst_va_m; // To mmu_dp of tlu_mmu_dp.v
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input [7:0]     exu_mmu_early_va_e;     // From exu of sparc_exu.v
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input [7:0]              exu_tlu_ccr0_w;         // To tdp of tlu_tdp.v
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input [7:0]              exu_tlu_ccr1_w;         // To tdp of tlu_tdp.v
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input [7:0]              exu_tlu_ccr2_w;         // To tdp of tlu_tdp.v
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input [7:0]              exu_tlu_ccr3_w;         // To tdp of tlu_tdp.v
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// modified due to timing
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// input [2:0]          exu_tlu_cwp0_w;         // To tdp of tlu_tdp.v
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// input [2:0]          exu_tlu_cwp1_w;         // To tdp of tlu_tdp.v
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// input [2:0]          exu_tlu_cwp2_w;         // To tdp of tlu_tdp.v
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// input [2:0]          exu_tlu_cwp3_w;         // To tdp of tlu_tdp.v
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input [2:0]              exu_tlu_cwp0;           // To tdp of tlu_tdp.v
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input [2:0]              exu_tlu_cwp1;           // To tdp of tlu_tdp.v
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input [2:0]              exu_tlu_cwp2;           // To tdp of tlu_tdp.v
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input [2:0]              exu_tlu_cwp3;           // To tdp of tlu_tdp.v
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input                   exu_tlu_cwp_cmplt;      // To tcl of tlu_tcl.v
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input [1:0]              exu_tlu_cwp_cmplt_tid;  // To tcl of tlu_tcl.v
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// input                        exu_tlu_cwp_fastcmplt_w;// To tcl of tlu_tcl.v
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input                   exu_tlu_cwp_retry;      // To tcl of tlu_tcl.v
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input                   exu_tlu_misalign_addr_jmpl_rtn_m;// To tcl of tlu_tcl.v
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input                   exu_tlu_spill;          // To tcl of tlu_tcl.v
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input [1:0]              exu_tlu_spill_tid;      // To tcl of tlu_tcl.v
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// derive the spill_ttype from spill_other and spill_wtype
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// input [8:0]          exu_tlu_spill_ttype;    // To tcl of tlu_tcl.v
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input           exu_tlu_spill_other;    // From exu of sparc_exu.v
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input [2:0]     exu_tlu_spill_wtype;    // From exu of sparc_exu.v
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input [8:0]              exu_tlu_ttype_m;        // To tcl of tlu_tcl.v
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input                   exu_tlu_ttype_vld_m;    // To tcl of tlu_tcl.v
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input                   exu_tlu_ue_trap_m;// To tcl of tlu_tcl.v
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input                   exu_tlu_va_oor_jl_ret_m;// To tcl of tlu_tcl.v
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input                   exu_tlu_va_oor_m;       // To tcl of tlu_tcl.v
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input                   ffu_tlu_ill_inst_m;     // new trap from ffu
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input [1:0]              ffu_ifu_tid_w2;         // To tcl of tlu_tcl.v
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input                   ffu_tlu_trap_ieee754;   // To tcl of tlu_tcl.v
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input                   ffu_tlu_trap_other;     // To tcl of tlu_tcl.v
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input                   ffu_tlu_trap_ue;        // To tcl of tlu_tcl.v
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input                   ifu_lsu_ld_inst_e;      // To mmu_ctl of tlu_mmu_ctl.v
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input                   ifu_lsu_memref_d;       // To tcl of tlu_tcl.v
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input                   ifu_lsu_st_inst_e;      // To mmu_ctl of tlu_mmu_ctl.v
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input                   ifu_tlu_done_inst_d;    // To tcl of tlu_tcl.v
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// input                        ifu_tlu_flsh_inst_e;    // To tcl of tlu_tcl.v
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input                   ifu_tlu_flush_m;        // To tcl of tlu_tcl.v
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input                   ifu_tlu_flush_fd_w;     // To tcl of tlu_tcl.v
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input                   ifu_tlu_flush_fd2_w;    // To tcl of tlu_tcl.v
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input                   ifu_tlu_flush_fd3_w;    // To tcl of tlu_tcl.v
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input                   lsu_tlu_early_flush_w;  // To tcl of tlu_tcl.v
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input                   lsu_tlu_early_flush2_w; // To tcl of tlu_tcl.v
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input                   ifu_tlu_hwint_m;        // To tcl of tlu_tcl.v
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input                   ifu_tlu_immu_miss_m;    // To tcl of tlu_tcl.v, ...
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input                   ifu_tlu_pc_oor_e;       // To tcl of tlu_tcl.v
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input [`TLU_THRD_NUM-1:0] ifu_tlu_l2imiss;       // To tcl of tlu_tcl.v, ...
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input                   ifu_tlu_inst_vld_m;     // To tcl of tlu_tcl.v
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input                   ifu_tlu_inst_vld_m_bf1; // To tcl of tlu_tcl.v
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input                   ifu_tlu_itlb_done;      // To mmu_ctl of tlu_mmu_ctl.v
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// input [1:0]          ifu_tlu_ldst_size_e;    // To mmu_ctl of tlu_mmu_ctl.v
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// modified for bug 3017
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input [48:0]             ifu_tlu_npc_m;          // To tdp of tlu_tdp.v
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input [48:0]             ifu_tlu_pc_m;           // To tdp of tlu_tdp.v
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// input [47:0]         ifu_tlu_npc_m;          // To tdp of tlu_tdp.v
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// input [47:0]         ifu_tlu_pc_m;           // To tdp of tlu_tdp.v
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input                   ifu_tlu_priv_violtn_m;  // To tcl of tlu_tcl.v
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input                   ifu_tlu_retry_inst_d;   // To tcl of tlu_tcl.v
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input                   ifu_tlu_rstint_m;       // To tcl of tlu_tcl.v
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input                   ifu_tlu_sir_inst_m;     // To tcl of tlu_tcl.v
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input                   ifu_tlu_swint_m;        // To tcl of tlu_tcl.v
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input [1:0]              ifu_tlu_thrid_d;        // To tcl of tlu_tcl.v
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input [1:0]              ifu_lsu_thrid_s;        // To tcl of tlu_tcl.v
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input [8:0]              ifu_tlu_ttype_m;        // To tcl of tlu_tcl.v
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input                   ifu_tlu_ttype_vld_m;    // To tcl of tlu_tcl.v
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input                   ifu_mmu_trap_m;     // To tcl of tlu_tcl.v
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input                   ifu_tlu_trap_m;     // To tcl of tlu_tcl.v
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input [7:0]              lsu_asi_reg0;           // To tdp of tlu_tdp.v
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input [7:0]              lsu_asi_reg1;           // To tdp of tlu_tdp.v
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input [7:0]              lsu_asi_reg2;           // To tdp of tlu_tdp.v
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input [7:0]              lsu_asi_reg3;           // To tdp of tlu_tdp.v
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input [`TLU_ASI_STATE_WIDTH-1:0] lsu_asi_state;          // To tcl of tlu_tcl.v, ...
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// added asynchronize trap to handle correctable dmmu parity error
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input           lsu_tlu_async_ttype_vld_g; // lsu asynchronous trap valid
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input           lsu_tlu_defr_trp_taken_g; // lsu asynchronous trap valid
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input           lsu_mmu_defr_trp_taken_g; // lsu asynchronous trap valid
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input [6:0]     lsu_tlu_async_ttype_g;  // lsu asynchronous trap type
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input [1:0]     lsu_tlu_async_tid_g; // asynchronous trap - thread
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input [3:0]              lsu_tlu_cpx_req;        // To tlu_int of sparc_tlu_int.v
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input                   lsu_tlu_cpx_vld;        // To tlu_int of sparc_tlu_int.v
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// input [2:0]          lsu_tlu_ctxt_sel_m;     // To tcl of tlu_tcl.v
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input                   lsu_tlu_daccess_excptn_g;// To tcl of tlu_tcl.v, ...
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input                   lsu_tlu_daccess_prot_g; // To tcl of tlu_tcl.v, ...
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// input [1:0]          lsu_tlu_derr_tid_g;     // To tcl of tlu_tcl.v
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input                   lsu_tlu_dmmu_miss_g;    // To tcl of tlu_tcl.v, ...
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input [12:0]     lsu_tlu_dside_ctxt_m;   // To mmu_dp of tlu_mmu_dp.v
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input                   lsu_tlu_dtlb_done;      // To mmu_ctl of tlu_mmu_ctl.v
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// input                        lsu_tlu_flt_ld_nfo_pg_g;// To tcl of tlu_tcl.v
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// input                        lsu_tlu_illegal_asi_action_g;// To tcl of tlu_tcl.v
217 
input [17:0]     lsu_tlu_intpkt;         // To tlu_int of sparc_tlu_int.v
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// modified for shadow scan
219 
// input [3:0] lsu_tlu_iobrdge_pc_sel;
220 
input [`TLU_THRD_NUM-1:0] ctu_sscan_tid;
221 
input                   lsu_tlu_misalign_addr_ldst_atm_m;// To tcl of tlu_tcl.v
222 
// input                        lsu_tlu_nonalt_ldst_m;  // To tcl of tlu_tcl.v
223 
input [12:0]     lsu_tlu_pctxt_m;        // To mmu_dp of tlu_mmu_dp.v
224 
input                   lsu_tlu_pcxpkt_ack;     // To tlu_int of sparc_tlu_int.v
225 
input                   lsu_tlu_priv_action_g;  // To tcl of tlu_tcl.v
226 
// input                        lsu_tlu_priv_violtn_g;  // To tcl of tlu_tcl.v
227 
// input                        lsu_tlu_spec_access_epage_g;// To tcl of tlu_tcl.v
228 
input [63:0]     lsu_tlu_st_rs3_data_g;  // To tlu_int of sparc_tlu_int.v, ...
229 
input [63:0]     lsu_tlu_rs3_data_g;     // To tlu_int of sparc_tlu_int.v, ...
230 
// added for timing
231 
input [1:0]              lsu_tlu_tlb_access_tid_m;// To mmu_ctl of tlu_mmu_ctl.v
232 
input [7:0]              lsu_tlu_tlb_asi_state_m;// To mmu_ctl of tlu_mmu_ctl.v
233 
input [47:13]   lsu_tlu_tlb_dmp_va_m;   // To mmu_dp of tlu_mmu_dp.v
234 
input                   lsu_tlu_tlb_ld_inst_m;  // To mmu_ctl of tlu_mmu_ctl.v
235 
input [10:0]     lsu_tlu_tlb_ldst_va_m;  // To mmu_ctl of tlu_mmu_ctl.v
236 
input                   lsu_tlu_tlb_st_inst_m;  // To mmu_ctl of tlu_mmu_ctl.v
237 
// input                        lsu_tlu_tte_ebit_g;     // To tcl of tlu_tcl.v
238 
input [8:0]              lsu_tlu_ttype_m2;       // To tcl of tlu_tcl.v
239 
// removed unused bits
240 
// input [1:0]  lsu_tlu_ttype_tid_m2;   // To tcl of tlu_tcl.v
241 
input                   lsu_tlu_ttype_vld_m2;   // To tcl of tlu_tcl.v
242 
// input                        lsu_tlu_uncache_atomic_g;// To tcl of tlu_tcl.v
243 
// input                        lsu_tlu_write_op_m;     // To tcl of tlu_tcl.v
244 
input                   lsu_tlu_wtchpt_trp_g;   // To tcl of tlu_tcl.v
245 
// input                lsu_tlu_xslating_ldst_m;// To tcl of tlu_tcl.v
246 
// input                reset;                  // To mmu_ctl of tlu_mmu_ctl.v
247 
// input                rst_l;                  // To tcl of tlu_tcl.v, ...
248 
input                   grst_l;                 // To tcl of tlu_tcl.v, ...
249 
input                   arst_l;                 // To tcl of tlu_tcl.v, ...
250 
// input                        rst_tri_en;     // To tcl of tlu_tcl.v, ...
251 
input                   mem_write_disable;      // To tcl of tlu_tcl.v, ...
252 
input                   mux_drive_disable;      // To tcl of tlu_tcl.v, ...
253 
// input                        testmode_l;     // To tcl of tlu_tcl.v, ...
254 
input                   sehold;                 // To tlu_int of sparc_tlu_int.v, ...
255 
input                   se;                     // To tlu_int of sparc_tlu_int.v, ...
256 
input                   si0,si1,short_si0,short_si1;                    // To tlu_int of sparc_tlu_int.v, ...
257 
// End of automatics
258 
// Read/Write Privileged State Register Access.
259 
input   [`TLU_ASR_ADDR_WIDTH-1:0] ifu_tlu_sraddr_d;      // addr of sr(st/pr)
260 
input   [`TLU_ASR_ADDR_WIDTH-1:0] ifu_tlu_sraddr_d_v2;   // addr of sr(st/pr)
261 
input           ifu_tlu_rsr_inst_d ;    // valid rd sr(st/pr)
262 
// modified for timing
263 
// input           ifu_tlu_wsr_inst_d ; // valid wr sr(st/pr)
264 
input           lsu_tlu_wsr_inst_e ;    // valid wr sr(st/pr)
265 
input   [63:0]  exu_tlu_wsr_data_m ;    // pr/st data to irf.
266 
 
267 
// input   [1:0]   ifu_tlu_thrid_e ;    // Thread id.
268 
input   [7:0]    lsu_tlu_rsr_data_e ;    // sr/pr rd data from lsu.
269 
 
270 
input                   ifu_lsu_alt_space_e;    // alt-space access
271 
input               ifu_tlu_alt_space_d;        // alt-space access - d stage
272 
input           lsu_tlu_squash_va_oor_m;// squash va_oor for mem-op.
273 
// input           lsu_tlu_ill_inst_m;     // new illegal instru from spu via lsu
274 
//
275 
// new interfaces to the pib
276 
input                   ifu_tlu_imiss_e;            // icache misses -- New interface
277 
input [3:0]              lsu_tlu_dcache_miss_w2; // dcache miss -- new interface
278 
input [3:0]              lsu_tlu_l2_dmiss;           // l2 misses -- new interface
279 
input [3:0]              lsu_tlu_stb_full_w2;    // store buffer full -- new interface
280 
input [1:0]              ffu_tlu_fpu_tid;            // ThrdID for the FF instr_cmplt -- new
281 
input           ffu_tlu_fpu_cmplt;          // FF instru complete -- new
282 
//
283 
// New trap from SPU
284 
// removed for timing fix
285 
input           spu_tlu_rsrv_illgl_m;   // illegal instruction from SPU
286 
input  [2:0]     lsu_pid_state0 ;        // pid thread0 ; global use
287 
input  [2:0]     lsu_pid_state1 ;        // pid thread1 ; global use
288 
input  [2:0]     lsu_pid_state2 ;        // pid thread2 ; global use
289 
input  [2:0]     lsu_pid_state3 ;        // pid thread3 ; global use
290 
// input [48:0] ifu_tlu_pc_w;
291 
 
292 
input           lsu_tlu_nucleus_ctxt_m ;// access is nucleus context
293 
input  [2:0]    lsu_tlu_tte_pg_sz_g ;   // page-size of tte
294 
input   [3:0]    ifu_lsu_error_inj ;     // inject parity error into tlb
295 
input   [8:0]   ifu_lsu_imm_asi_d;      // asi state value from imm
296 
input           ifu_lsu_imm_asi_vld_d;  // valid asi state value from imm
297 
 
298 
input   [23:0]   lsu_dsfsr_din_g ;       // now from lsu instead of tlu_tcl
299 
input   [3:0]    lsu_dmmu_sfsr_trp_wr ;  // now from lsu instead of tlu_tcl
300 
 
301 
input           lsu_mmu_flush_pipe_w ; // full trap
302 
 
303 
input           exu_lsu_priority_trap_m ;//fill,ue
304 
 
305 
// output [5:0] int_tlu_rstid_i2;       // From tlu_int of sparc_tlu_int.v
306 
/*AUTOOUTPUT*/
307 
// Beginning of automatic outputs (from unused autoinst outputs)
308 
output [63:0]    tlu_lsu_int_ldxa_data_w2; // From tlu_int of sparc_tlu_int.v
309 
output                  tlu_lsu_int_ld_ill_va_w2; // From tlu_int of sparc_tlu_int.v
310 
output                  tlu_lsu_int_ldxa_vld_w2; // From tlu_int of sparc_tlu_int.v
311 
output                  so0,so1,short_so0,short_so1;                    // From tlu_int of sparc_tlu_int.v, ...
312 
output                  tlu_dtlb_data_rd_g;     // From mmu_ctl of tlu_mmu_ctl.v
313 
output                  tlu_dtlb_dmp_actxt_g;   // From mmu_ctl of tlu_mmu_ctl.v
314 
output                  tlu_dtlb_dmp_all_g;     // From mmu_ctl of tlu_mmu_ctl.v
315 
//output                tlu_dtlb_dmp_by_ctxt_g; // From mmu_ctl of tlu_mmu_ctl.v
316 
output                  tlu_dtlb_dmp_nctxt_g;   // From mmu_ctl of tlu_mmu_ctl.v
317 
output                  tlu_dtlb_dmp_pctxt_g;   // From mmu_ctl of tlu_mmu_ctl.v
318 
output                  tlu_dtlb_dmp_sctxt_g;   // From mmu_ctl of tlu_mmu_ctl.v
319 
output                  tlu_dtlb_dmp_vld_g;     // From mmu_ctl of tlu_mmu_ctl.v
320 
output                  tlu_dtlb_invalidate_all_g;// From mmu_ctl of tlu_mmu_ctl.v
321 
output [5:0]     tlu_dtlb_rw_index_g;    // From mmu_ctl of tlu_mmu_ctl.v
322 
output                  tlu_dtlb_rw_index_vld_g;// From mmu_ctl of tlu_mmu_ctl.v
323 
output                  tlu_dtlb_tag_rd_g;      // From mmu_ctl of tlu_mmu_ctl.v
324 
output [42:0]    tlu_dtlb_tte_data_w2;   // From mmu_dp of tlu_mmu_dp.v
325 
output [58:0]    tlu_dtlb_tte_tag_w2;    // From mmu_dp of tlu_mmu_dp.v
326 
output[3:0]              lsu_ifu_inj_ack ;       // ack for tlb error injection.
327 
//
328 
// width modified for hypervisor support
329 
// output [2:0] tlu_exu_agp;            // From tcl of tlu_tcl.v
330 
output [`TSA_GLOBAL_WIDTH-1:0] tlu_exu_agp;              // From tcl of tlu_tcl.v
331 
output                  tlu_exu_agp_swap;       // From tcl of tlu_tcl.v
332 
output [1:0]    tlu_exu_agp_tid;        // From tcl of tlu_tcl.v
333 
output [7:0]     tlu_exu_ccr_m;          // From tcl of tlu_tcl.v
334 
output [2:0]     tlu_exu_cwp_m;          // From tcl of tlu_tcl.v
335 
output                  tlu_exu_cwp_retry_m;    // From tcl of tlu_tcl.v
336 
output                  tlu_exu_cwpccr_update_m;// From tcl of tlu_tcl.v
337 
// tlu_exu_rsr_data_e being replaced by tlu_exu_rsr_data_m
338 
// the bus will become obsolete
339 
// output [`TLU_ASR_DATA_WIDTH-1:0] tlu_exu_rsr_data_e;     // From tdp of tlu_tdp.v
340 
output [`TLU_ASR_DATA_WIDTH-1:0] tlu_exu_rsr_data_m;     // From tdp of tlu_tdp.v
341 
output [40:0]    tlu_idtlb_dmp_key_g;    // From mmu_dp of tlu_mmu_dp.v
342 
output [1:0]     tlu_idtlb_dmp_thrid_g;  // From mmu_ctl of tlu_mmu_ctl.v
343 
output [3:0]     tlu_ifu_hwint_i3;       // From tlu_int of sparc_tlu_int.v
344 
// removed - ifu will derive the signal internally
345 
// output [3:0] tlu_ifu_int_activate_i3;// From tlu_int of sparc_tlu_int.v
346 
output                  tlu_ifu_nukeint_i2;     // From tlu_int of sparc_tlu_int.v
347 
output [3:0]     tlu_ifu_pstate_ie;      // From tlu_int of sparc_tlu_int.v
348 
output [3:0]     tlu_ifu_pstate_pef;     // From tdp of tlu_tdp.v
349 
output                  tlu_ifu_resumint_i2;    // From tlu_int of sparc_tlu_int.v
350 
output                  tlu_ifu_rstint_i2;      // From tlu_int of sparc_tlu_int.v
351 
output [3:0]     tlu_ifu_rstthr_i2;      // From tlu_int of sparc_tlu_int.v
352 
output [1:0]     tlu_ifu_trap_tid_w1;    // From tcl of tlu_tcl.v
353 
output                  tlu_ifu_trapnpc_vld_w1; // From tdp of tlu_tdp.v
354 
output [48:0]    tlu_ifu_trapnpc_w2;     // From tdp of tlu_tdp.v
355 
output [48:0]    tlu_ifu_trappc_w2;      // From tdp of tlu_tdp.v
356 
// output [47:0]        tlu_ifu_trapnpc_w2;     // From tdp of tlu_tdp.v
357 
// output [47:0]        tlu_ifu_trappc_w2;      // From tdp of tlu_tdp.v
358 
output                  tlu_ifu_trappc_vld_w1;  // From tcl of tlu_tcl.v
359 
output                  tlu_itlb_data_rd_g;     // From mmu_ctl of tlu_mmu_ctl.v
360 
output                  tlu_itlb_dmp_actxt_g;   // From mmu_ctl of tlu_mmu_ctl.v
361 
output                  tlu_itlb_dmp_all_g;     // From mmu_ctl of tlu_mmu_ctl.v
362 
output                  tlu_itlb_dmp_nctxt_g;   // From mmu_ctl of tlu_mmu_ctl.v
363 
output                  tlu_itlb_dmp_vld_g;     // From mmu_ctl of tlu_mmu_ctl.v
364 
output                  tlu_itlb_invalidate_all_g;// From mmu_ctl of tlu_mmu_ctl.v
365 
output [5:0]     tlu_itlb_rw_index_g;    // From mmu_ctl of tlu_mmu_ctl.v
366 
output                  tlu_itlb_rw_index_vld_g;// From mmu_ctl of tlu_mmu_ctl.v
367 
output                  tlu_itlb_tag_rd_g;      // From mmu_ctl of tlu_mmu_ctl.v
368 
output [42:0]    tlu_itlb_tte_data_w2;   // From mmu_dp of tlu_mmu_dp.v
369 
output [58:0]    tlu_itlb_tte_tag_w2;    // From mmu_dp of tlu_mmu_dp.v
370 
output                  tlu_itlb_wr_vld_g;      // From mmu_ctl of tlu_mmu_ctl.v
371 
output [7:0]     tlu_lsu_asi_m;          // From tcl of tlu_tcl.v
372 
output                  tlu_lsu_asi_update_m;   // From tcl of tlu_tcl.v
373 
// replaced by shadow scan signals
374 
output [62:0]    tlu_sscan_test_data;// From tdp of tlu_tdp.v
375 
// output [47:0]        tlu_sscan_pc;// From tdp of tlu_tdp.v
376 
// output [63:0]        tlu_lsu_ldxa_data_w2;   // From mmu_dp of tlu_mmu_dp.v
377 
output [1:0]     tlu_lsu_ldxa_tid_w2;    // From mmu_ctl of tlu_mmu_ctl.v
378 
output [25:0]    tlu_lsu_pcxpkt;         // From tlu_int of sparc_tlu_int.v
379 
output [3:0]     tlu_lsu_pstate_am;      // From tcl of tlu_tcl.v
380 
output [3:0]     tlu_lsu_pstate_cle;     // From tdp of tlu_tdp.v
381 
output [3:0]     tlu_lsu_pstate_priv;    // From tdp of tlu_tdp.v
382 
output [3:0]     tlu_lsu_redmode;        // From tcl of tlu_tcl.v
383 
// output [3:0] tlu_lsu_redmode_rst;    // From tcl of tlu_tcl.v
384 
output [3:0]     tlu_lsu_redmode_rst_d1; // From tcl of tlu_tcl.v
385 
// output [`TLU_THRD_NUM-1:0] tlu_lsu_async_ack_w2;     // From tcl of tlu_tcl.v
386 
output                  tlu_lsu_stxa_ack;       // From mmu_ctl of tlu_mmu_ctl.v
387 
output [1:0]     tlu_lsu_stxa_ack_tid;   // From mmu_ctl of tlu_mmu_ctl.v
388 
output [1:0]     tlu_lsu_tid_m;          // From tcl of tlu_tcl.v
389 
output [`TLU_THRD_NUM-1:0] tlu_lsu_tl_zero;      // From tcl of tlu_tcl.v
390 
output [`TLU_THRD_NUM-1:0] tlu_sftint_vld; // From tcl of tlu_tcl.v
391 
output [`TLU_THRD_NUM-1:0] tlu_hintp_vld;  // From tcl of tlu_tcl.v
392 
output [`TLU_THRD_NUM-1:0] tlu_rerr_vld;  // From tcl of tlu_tcl.v
393 
// End of automatics
394 
   // Outputs
395 
// End of automatics
396 
// output tlu_ifu_flush_pipe_w; // From tcl of tlu_tcl.v
397 
output tlu_early_flush_pipe_w;  // From tcl of tlu_tcl.v
398 
output tlu_early_flush_pipe2_w; // From tcl of tlu_tcl.v
399 
output tlu_exu_early_flush_pipe_w;      // From tcl of tlu_tcl.v
400 
output tlu_lsu_ldxa_async_data_vld ; // tlu_lsu_ldxa_data_vld is for async op.
401 
output [`TLU_THRD_NUM-1:0] tlu_hpstate_priv;
402 
output [`TLU_THRD_NUM-1:0] tlu_hpstate_enb;
403 
// added for hpstate.ibe ECO
404 
output [`TLU_THRD_NUM-1:0] tlu_hpstate_ibe;
405 
output tlu_exu_priv_trap_m; // local traps send to exu
406 
output tlu_lsu_priv_trap_m; // local traps send to exu
407 
// output tlu_lsu_priv_trap_w; // local traps send to exu
408 
output tlu_exu_pic_onebelow_m; // local traps send to exu
409 
output tlu_exu_pic_twobelow_m; // local traps send to exu
410 
//
411 
// added for MMU performance enhancement
412 
output          lsu_exu_ldxa_m ;
413 
output  [63:0]   lsu_exu_ldxa_data_g ;
414 
// Added to shift dsfsr logic from tlu to lsu.
415 
output  [3:0]    tlu_dsfsr_flt_vld;      // From mmu_dp of tlu_mmu_dp.v
416 
 
417 
 
418 
//
419 
// added to abide to the Niagara reset methodology
420 
wire            tlu_rst;   // local active high reset - from tlu_tcl
421 
wire            rclk;      // temprary clock name
422 
wire [63:0]              tlu_pib_rsr_data_e;     // From tdp of tlu_tdp.v
423 
// wire            tlu_rst_l; // local active high reset - from tlu_tcl
424 
wire            int_rst_l; // local active high reset - from tlu_tcl
425 
// wire            pib_rst_l; // local active high reset - from tlu_tcl
426 
wire [1:0]               tlu_incr_tick;          // From tcl of tlu_tcl.v
427 
wire [1:0]               tlu_tckctr_in;          // From tcl of tlu_tcl.v
428 
// wire [60:0]          tlu_tick_incr_dout;     // To tdp of tlu_tdp.v
429 
wire [61:0]              tlu_incr64_dout;        // To tdp of tlu_tdp.v
430 
wire [61:0]              tlu_tick_incr_din;      // From tdp of tlu_tdp.v
431 
wire                    tlu_tick_ctl_din;               // To tlu_int of sparc_tlu_int.v
432 
// modified for bug 3017
433 
wire [48:0]              tlu_restore_pc_w1;
434 
wire [48:0]              tlu_restore_npc_w1;
435 
wire [48:0]              tlu_pc_new_w;
436 
wire [48:0]              tlu_npc_new_w;
437 
wire [33:0]              tlu_partial_trap_pc_w1;
438 
wire [1:0]               tlu_int_tid_m;          // To tlu_int of sparc_tlu_int.v
439 
wire [3:0]               tlu_sftint_vld;         // From tcl of tlu_tcl.v
440 
wire                    tlu_asi_write_g;        // From hyperv of tlu_hyperv.v
441 
wire                    tlu_tte_real_g ;        // tte is real
442 
wire [`TLU_THRD_NUM-1:0] tlu_hpstate_tlz;
443 
wire [`TLU_ASI_STATE_WIDTH-1:0] tlu_asi_state_e;
444 
// modified due to memory macro swap
445 
//
446 
// wire [`TSA_MEM_WIDTH-1:0]            tsa_dout;
447 
wire [`TSA_MEM_WIDTH-1:0] tsa0_dout;
448 
wire [`TSA_MEM_WIDTH-1:0] tsa1_dout;
449 
 
450 
/*AUTOWIRE*/
451 
// Beginning of automatic wires (for undeclared instantiated-module outputs)
452 
wire [`TLU_ASR_DATA_WIDTH-1:0]           tlu_wsr_data_w; // From tdp of tlu_tdp.v
453 
wire                    dmmu_any_sfsr_wr;       // From mmu_ctl of tlu_mmu_ctl.v
454 
wire [3:0]               dmmu_sfar_wr_en_l;      // From mmu_ctl of tlu_mmu_ctl.v
455 
// wire [3:0]           dmmu_sfsr_trp_wr;       // From tcl of tlu_tcl.v
456 
wire [3:0]               dmmu_sfsr_wr_en_l;      // From mmu_ctl of tlu_mmu_ctl.v
457 
wire                    immu_any_sfsr_wr;       // From mmu_ctl of tlu_mmu_ctl.v
458 
wire [3:0]               immu_sfsr_trp_wr;       // From tcl of tlu_tcl.v
459 
wire [3:0]               immu_sfsr_wr_en_l;      // From mmu_ctl of tlu_mmu_ctl.v
460 
wire [5:0]               int_tlu_rstid_m;        // From tlu_int of sparc_tlu_int.v
461 
wire                    itlb_wr_vld_g;          // From mmu_ctl of tlu_mmu_ctl.v
462 
wire [7:0]               lsu_tlu_rsr_data_mod_e; // From tcl of tlu_tcl.v
463 
wire [19:0]              mra_byte_wen;           // From mmu_ctl of tlu_mmu_ctl.v
464 
wire [3:0]               mra_rd_ptr;             // From mmu_ctl of tlu_mmu_ctl.v
465 
wire                    mra_rd_vld;             // From mmu_ctl of tlu_mmu_ctl.v
466 
wire [159:10]           mra_rdata;              // From mra of tlu_mra.v
467 
wire [155:0]             mra_wdata;              // From mmu_dp of tlu_mmu_dp.v
468 
wire [3:0]               mra_wr_ptr;             // From mmu_ctl of tlu_mmu_ctl.v
469 
wire                    mra_wr_vld;             // From mmu_ctl of tlu_mmu_ctl.v
470 
wire [2:0]               tag_access_wdata_sel;   // From mmu_ctl of tlu_mmu_ctl.v
471 
wire                    tlb_access_rst_l;       // From mmu_ctl of tlu_mmu_ctl.v
472 
wire                    tlu_addr_msk_g;         // From tcl of tlu_tcl.v
473 
wire                    tlu_admp_key_sel;       // From mmu_ctl of tlu_mmu_ctl.v
474 
wire                    tlu_clr_sftint_l_g;     // From tcl of tlu_tcl.v
475 
wire [4:0]               tlu_dmp_key_vld_g;      // From mmu_ctl of tlu_mmu_ctl.v
476 
wire [2:0]      tlu_true_pc_sel_w;
477 
wire [48:0]     ifu_npc_w;
478 
wire [3:0]               tlu_dsfsr_flt_vld;      // From mmu_dp of tlu_mmu_dp.v
479 
wire [47:13]    tlu_dtag_access_w2;     // From mmu_dp of tlu_mmu_dp.v
480 
wire [3:0]               tlu_dtsb_size_w2;       // From mmu_dp of tlu_mmu_dp.v
481 
wire                    tlu_dtsb_split_w2;      // From mmu_dp of tlu_mmu_dp.v
482 
wire [1:0]               tlu_agp_tid_w2;     // From tcl of tlu_tcl.v
483 
wire [`TSA_TTYPE_WIDTH-1:0] tlu_final_offset_w1; // From tcl of tlu_tcl.v
484 
wire [`TSA_TTYPE_WIDTH-1:0] tlu_final_ttype_w2;  // From tcl of tlu_tcl.v
485 
wire                    tlu_full_flush_pipe_w2; // From tcl of tlu_tcl.v
486 
wire            tlu_tcc_inst_w; // From tcl of tlu_tcl.v
487 
wire                    tlu_local_flush_w;      // From tcl of tlu_tcl.v
488 
wire [47:0]              tlu_idtsb_8k_ptr;       // From mmu_ctl of tlu_mmu_ctl.v
489 
wire                    tlu_asi_data_nf_vld_w2; // From mmu_ctl of tlu_mmu_ctl.v
490 
wire                    tlu_inst_vld_nq_m;              // From tcl of tlu_tcl.v
491 
wire                    tlu_int_asi_load;       // From mmu_ctl of tlu_mmu_ctl.v
492 
wire [1:0]               tlu_int_asi_thrid;      // From mmu_ctl of tlu_mmu_ctl.v
493 
wire                    tlu_int_asi_vld;        // From mmu_ctl of tlu_mmu_ctl.v
494 
wire [3:0]               tlu_int_pstate_ie;      // From tdp of tlu_tdp.v
495 
wire [3:0]               tlu_int_redmode;        // From tdp of tlu_tdp.v
496 
wire [23:0]              tlu_isfsr_din_g;        // From tcl of tlu_tcl.v
497 
wire [3:0]               tlu_isfsr_flt_vld;      // From mmu_dp of tlu_mmu_dp.v
498 
//wire [47:13]          tlu_itsb_base_w2;       // From mmu_dp of tlu_mmu_dp.v
499 
wire [3:0]               tlu_itsb_size_w2;       // From mmu_dp of tlu_mmu_dp.v
500 
wire                    tlu_itsb_split_w2;      // From mmu_dp of tlu_mmu_dp.v
501 
wire [3:0]               tlu_ldxa_l1mx1_sel;     // From mmu_ctl of tlu_mmu_ctl.v
502 
wire [3:0]               tlu_ldxa_l1mx2_sel;     // From mmu_ctl of tlu_mmu_ctl.v
503 
wire [2:0]               tlu_ldxa_l2mx1_sel;     // From mmu_ctl of tlu_mmu_ctl.v
504 
// wire                 tlu_mmu_sync_data_excp_g;// From mmu_ctl of tlu_mmu_ctl.v
505 
wire [3:0]               tlu_pil;                // From tcl of tlu_tcl.v
506 
wire                    tlu_tlb_tag_invrt_parity ;
507 
wire                    tlu_tlb_data_invrt_parity ;
508 
wire                  tlu_sun4r_tte_g ;       // sun4r vs. sun4v tte
509 
//
510 
// modified for bug 1767
511 
/*
512 
wire [1:0]              tlu_pstate0_mmodel;     // From tdp of tlu_tdp.v
513 
wire [1:0]              tlu_pstate1_mmodel;     // From tdp of tlu_tdp.v
514 
wire [1:0]              tlu_pstate2_mmodel;     // From tdp of tlu_tdp.v
515 
wire [1:0]              tlu_pstate3_mmodel;     // From tdp of tlu_tdp.v
516 
wire [`TLU_THRD_NUM-1:0] tlu_pstate_tle;                // From tdp of tlu_tdp.v
517 
wire [`TLU_THRD_NUM-1:0] tlu_pstate_cle;                // From tdp of tlu_tdp.v
518 
*/
519 
wire [`TLU_THRD_NUM-1:0] tlu_pstate_am;          // From tdp of tlu_tdp.v
520 
wire [1:0]               tlu_pstate_din_sel0;    // From tcl of tlu_tcl.v
521 
wire [1:0]               tlu_pstate_din_sel1;    // From tcl of tlu_tcl.v
522 
wire [1:0]               tlu_pstate_din_sel2;    // From tcl of tlu_tcl.v
523 
wire [1:0]               tlu_pstate_din_sel3;    // From tcl of tlu_tcl.v
524 
// wire [`TLU_THRD_NUM-1:0] tlu_pstate_priv;    // From tdp of tlu_tdp.v
525 
// wire                 tlu_retry_inst_m;       // From tcl of tlu_tcl.v
526 
//
527 
// modified for hypervisor support and bug 1767
528 
/*
529 
wire                    tlu_select_alt_global;  // From tcl of tlu_tcl.v
530 
wire                    tlu_select_int_global;  // From tcl of tlu_tcl.v
531 
wire                    tlu_select_mmu_global;  // From tcl of tlu_tcl.v
532 
wire [1:0]              tlu_select_mmodel;      // From tcl of tlu_tcl.v
533 
wire                    tlu_select_tle;         // From tcl of tlu_tcl.v
534 
*/
535 
wire                    tlu_select_redmode;     // From tcl of tlu_tcl.v
536 
// wire                 tlu_select_tba_g;       // From tcl of tlu_tcl.v
537 
wire                    tlu_select_tba_w2;      // From tcl of tlu_tcl.v
538 
wire                    tdp_select_tba_w2;      // From tcl of tlu_tcl.v
539 
// wire                 tlu_self_boot_rst_g;    // From tcl of tlu_tcl.v
540 
// wire                 tlu_self_boot_rst_w2;   // From tcl of tlu_tcl.v
541 
wire                    tlu_set_sftint_l_g;     // From tcl of tlu_tcl.v
542 
wire [`TLU_THRD_NUM-1:0] tlu_sftint_en_l_g;      // From tcl of tlu_tcl.v
543 
wire [`TLU_THRD_NUM-1:0] tlu_sftint_mx_sel;      // From tcl of tlu_tcl.v
544 
wire [3:0]               tlu_sftint_id;          // From tdp of tlu_tdp.v
545 
// wire [3:0]           tlu_sftint_lvl14_int;   // From tcl of tlu_tcl.v
546 
wire [3:0]               tlu_sftint_penc_sel;    // From tcl of tlu_tcl.v
547 
wire [3:0]               tlu_slxa_thrd_sel;      // From mmu_ctl of tlu_mmu_ctl.v
548 
wire [2:0]               tlu_tag_access_ctxt_sel_m;// From tcl of tlu_tcl.v
549 
//wire                  tlu_tag_access_nctxt_g; // From mmu_dp of tlu_mmu_dp.v
550 
wire [`TLU_THRD_NUM-1:0] tlu_tba_en_l;           // From tcl of tlu_tcl.v
551 
wire [`TLU_THRD_NUM-1:0] tlu_thrd_rsel_e;        // From tcl of tlu_tcl.v
552 
// wire [`TLU_THRD_NUM-1:0] tlu_thrd_rsel_g;    // From tcl of tlu_tcl.v
553 
// wire [`TLU_THRD_NUM-1:0] tlu_thrd_wsel_g;    // From tcl of tlu_tcl.v
554 
wire [`TLU_THRD_NUM-1:0] tlu_thrd_wsel_w2;       // From tcl of tlu_tcl.v
555 
wire [`TLU_THRD_NUM-1:0] tlu_thread_wsel_g;      // From tcl of tlu_tcl.v
556 
wire [`TLU_THRD_NUM-1:0] tlu_thread_inst_vld_g;  // From tcl of tlu_tcl.v
557 
// wire [`TLU_THRD_NUM-1:0] tlu_thread_inst_vld_w2;     // From tcl of tlu_tcl.v
558 
wire                    tlu_tick_en_l;          // From tcl of tlu_tcl.v
559 
// wire [`TLU_THRD_NUM-1:0] tlu_tick_int;               // From tcl of tlu_tcl.v
560 
// wire [`TLU_THRD_NUM-1:0] tlu_stick_int;              // From tcl of tlu_tcl.v
561 
// wire                 tlu_tick_match;         // From tdp of tlu_tdp.v
562 
wire                    tlu_tick_npt;           // From tcl of tlu_tcl.v
563 
wire [`TLU_THRD_NUM-1:0] tlu_tickcmp_en_l;       // From tcl of tlu_tcl.v
564 
// wire                 tlu_tickcmp_intdis;     // From tcl of tlu_tcl.v
565 
wire [`TLU_THRD_NUM-1:0] tlu_tickcmp_sel;        // From tcl of tlu_tcl.v
566 
// wire                 tlu_tl_gt_0_g;          // From tcl of tlu_tcl.v
567 
wire                    tlu_tl_gt_0_w2;         // From tcl of tlu_tcl.v
568 
wire [2:0]               tlu_trp_lvl;            // From tcl of tlu_tcl.v
569 
wire [2:0]               tlu_tte_tag_g;          // From mmu_ctl of tlu_mmu_ctl.v
570 
wire [2:0]               tlu_tte_wr_pid_g;       // From mmu_ctl of tlu_mmu_ctl.v
571 
// wire [`TLU_THRD_NUM-1:0] tlu_update_pc_l_m;  // From tcl of tlu_tcl.v
572 
wire [`TLU_THRD_NUM-1:0] tlu_update_pc_l_w;      // From tcl of tlu_tcl.v
573 
wire [`TLU_THRD_NUM-1:0] tlu_trap_cwp_en;        // From tcl of tlu_tcl.v
574 
wire tlu_cwp_no_change_m;       // From tcl of tlu_tcl.v
575 
// modified due to timing
576 
// wire [3:0]           tlu_update_pstate_l_g;  // From tcl of tlu_tcl.v
577 
wire [3:0]               tlu_update_pstate_l_w2; // From tcl of tlu_tcl.v
578 
wire                    tlu_wr_sftint_l_g;      // From tcl of tlu_tcl.v
579 
// wire                 tlu_wsr_inst_g;         // From tcl of tlu_tcl.v
580 
wire                    tlu_wsr_inst_nq_g;              // From tcl of tlu_tcl.v
581 
// wire                 tlu_wr_tsa_inst_g;      // From tcl of tlu_tcl.v
582 
wire                    tlu_wr_tsa_inst_w2;     // From tcl of tlu_tcl.v
583 
wire                    tsa_npc_en;             // From tcl of tlu_tcl.v
584 
wire                    tsa_pc_en;              // From tcl of tlu_tcl.v
585 
wire [1:0]               tsa_rd_tid;             // From tcl of tlu_tcl.v
586 
wire [2:0]               tsa_rd_tpl;             // From tcl of tlu_tcl.v
587 
wire                    tsa_rd_vld_e;   // From tcl of tlu_tcl.v
588 
wire                    tsa_rd_en;              // From tcl of tlu_tcl.v
589 
// wire [`TLU_TSA_WIDTH-1:0]            tsa_rdata;              // From tsa of tlu_tsa.v
590 
wire                    tsa_tstate_en;          // From tcl of tlu_tcl.v
591 
wire                    tsa_htstate_en;         // From tlu_hyperv of tlu_hyperv.v
592 
wire                    tsa_ttype_en;           // From tcl of tlu_tcl.v
593 
wire [`TLU_TSA_WIDTH-1:0]                tsa_wdata;              // From tdp of tlu_tdp.v
594 
wire [1:0]               tsa_wr_tid;             // From tcl of tlu_tcl.v
595 
wire [2:0]               tsa_wr_tpl;             // From tcl of tlu_tcl.v
596 
// modified due to tsa memory swap
597 
wire [1:0]               tsa_wr_vld;             // From tcl of tlu_tcl.v
598 
wire                    tlu_htstate_rw_d;  // From tlu_hyperv of tlu_hyperv.v
599 
wire                    tlu_htstate_rw_g;  // From tlu_hyperv of tlu_hyperv.v
600 
// modified due to rsr mux recode
601 
// wire                 tlu_htba_mx2_sel;  // From tlu_hyperv of tlu_hyperv.v
602 
wire                    tlu_htickcmp_rw_e; // From tlu_hyperv of tlu_hyperv.v
603 
// End of automatics
604 
wire [`TLU_ASI_QUE_WIDTH-1:0] tlu_asi_queue_rdata_g;
605 
wire tlu_asi_queue_rd_vld_g;
606 
wire tlu_ld_data_vld_g;
607 
wire tlu_va_ill_g;
608 
// wire tlu_va_all_zero_g;
609 
//
610 
// modified for timing fixes
611 
// wire [3:0]           pib_priv_act_trap ;
612 
wire [3:0]               pib_priv_act_trap_m ;
613 
// wire [`QUE_TRAP_SEL_WIDTH-1:0] tlu_que_trap_sel_m;
614 
wire [5:0] tlu_ctxt_cfg_w2;      // To mmu_ctl of tlu_mmu_ctl.v
615 
wire [`TLU_THRD_NUM-1:0] pib_picl_wrap;          // To tcl of tlu_tcl.v
616 
wire [`TLU_THRD_NUM-1:0] pib_pich_wrap;          // To tcl of tlu_tcl.v
617 
wire [`TLU_THRD_NUM-1:0] pich_wrap_flg;          // To tcl of tlu_tcl.v
618 
wire [`TLU_THRD_NUM-1:0] pich_onebelow_flg;              // To tcl of tlu_tcl.v
619 
wire [`TLU_THRD_NUM-1:0] pich_twobelow_flg;              // To tcl of tlu_tcl.v
620 
wire tlu_pic_onebelow_e;                // To tcl of tlu_tcl.v
621 
wire tlu_pic_twobelow_e;                // To tcl of tlu_tcl.v
622 
wire tlu_pic_wrap_e;            // To tcl of tlu_tcl.v
623 
//
624 
// modified for bug 5436: Niagara 2.0
625 
wire [`TLU_THRD_NUM-1:0] tlu_pcr_ut;             // To tcl of tlu_tcl.v
626 
wire [`TLU_THRD_NUM-1:0] tlu_pcr_st;             // To tcl of tlu_tcl.v
627 
// wire tlu_pcr_ut_e;           // To tcl of tlu_tcl.v
628 
// wire tlu_pcr_st_e;           // To tcl of tlu_tcl.v
629 
wire tlu_pic_cnt_en_m;          // To tcl of tlu_tcl.v
630 
// wire [`TLU_THRD_NUM-1:0] pich_threebelow_flg;        // To tcl of tlu_tcl.v
631 
//
632 
// added for hypervisor support
633 
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_dnrtry_global_g;
634 
// wire tlu_htick_match;
635 
// wire tlu_stick_match;
636 
wire tlu_trap_hpstate_enb;
637 
wire [`TLU_THRD_NUM-1:0] local_hpstate_priv;
638 
wire [`TLU_THRD_NUM-1:0] tcl_hpstate_priv;
639 
wire [`TLU_THRD_NUM-1:0] local_hpstate_enb;
640 
wire [`TLU_THRD_NUM-1:0] tcl_hpstate_enb;
641 
wire [`TLU_THRD_NUM-1:0] local_pstate_priv;
642 
wire [`TLU_THRD_NUM-1:0] local_pstate_ie;
643 
 
644 
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_gl_lvl0;
645 
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_gl_lvl1;
646 
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_gl_lvl2;
647 
wire [`TSA_GLOBAL_WIDTH-1:0] tlu_gl_lvl3;
648 
// wire [`TLU_THRD_NUM-1:0] tlu_hintp_en_l_g;
649 
wire [`TLU_THRD_NUM-1:0] tlu_htba_en_l;
650 
wire [`TLU_THRD_NUM-1:0] tlu_htickcmp_en_l;
651 
// wire [`TLU_THRD_NUM-1:0] tlu_set_hintp_g;
652 
wire [`TLU_THRD_NUM-1:0] tlu_set_hintp_sel_g;
653 
wire [`TLU_THRD_NUM-1:0] tlu_stickcmp_en_l;
654 
// modified for timing
655 
// wire [`TLU_THRD_NUM-1:0] tlu_update_hpstate_l_g;
656 
wire [`TLU_THRD_NUM-1:0] tlu_update_hpstate_l_w2;
657 
wire [`TLU_THRD_NUM-1:0] tlu_wr_hintp_g;
658 
wire [`TLU_THRD_NUM-1:0] tlu_cpu_mondo_cmp;
659 
wire [`TLU_THRD_NUM-1:0] tlu_dev_mondo_cmp;
660 
wire [`TLU_THRD_NUM-1:0] tlu_resum_err_cmp;
661 
wire [`TLU_THRD_NUM-1:0] tlu_hintp;
662 
wire [1:0] tlu_hpstate_din_sel0;
663 
wire [1:0] tlu_hpstate_din_sel1;
664 
wire [1:0] tlu_hpstate_din_sel2;
665 
wire [1:0] tlu_hpstate_din_sel3;
666 
wire [4:0] tlu_hyperv_rdpr_sel;
667 
wire [2:0] tlu_rdpr_mx1_sel;
668 
wire [2:0] tlu_rdpr_mx2_sel;
669 
wire [1:0] tlu_rdpr_mx3_sel;
670 
wire [1:0] tlu_rdpr_mx4_sel;
671 
wire [2:0] tlu_rdpr_mx5_sel;
672 
wire [2:0] tlu_rdpr_mx6_sel;
673 
wire [3:0] tlu_rdpr_mx7_sel;
674 
// modified for timing
675 
// wire tlu_ibrkpt_trap_g;
676 
wire tlu_ibrkpt_trap_w2;
677 
// wire tlu_select_htba_g;
678 
// wire tlu_select_htba_w2;
679 
wire [2:0] tlu_pc_mxsel_w2;
680 
// wire       tlu_stickcmp_intdis;
681 
wire       tlu_htickcmp_intdis;
682 
// wire       tlu_gl_rw_g;
683 
wire       tlu_gl_rw_m;
684 
wire [`TLU_THRD_NUM-1:0] tlu_por_rstint_g;
685 
// modified due to timing
686 
// wire tlu_thrd0_traps, tlu_thrd1_traps;
687 
// wire tlu_thrd2_traps, tlu_thrd3_traps;
688 
wire [`TLU_THRD_NUM-1:0] tlu_thrd_traps_w2;
689 
wire tlu_dnrtry0_inst_g, tlu_dnrtry1_inst_g;
690 
wire tlu_dnrtry2_inst_g, tlu_dnrtry3_inst_g;
691 
wire tlu_scpd_rd_vld_m; // tlu_scpd_rd_vld_g;
692 
wire tlu_scpd_wr_vld_g;
693 
wire tlu_hscpd_dacc_excpt_m;
694 
wire tlu_qtail_dacc_excpt_m;
695 
wire [`SCPD_RW_ADDR_WIDTH-1:0]  tlu_scpd_rd_addr_m;
696 
wire [`SCPD_RW_ADDR_WIDTH-1:0]  tlu_scpd_wr_addr_g;
697 
wire [79:0] tlu_scpd_asi_rdata_g;
698 
//
699 
// added for the change of hierarchy to promote sparc_tlu_intdp and
700 
// sparc_tlu_intctl onto the tlu level
701 
// wire                 inc_ind_asi_inrr;       // From intctl of sparc_tlu_intctl.v
702 
wire [3:0]               tlu_asi_rdata_mxsel_g;  // From intctl of sparc_tlu_intctl.v
703 
wire [3:0]               inc_ind_asi_rd_invr;    // From intctl of sparc_tlu_intctl.v
704 
// wire [3:0]           inc_ind_asi_thr;        // From intctl of sparc_tlu_intctl.v
705 
wire [3:0]               tlu_local_thrid_g;      // From intctl of sparc_tlu_intctl.v
706 
wire [3:0]               inc_ind_asi_wr_indr;    // From intctl of sparc_tlu_intctl.v
707 
wire [3:0]               inc_ind_asi_wr_inrr;    // From intctl of sparc_tlu_intctl.v
708 
wire [3:0]               inc_ind_indr_grant;     // From intctl of sparc_tlu_intctl.v
709 
wire [3:0]               inc_ind_ld_int_i1;      // From intctl of sparc_tlu_intctl.v
710 
wire [3:0]               inc_ind_rstthr_i1;      // From intctl of sparc_tlu_intctl.v
711 
wire [3:0]               inc_ind_thr_m;  // From intctl of sparc_tlu_intctl.v
712 
wire [1:0]               inc_indr_req_thrid;     // From intctl of sparc_tlu_intctl.v
713 
wire                    inc_indr_req_valid;     // From intctl of sparc_tlu_intctl.v
714 
wire [4:0]               ind_inc_thrid_i1;       // From intdp of sparc_tlu_intdp.v
715 
wire [1:0]               ind_inc_type_i1;        // From intdp of sparc_tlu_intdp.v
716 
// wire                 indr_inc_rst_pkt;       // From intdp of sparc_tlu_intdp.v
717 
wire [3:0]               int_pending_i2_l;       // From intdp of sparc_tlu_intdp.v
718 
// hypervisor lite indicator
719 
// wire [`TLU_THRD_NUM-1:0] tlu_hyper_lite;
720 
 
721 
wire [12:0]              tlu_tag_access_ctxt_g ;
722 
wire                    tlu_lng_ltncy_en_l ;
723 
wire                    tlu_tsb_rd_ps0_sel ;
724 
wire [47:13]            tlu_tsb_base_w2_d1 ;
725 
 
726 
   // scan chain wires
727 
   wire         scan1_1;
728 
   wire         scan1_2;
729 
   wire         scan1_3;
730 
   wire         scan0_1;
731 
   wire         short_scan0_1;
732 
   wire         short_scan0_2;
733 
   wire         short_scan0_3;
734 
   wire         short_scan0_4;
735 
   wire         short_scan0_5;
736 
   wire         short_scan0_6;
737 
//=====================================================================================
738 
// DUMMY WIRES FOR VLINT. TO BE FILTERED OUT.
739 
wire [9:0]               dummy_mra_rdata;
740 
 
741 
//=====================================================================================
742 
 
743 
 
744 
/*
745 
sparc_tlu_int  AUTO_TEMPLATE (
746 
                       .tlu_int_asi_state(lsu_asi_state[`TLU_ASI_STATE_WIDTH-1:0]),
747 
                       .lsu_tlu_pmode   (1'b1),
748 
 
749 
                       .int_tlu_longop_done());
750 
*/
751 
//
752 
// modified the hierarchy to bring sparc_tlu_intdp and sparc_tlu_intctl
753 
// to the tlu level - eliminating sparc_tlu_int
754 
/*
755 
sparc_tlu_int tlu_int (
756 
                       .tlu_int_asi_state(lsu_asi_state[`TLU_ASI_STATE_WIDTH-1:0]),
757 
                       .lsu_tlu_pmode   (1'b1), // enable partition mode
758 
 
759 
                       .int_tlu_longop_done(),  // use to switch in thread
760 
                       // .tlu_int_asi_store(tlu_int_asi_store),
761 
                       // Outputs
762 
                       .int_scpd_asi_data(int_scpd_asi_data[63:0]),
763 
                       .int_scpd_asi_data_vld(int_scpd_asi_data_vld),
764 
                       .int_tlu_rstid_m (int_tlu_rstid_m[5:0]),
765 
                       .so              (so),
766 
                       .tlu_ifu_hwint_i3(tlu_ifu_hwint_i3[3:0]),
767 
                       // .tlu_ifu_int_activate_i3(tlu_ifu_int_activate_i3[3:0]),
768 
                       .tlu_ifu_nukeint_i2(tlu_ifu_nukeint_i2),
769 
                       .tlu_ifu_pstate_ie(tlu_ifu_pstate_ie[3:0]),
770 
                       .tlu_ifu_resumint_i2(tlu_ifu_resumint_i2),
771 
                       .tlu_ifu_rstint_i2(tlu_ifu_rstint_i2),
772 
                       .tlu_ifu_rstthr_i2(tlu_ifu_rstthr_i2[3:0]),
773 
                       .tlu_lsu_pcxpkt  (tlu_lsu_pcxpkt[25:0]),
774 
                       // Inputs
775 
                       .lsu_tlu_st_rs3_data_g(lsu_tlu_rs3_data_g[63:0]),
776 
                       .clk             (rclk),
777 
                       .const_cpuid     (const_cpuid[3:0]),
778 
                       .lsu_tlu_cpx_req (lsu_tlu_cpx_req[3:0]),
779 
                       .lsu_tlu_cpx_vld (lsu_tlu_cpx_vld),
780 
                       .lsu_tlu_intpkt  (lsu_tlu_intpkt[17:0]),
781 
                       .lsu_tlu_pcxpkt_ack(lsu_tlu_pcxpkt_ack),
782 
                       .tlu_rst_l       (tlu_rst_l),
783 
                       .se              (se),
784 
                       .si              (si),
785 
                       .tlu_int_asi_load(tlu_int_asi_load),
786 
                       .tlu_int_asi_thrid(tlu_int_asi_thrid[1:0]),
787 
                       .tlu_int_asi_vld (tlu_int_asi_vld),
788 
                       .tlu_int_pstate_ie(tlu_int_pstate_ie[3:0]),
789 
                       .tlu_int_redmode (tlu_int_redmode[3:0]),
790 
                       .tlu_int_sftint_pend(tlu_int_sftint_pend[3:0]),
791 
                       .tlu_int_tid_m   (tlu_int_tid_m[1:0]));
792 
*/
793 
sparc_tlu_intdp  intdp(
794 
                          .lsu_ind_intpkt_id(lsu_tlu_intpkt[`INT_VEC_HI:`INT_VEC_LO]),
795 
                          .lsu_ind_intpkt_type(lsu_tlu_intpkt[`INT_TYPE_HI:`INT_TYPE_LO]),
796 
                          .lsu_ind_intpkt_thr(lsu_tlu_intpkt[`INT_THR_HI:`INT_THR_LO]),
797 
                          .so           (scan1_1),
798 
                          .si           (si1),
799 
              /*AUTOINST*/
800 
                          // Outputs
801 
                          .int_pending_i2_l(int_pending_i2_l[3:0]),
802 
                          .ind_inc_thrid_i1(ind_inc_thrid_i1[4:0]),
803 
                          .ind_inc_type_i1(ind_inc_type_i1[1:0]),
804 
                          .int_tlu_rstid_m(int_tlu_rstid_m[5:0]),
805 
                          .tlu_lsu_pcxpkt(tlu_lsu_pcxpkt[25:0]),
806 
                          .tlu_lsu_int_ldxa_data_w2(tlu_lsu_int_ldxa_data_w2[63:0]),
807 
                          // Inputs
808 
                          .rclk         (rclk),
809 
                          .se           (se),
810 
                          .tlu_rst_l(int_rst_l),
811 
                          .lsu_tlu_st_rs3_data_g(lsu_tlu_rs3_data_g[63:0]),
812 
                          .tlu_asi_rdata_mxsel_g(tlu_asi_rdata_mxsel_g[3:0]),
813 
              .tlu_scpd_asi_rdata_g(tlu_scpd_asi_rdata_g[`TLU_SCPD_DATA_WIDTH-1:0]),
814 
              .tlu_asi_queue_rdata_g(tlu_asi_queue_rdata_g[`TLU_ASI_QUE_WIDTH-1:0]),
815 
                          .inc_ind_ld_int_i1(inc_ind_ld_int_i1[3:0]),
816 
                          .inc_ind_rstthr_i1(inc_ind_rstthr_i1[3:0]),
817 
                          .inc_ind_asi_thr(tlu_local_thrid_g[`TLU_THRD_NUM-1:0]),
818 
                          .inc_ind_asi_wr_indr(inc_ind_asi_wr_indr[3:0]),
819 
                          .inc_ind_indr_grant(inc_ind_indr_grant[3:0]),
820 
                          .inc_ind_thr_m(inc_ind_thr_m[3:0]),
821 
                          .inc_ind_asi_wr_inrr(inc_ind_asi_wr_inrr[3:0]),
822 
                          .inc_ind_asi_rd_invr(inc_ind_asi_rd_invr[3:0]),
823 
                          .inc_indr_req_valid(inc_indr_req_valid),
824 
                          .inc_indr_req_thrid(inc_indr_req_thrid[1:0]));
825 
 
826 
sparc_tlu_intctl  intctl(
827 
                            .so         (scan0_1),
828 
                            .si         (si0),
829 
                            .tlu_int_asi_store(tlu_asi_write_g),
830 
                            /*AUTOINST*/
831 
                            // Outputs
832 
                            .tlu_ifu_hwint_i3(tlu_ifu_hwint_i3[3:0]),
833 
                            .tlu_ifu_rstthr_i2(tlu_ifu_rstthr_i2[3:0]),
834 
                            .tlu_ifu_rstint_i2(tlu_ifu_rstint_i2),
835 
                            .tlu_ifu_nukeint_i2(tlu_ifu_nukeint_i2),
836 
                            .tlu_ifu_resumint_i2(tlu_ifu_resumint_i2),
837 
                            .tlu_ifu_pstate_ie(tlu_ifu_pstate_ie[3:0]),
838 
                        .int_tlu_longop_done(),
839 
                            .inc_ind_ld_int_i1(inc_ind_ld_int_i1[3:0]),
840 
                            .inc_ind_rstthr_i1(inc_ind_rstthr_i1[3:0]),
841 
                            .inc_ind_indr_grant(inc_ind_indr_grant[3:0]),
842 
                            .inc_ind_thr_m(inc_ind_thr_m[3:0]),
843 
                            .inc_indr_req_valid(inc_indr_req_valid),
844 
                            .inc_indr_req_thrid(inc_indr_req_thrid[1:0]),
845 
                            .tlu_asi_data_nf_vld_w2(tlu_asi_data_nf_vld_w2),
846 
                            .tlu_lsu_int_ld_ill_va_w2(tlu_lsu_int_ld_ill_va_w2),
847 
                            .tlu_asi_rdata_mxsel_g(tlu_asi_rdata_mxsel_g[3:0]),
848 
                            .int_rst_l (int_rst_l),
849 
                            // Inputs
850 
                            .rclk       (rclk),
851 
                            .se         (se),
852 
                            .sehold     (sehold),
853 
                        .grst_l (grst_l),
854 
                        .arst_l (arst_l),
855 
                            .rst_tri_en (mux_drive_disable),
856 
                            .const_cpuid(const_cpuid[3:0]),
857 
                            .lsu_tlu_cpx_vld(lsu_tlu_cpx_vld),
858 
                            .lsu_tlu_cpx_req(lsu_tlu_cpx_req[3:0]),
859 
                            .lsu_tlu_pcxpkt_ack(lsu_tlu_pcxpkt_ack),
860 
                            .ind_inc_thrid_i1(ind_inc_thrid_i1[4:0]),
861 
                            .ind_inc_type_i1(ind_inc_type_i1[1:0]),
862 
                            .tlu_int_asi_vld(tlu_int_asi_vld),
863 
                            .tlu_int_asi_load(tlu_int_asi_load),
864 
                            .tlu_int_asi_thrid(tlu_int_asi_thrid[1:0]),
865 
                        .tlu_int_asi_state(lsu_asi_state[7:0]),
866 
                            .tlu_int_tid_m(tlu_int_tid_m[1:0]),
867 
                            .tlu_int_pstate_ie(tlu_int_pstate_ie[3:0]),
868 
                            .tlu_asi_queue_rd_vld_g(tlu_asi_queue_rd_vld_g),
869 
                            .tlu_ld_data_vld_g(tlu_ld_data_vld_g),
870 
                            .tlu_va_ill_g(tlu_va_ill_g),
871 
                            .int_pending_i2_l(int_pending_i2_l[3:0]));
872 
 
873 
tlu_misctl misctl (
874 
         // output
875 
         .tlu_exu_pic_onebelow_m  (tlu_exu_pic_onebelow_m),
876 
         .tlu_exu_pic_twobelow_m  (tlu_exu_pic_twobelow_m),
877 
             .tlu_exu_cwp_m               (tlu_exu_cwp_m[`TSA_CWP_WIDTH-1:0]),
878 
             .tlu_exu_ccr_m               (tlu_exu_ccr_m[`TSA_CCR_WIDTH-1:0]),
879 
             .tlu_lsu_asi_m               (tlu_lsu_asi_m[`TLU_ASI_STATE_WIDTH-1:0]),
880 
         .tlu_cwp_no_change_m (tlu_cwp_no_change_m),
881 
         .tlu_sscan_misctl_data  (tlu_sscan_test_data[`MISCTL_SSCAN_HI:`MISCTL_SSCAN_LO]),
882 
         .tlu_ifu_trappc_w2     (tlu_ifu_trappc_w2[48:0]),
883 
         .tlu_ifu_trapnpc_w2    (tlu_ifu_trapnpc_w2[48:0]),
884 
         .tlu_pc_new_w          (tlu_pc_new_w[48:0]),
885 
         .tlu_npc_new_w         (tlu_npc_new_w[48:0]),
886 
         .so (short_so0),
887 
         // inputs
888 
             .ctu_sscan_tid      (ctu_sscan_tid[`TLU_THRD_NUM-1:0]),
889 
             .ifu_tlu_pc_m               (ifu_tlu_pc_m[48:0]),
890 
             // .ifu_tlu_npc_m           (ifu_tlu_npc_m[48:0]),
891 
             .ifu_npc_w              (ifu_npc_w[48:0]),
892 
             .exu_tlu_cwp0               (exu_tlu_cwp0[`TSA_CWP_WIDTH-1:0]),
893 
             .exu_tlu_cwp1               (exu_tlu_cwp1[`TSA_CWP_WIDTH-1:0]),
894 
             .exu_tlu_cwp2               (exu_tlu_cwp2[`TSA_CWP_WIDTH-1:0]),
895 
             .exu_tlu_cwp3               (exu_tlu_cwp3[`TSA_CWP_WIDTH-1:0]),
896 
             .tlu_partial_trap_pc_w1 (tlu_partial_trap_pc_w1[33:0]),
897 
         .tlu_restore_pc_w1      (tlu_restore_pc_w1[48:0]),
898 
         .tlu_restore_npc_w1     (tlu_restore_npc_w1[48:0]),
899 
             .tlu_final_ttype_w2     (tlu_final_ttype_w2[`TSA_TTYPE_WIDTH-1:0]),
900 
             .tlu_final_offset_w1    (tlu_final_offset_w1[`TSA_TTYPE_WIDTH-1:0]),
901 
             .tlu_restore_pc_sel_w1      (tlu_restore_pc_sel_w1),
902 
             // .tlu_retry_inst_m            (tlu_retry_inst_m),
903 
             // .tlu_done_inst_m             (tlu_done_inst_m),
904 
             // .tlu_dnrtry_inst_m_l    (tlu_dnrtry_inst_m_l),
905 
             .tlu_true_pc_sel_w   (tlu_true_pc_sel_w[2:0]),
906 
             .tsa_wr_tid   (tsa_wr_tid[1:0]),
907 
             .tsa1_wr_vld  (tsa_wr_vld[1]),
908 
             .tsa_ttype_en (tsa_ttype_en),
909 
             .tsa_rd_vld_e (tsa_rd_vld_e),
910 
             // .tsa_rd_vld   (tsa_rd_vld),
911 
             .tsa0_rdata_cwp     (tsa0_dout[`TSA0_MEM_CWP_HI:`TSA0_MEM_CWP_LO]),
912 
             .tsa0_rdata_pstate  (tsa0_dout[`TSA0_MEM_PSTATE_HI:`TSA0_MEM_PSTATE_LO]),
913 
             .tsa0_rdata_asi     (tsa0_dout[`TSA0_MEM_ASI_HI:`TSA0_MEM_ASI_LO]),
914 
             .tsa0_rdata_ccr     (tsa0_dout[`TSA0_MEM_CCR_HI:`TSA0_MEM_CCR_LO]),
915 
             .tsa0_rdata_gl              (tsa0_dout[`TSA0_MEM_GL_HI:`TSA0_MEM_GL_LO]),
916 
             .tsa0_rdata_pc              (tsa0_dout[`TSA0_TPC_HI:`TSA0_TPC_LO]),
917 
             .tsa1_rdata_ttype   (tsa1_dout[`TSA1_TTYPE_HI:`TSA1_TTYPE_LO]),
918 
             .tsa1_rdata_npc     (tsa1_dout[`TSA1_TNPC_HI:`TSA1_TNPC_LO]),
919 
             .tsa1_rdata_htstate (tsa1_dout[`TSA1_HTSTATE_HI:`TSA1_HTSTATE_LO]),
920 
             .tlu_thrd_rsel_e    (tlu_thrd_rsel_e[`TLU_THRD_NUM-1:0]),
921 
         // experiement
922 
         .tlu_pic_onebelow_e (tlu_pic_onebelow_e),
923 
         .tlu_pic_twobelow_e (tlu_pic_twobelow_e),
924 
         .tlu_pic_cnt_en_m   (tlu_pic_cnt_en_m),
925 
         // .pich_onebelow_flg (pich_onebelow_flg[`TLU_THRD_NUM-1:0]),
926 
         // .pich_twobelow_flg (pich_twobelow_flg[`TLU_THRD_NUM-1:0]),
927 
         // .pich_threebelow_flg (pich_threebelow_flg[`TLU_THRD_NUM-1:0]),
928 
             // .tlu_thread_inst_vld_w2 (tlu_thread_inst_vld_w2[`TLU_THRD_NUM-1:0]),
929 
         //
930 
             .tlu_rst                   (tlu_rst),
931 
         .se (se),
932 
         .si (short_scan0_6),
933 
             .rclk      (rclk));
934 
 
935 
tlu_tcl tcl (
936 
         .so (short_so1),
937 
         .si (short_si1),
938 
             .tlu_wsr_data_b63_w        (tlu_wsr_data_w[`TLU_ASR_DATA_WIDTH-1]),
939 
         .tlu_itag_acc_sel_g (tlu_itag_acc_sel_g),
940 
         .pib_priv_act_trap_m   (pib_priv_act_trap_m[3:0]),
941 
         .spu_tlu_rsrv_illgl_m  (spu_tlu_rsrv_illgl_m),
942 
         .tlu_cpu_mondo_cmp (tlu_cpu_mondo_cmp[`TLU_THRD_NUM-1:0]),
943 
         .tlu_dev_mondo_cmp (tlu_dev_mondo_cmp[`TLU_THRD_NUM-1:0]),
944 
         .tlu_resum_err_cmp (tlu_resum_err_cmp[`TLU_THRD_NUM-1:0]),
945 
         .tlu_hintp         (tlu_hintp),
946 
         .pich_wrap_flg     (pich_wrap_flg[`TLU_THRD_NUM-1:0]),
947 
         .pich_onebelow_flg (pich_onebelow_flg[`TLU_THRD_NUM-1:0]),
948 
         .pich_twobelow_flg (pich_twobelow_flg[`TLU_THRD_NUM-1:0]),
949 
          // modified for bug 5436: Niagara 2.0
950 
             .tlu_pcr_ut            (tlu_pcr_ut[`TLU_THRD_NUM-1:0]),
951 
             .tlu_pcr_st            (tlu_pcr_st[`TLU_THRD_NUM-1:0]),
952 
             // .tlu_pcr_ut_e       (tlu_pcr_ut_e),
953 
             // .tlu_pcr_st_e       (tlu_pcr_st_e),
954 
         .tlu_pic_cnt_en_m  (tlu_pic_cnt_en_m),
955 
         .tlu_pic_wrap_e    (tlu_pic_wrap_e),
956 
         // .pich_threebelow_flg (pich_threebelow_flg[`TLU_THRD_NUM-1:0]),
957 
         .pib_picl_wrap (pib_picl_wrap[`TLU_THRD_NUM-1:0]),
958 
             .tlu_local_flush_w (tlu_local_flush_w),
959 
             .tlu_restore_pc_sel_w1     (tlu_restore_pc_sel_w1),
960 
             .tlu_final_offset_w1 (tlu_final_offset_w1[`TSA_TTYPE_WIDTH-1:0]),
961 
             // Outputs
962 
         .pib_pich_wrap (pib_pich_wrap[`TLU_THRD_NUM-1:0]),
963 
         .tlu_ibrkpt_trap_w2     (tlu_ibrkpt_trap_w2),
964 
             .tlu_early_flush_pipe_w    (tlu_early_flush_pipe_w),
965 
             .tlu_early_flush_pipe2_w   (tlu_early_flush_pipe2_w),
966 
             .tlu_exu_early_flush_pipe_w        (tlu_exu_early_flush_pipe_w),
967 
             .tlu_ifu_trappc_vld_w1     (tlu_ifu_trappc_vld_w1),
968 
             .tlu_ifu_trapnpc_vld_w1    (tlu_ifu_trapnpc_vld_w1),
969 
             .tlu_ifu_trap_tid_w1       (tlu_ifu_trap_tid_w1[1:0]),
970 
         .tlu_trap_hpstate_enb  (tlu_trap_hpstate_enb),
971 
         .tlu_exu_priv_trap_m  (tlu_exu_priv_trap_m),
972 
         .tlu_lsu_priv_trap_m  (tlu_lsu_priv_trap_m),
973 
         // .tlu_lsu_priv_trap_w  (tlu_lsu_priv_trap_w),
974 
         // .tlu_exu_pic_onebelow_m  (tlu_exu_pic_onebelow_m),
975 
         // .tlu_exu_pic_twobelow_m  (tlu_exu_pic_twobelow_m),
976 
             .tsa_wr_tpl                (tsa_wr_tpl[2:0]),
977 
             .tsa_rd_tid                (tsa_rd_tid[1:0]),
978 
             .tsa_rd_tpl                (tsa_rd_tpl[2:0]),
979 
             .tsa_wr_tid                (tsa_wr_tid[1:0]),
980 
             .tsa_wr_vld                (tsa_wr_vld[1:0]),
981 
             .tsa_rd_vld_e              (tsa_rd_vld_e),
982 
             .tsa_rd_en             (tsa_rd_en),
983 
             .tlu_lsu_tl_zero           (tlu_lsu_tl_zero[3:0]),
984 
             .tlu_full_flush_pipe_w2 (tlu_full_flush_pipe_w2),
985 
                 .tlu_exu_agp_tid       (tlu_exu_agp_tid[1:0]),
986 
             .tlu_agp_tid_w2    (tlu_agp_tid_w2[1:0]),
987 
             .tlu_tcc_inst_w    (tlu_tcc_inst_w),
988 
             .tsa_pc_en                 (tsa_pc_en),
989 
             .tsa_npc_en                (tsa_npc_en),
990 
             .tsa_tstate_en             (tsa_tstate_en),
991 
             .tsa_ttype_en              (tsa_ttype_en),
992 
             .tsa_htstate_en    (tsa_htstate_en),
993 
             .tlu_tl_gt_0_w2            (tlu_tl_gt_0_w2),
994 
             // .tlu_retry_inst_m               (tlu_retry_inst_m),
995 
             // .tlu_done_inst_m                (tlu_done_inst_m),
996 
             // .tlu_dnrtry_inst_m_l            (tlu_dnrtry_inst_m_l),
997 
             .tlu_true_pc_sel_w   (tlu_true_pc_sel_w[2:0]),
998 
             .tlu_tick_en_l             (tlu_tick_en_l),
999 
             .tlu_tickcmp_en_l          (tlu_tickcmp_en_l[`TLU_THRD_NUM-1:0]),
1000 
             .tlu_tba_en_l              (tlu_tba_en_l[`TLU_THRD_NUM-1:0]),
1001 
             .tlu_thrd_wsel_w2          (tlu_thrd_wsel_w2[`TLU_THRD_NUM-1:0]),
1002 
             .tlu_thread_wsel_g         (tlu_thread_wsel_g[`TLU_THRD_NUM-1:0]),
1003 
             .tlu_final_ttype_w2                (tlu_final_ttype_w2[`TSA_TTYPE_WIDTH-1:0]),
1004 
             .tlu_thread_inst_vld_g     (tlu_thread_inst_vld_g[`TLU_THRD_NUM-1:0]),
1005 
             // .tlu_thread_inst_vld_w2 (tlu_thread_inst_vld_w2[`TLU_THRD_NUM-1:0]),
1006 
             .tlu_update_pc_l_w         (tlu_update_pc_l_w[`TLU_THRD_NUM-1:0]),
1007 
             .tlu_select_redmode        (tlu_select_redmode),
1008 
             .tlu_pstate_din_sel0       (tlu_pstate_din_sel0[1:0]),
1009 
             .tlu_pstate_din_sel1       (tlu_pstate_din_sel1[1:0]),
1010 
             .tlu_pstate_din_sel2       (tlu_pstate_din_sel2[1:0]),
1011 
             .tlu_pstate_din_sel3       (tlu_pstate_din_sel3[1:0]),
1012 
             .tlu_update_pstate_l_w2    (tlu_update_pstate_l_w2[3:0]),
1013 
             .tlu_trp_lvl               (tlu_trp_lvl[2:0]),
1014 
             .tlu_pil                   (tlu_pil[3:0]),
1015 
             .tlu_wsr_inst_nq_g         (tlu_wsr_inst_nq_g),
1016 
             .tlu_wr_tsa_inst_w2                (tlu_wr_tsa_inst_w2),
1017 
             .tlu_exu_cwp_retry_m       (tlu_exu_cwp_retry_m),
1018 
             .tlu_exu_cwpccr_update_m   (tlu_exu_cwpccr_update_m),
1019 
             .tlu_lsu_asi_update_m      (tlu_lsu_asi_update_m),
1020 
             .tlu_lsu_tid_m             (tlu_lsu_tid_m[1:0]),
1021 
             .tlu_select_tba_w2         (tlu_select_tba_w2),
1022 
             .tdp_select_tba_w2         (tdp_select_tba_w2),
1023 
             .tlu_set_sftint_l_g        (tlu_set_sftint_l_g),
1024 
             .tlu_clr_sftint_l_g        (tlu_clr_sftint_l_g),
1025 
             .tlu_wr_sftint_l_g         (tlu_wr_sftint_l_g),
1026 
             .tlu_sftint_en_l_g         (tlu_sftint_en_l_g[`TLU_THRD_NUM-1:0]),
1027 
             .tlu_sftint_mx_sel         (tlu_sftint_mx_sel[`TLU_THRD_NUM-1:0]),
1028 
             .tlu_sftint_penc_sel       (tlu_sftint_penc_sel[`TLU_THRD_NUM-1:0]),
1029 
             .tlu_sftint_vld            (tlu_sftint_vld[`TLU_THRD_NUM-1:0]),
1030 
             .tlu_hintp_vld                 (tlu_hintp_vld[`TLU_THRD_NUM-1:0]),
1031 
             .tlu_rerr_vld                  (tlu_rerr_vld[`TLU_THRD_NUM-1:0]),
1032 
             .tlu_int_tid_m                 (tlu_int_tid_m[1:0]),
1033 
             .tlu_incr_tick                 (tlu_incr_tick[1:0]),
1034 
             .tlu_tckctr_in                 (tlu_tckctr_in[1:0]),
1035 
             .tlu_tickcmp_sel           (tlu_tickcmp_sel[`TLU_THRD_NUM-1:0]),
1036 
             .immu_sfsr_trp_wr          (immu_sfsr_trp_wr[3:0]),
1037 
             .tlu_isfsr_din_g           (tlu_isfsr_din_g[23:0]),
1038 
             .tlu_tick_npt                  (tlu_tick_npt),
1039 
             .tlu_thrd_rsel_e           (tlu_thrd_rsel_e[3:0]),
1040 
             .tlu_inst_vld_nq_m         (tlu_inst_vld_nq_m),
1041 
             .tlu_lsu_pstate_am         (tlu_lsu_pstate_am[3:0]),
1042 
         .tlu_hyperv_rdpr_sel   (tlu_hyperv_rdpr_sel[4:0]),
1043 
             .tlu_rdpr_mx1_sel          (tlu_rdpr_mx1_sel[2:0]),
1044 
             .tlu_rdpr_mx2_sel          (tlu_rdpr_mx2_sel[2:0]),
1045 
             .tlu_rdpr_mx3_sel          (tlu_rdpr_mx3_sel[1:0]),
1046 
             .tlu_rdpr_mx4_sel          (tlu_rdpr_mx4_sel[1:0]),
1047 
             .tlu_rdpr_mx5_sel          (tlu_rdpr_mx5_sel[2:0]),
1048 
             .tlu_rdpr_mx6_sel          (tlu_rdpr_mx6_sel[2:0]),
1049 
             .tlu_rdpr_mx7_sel          (tlu_rdpr_mx7_sel[3:0]),
1050 
             .tlu_lsu_redmode_rst_d1 (tlu_lsu_redmode_rst_d1[3:0]),
1051 
             .lsu_tlu_rsr_data_mod_e    (lsu_tlu_rsr_data_mod_e[7:0]),
1052 
             .tlu_addr_msk_g            (tlu_addr_msk_g),
1053 
         .tlu_stickcmp_en_l (tlu_stickcmp_en_l[`TLU_THRD_NUM-1:0]),
1054 
         .tlu_htickcmp_en_l (tlu_htickcmp_en_l[`TLU_THRD_NUM-1:0]),
1055 
         .tlu_htstate_rw_d (tlu_htstate_rw_d),
1056 
         .tlu_htstate_rw_g (tlu_htstate_rw_g),
1057 
         .tlu_dnrtry0_inst_g (tlu_dnrtry0_inst_g),
1058 
         .tlu_dnrtry1_inst_g (tlu_dnrtry1_inst_g),
1059 
         .tlu_dnrtry2_inst_g (tlu_dnrtry2_inst_g),
1060 
         .tlu_dnrtry3_inst_g (tlu_dnrtry3_inst_g),
1061 
         .tlu_thrd_traps_w2 (tlu_thrd_traps_w2[`TLU_THRD_NUM-1:0]),
1062 
         .tlu_tick_ctl_din (tlu_tick_ctl_din),
1063 
         .tlu_por_rstint_g (tlu_por_rstint_g[`TLU_THRD_NUM-1:0]),
1064 
         .tlu_pc_mxsel_w2 (tlu_pc_mxsel_w2),
1065 
             .ifu_npc_w             (ifu_npc_w[48:0]),
1066 
             .tlu_rst                   (tlu_rst),
1067 
             // .tlu_rst_l                      (tlu_rst_l),
1068 
         .tlu_sscan_tcl_data (tlu_sscan_test_data[`TCL_SSCAN_HI:`TCL_SSCAN_LO]),
1069 
             // Inputs
1070 
             .ifu_tlu_npc_m                 (ifu_tlu_npc_m[48:0]),
1071 
             .ifu_tlu_pc_oor_e          (ifu_tlu_pc_oor_e),
1072 
         .lsu_tlu_early_flush_w (lsu_tlu_early_flush_w),
1073 
         .ifu_tlu_flush_fd_w    (ifu_tlu_flush_fd2_w),
1074 
             .ifu_tlu_sraddr_d          (ifu_tlu_sraddr_d[`TLU_ASR_ADDR_WIDTH-1:0]),
1075 
             .ifu_tlu_rsr_inst_d        (ifu_tlu_rsr_inst_d),
1076 
             .lsu_tlu_wsr_inst_e        (lsu_tlu_wsr_inst_e),
1077 
             .tlu_wsr_data_w        (tlu_wsr_data_w[3:0]),
1078 
             .lsu_tlu_ttype_m2          (lsu_tlu_ttype_m2[8:0]),
1079 
             .lsu_tlu_ttype_vld_m2      (lsu_tlu_ttype_vld_m2),
1080 
             .ifu_tlu_done_inst_d       (ifu_tlu_done_inst_d),
1081 
             .ifu_tlu_retry_inst_d      (ifu_tlu_retry_inst_d),
1082 
             .ifu_tlu_ttype_m           (ifu_tlu_ttype_m[8:0]),
1083 
             .ifu_tlu_ttype_vld_m       (ifu_tlu_ttype_vld_m),
1084 
             .ifu_tlu_trap_m        (ifu_tlu_trap_m),
1085 
             .exu_tlu_ttype_m           (exu_tlu_ttype_m[8:0]),
1086 
             .exu_tlu_ttype_vld_m       (exu_tlu_ttype_vld_m),
1087 
             .exu_tlu_ue_trap_m (exu_tlu_ue_trap_m),
1088 
             .exu_tlu_spill             (exu_tlu_spill),
1089 
             .exu_tlu_spill_tid         (exu_tlu_spill_tid[1:0]),
1090 
         .exu_tlu_spill_other   (exu_tlu_spill_other),
1091 
         .exu_tlu_spill_wtype   (exu_tlu_spill_wtype),
1092 
             .exu_tlu_va_oor_m          (exu_tlu_va_oor_m),
1093 
             .exu_tlu_va_oor_jl_ret_m   (exu_tlu_va_oor_jl_ret_m),
1094 
         .tlu_cwp_no_change_m   (tlu_cwp_no_change_m),
1095 
         .tlu_trap_cwp_en   (tlu_trap_cwp_en[`TLU_THRD_NUM-1:0]),
1096 
             .ifu_tlu_sir_inst_m        (ifu_tlu_sir_inst_m),
1097 
             .ifu_tlu_inst_vld_m        (ifu_tlu_inst_vld_m),
1098 
             .ifu_tlu_thrid_d           (ifu_tlu_thrid_d[1:0]),
1099 
         .lsu_tlu_async_ttype_vld_g (lsu_tlu_async_ttype_vld_g),
1100 
         .lsu_tlu_defr_trp_taken_g (lsu_tlu_defr_trp_taken_g),
1101 
         .lsu_tlu_async_ttype_g (lsu_tlu_async_ttype_g),
1102 
         .lsu_tlu_async_tid_g (lsu_tlu_async_tid_g[1:0]),
1103 
             .ifu_tlu_immu_miss_m       (ifu_tlu_immu_miss_m),
1104 
             .exu_tlu_cwp_cmplt         (exu_tlu_cwp_cmplt),
1105 
             .exu_tlu_cwp_retry         (exu_tlu_cwp_retry),
1106 
             .exu_tlu_cwp_cmplt_tid     (exu_tlu_cwp_cmplt_tid[1:0]),
1107 
             .ifu_tlu_rstint_m          (ifu_tlu_rstint_m),
1108 
             .ifu_tlu_hwint_m           (ifu_tlu_hwint_m),
1109 
             .ifu_tlu_swint_m           (ifu_tlu_swint_m),
1110 
             .int_tlu_rstid_m           (int_tlu_rstid_m[5:0]),
1111 
             .tlu_int_pstate_ie         (local_pstate_ie[3:0]),
1112 
             .tlu_int_redmode           (tlu_int_redmode[3:0]),
1113 
             .tlu_sftint_id             (tlu_sftint_id[3:0]),
1114 
             .lsu_tlu_misalign_addr_ldst_atm_m(lsu_tlu_misalign_addr_ldst_atm_m),
1115 
             .exu_tlu_misalign_addr_jmpl_rtn_m(exu_tlu_misalign_addr_jmpl_rtn_m),
1116 
             .lsu_tlu_priv_action_g     (lsu_tlu_priv_action_g),
1117 
             .lsu_tlu_wtchpt_trp_g      (lsu_tlu_wtchpt_trp_g),
1118 
             .ifu_tlu_priv_violtn_m     (ifu_tlu_priv_violtn_m),
1119 
             .ifu_lsu_memref_d          (ifu_lsu_memref_d),
1120 
             .tlu_pstate_priv           (local_pstate_priv[`TLU_THRD_NUM-1:0]),
1121 
             .tlu_pstate_am             (tlu_pstate_am[3:0]),
1122 
             .tlu_isfsr_flt_vld         (tlu_isfsr_flt_vld[3:0]),
1123 
             .ffu_tlu_trap_ieee754      (ffu_tlu_trap_ieee754),
1124 
             .ffu_tlu_trap_other        (ffu_tlu_trap_other),
1125 
             .ffu_tlu_trap_ue       (ffu_tlu_trap_ue),
1126 
             .ffu_ifu_tid_w2            (ffu_ifu_tid_w2[1:0]),
1127 
             .ffu_tlu_ill_inst_m                (ffu_tlu_ill_inst_m), // new trap from ffu
1128 
             .lsu_tlu_rsr_data_e        (lsu_tlu_rsr_data_e[7:0]),
1129 
             .lsu_tlu_squash_va_oor_m   (lsu_tlu_squash_va_oor_m),
1130 
             .tlu_hpstate_priv (tcl_hpstate_priv[`TLU_THRD_NUM-1:0]),
1131 
         .tlu_hscpd_dacc_excpt_m(tlu_hscpd_dacc_excpt_m),
1132 
         .tlu_qtail_dacc_excpt_m(tlu_qtail_dacc_excpt_m),
1133 
         .tlu_htickcmp_rw_e (tlu_htickcmp_rw_e),
1134 
         // .tlu_gl_rw_g (tlu_gl_rw_g),
1135 
         .tlu_gl_rw_m (tlu_gl_rw_m),
1136 
         .tlu_hpstate_enb  (tcl_hpstate_enb[`TLU_THRD_NUM-1:0]),
1137 
         .tlu_hpstate_tlz  (tlu_hpstate_tlz[`TLU_THRD_NUM-1:0]),
1138 
             .ctu_sscan_tid    (ctu_sscan_tid[`TLU_THRD_NUM-1:0]),
1139 
         .se         (se),
1140 
             .rclk               (rclk),
1141 
             .grst_l     (grst_l),
1142 
             .arst_l     (arst_l),
1143 
             .rst_tri_en (mux_drive_disable));
1144 
 
1145 
tlu_tdp tdp (
1146 
             .so                        (scan1_2),
1147 
             .si                        (scan1_1),
1148 
             .tsa_rdata     ({tsa1_dout[`TSA1_HTSTATE_HI:`TSA1_HTSTATE_LO],
1149 
                         // tsa0_dout[`TSA0_TPC_HI:`TSA0_TPC_LO],
1150 
                         // tsa1_dout[`TSA1_TNPC_HI:`TSA1_TNPC_LO],
1151 
                         tsa0_dout[`TSA0_TPC_HI-1:`TSA0_TPC_LO],
1152 
                         tsa1_dout[`TSA1_TNPC_HI-1:`TSA1_TNPC_LO],
1153 
                         tsa0_dout[`TSA0_TSTATE_HI:`TSA0_TSTATE_LO],
1154 
                         tsa1_dout[`TSA1_TTYPE_HI:`TSA1_TTYPE_LO]}),
1155 
             .lsu_tlu_rsr_data_e (lsu_tlu_rsr_data_mod_e[7:0]),
1156 
         .ifu_lsu_imm_asi_d           (ifu_lsu_imm_asi_d[7:0]),
1157 
         .ifu_lsu_imm_asi_vld_d       (ifu_lsu_imm_asi_vld_d),
1158 
             .tlu_lsu_redmode           (tlu_lsu_redmode[3:0]),
1159 
         .tlu_exu_rsr_data_m    (tlu_exu_rsr_data_m[`TLU_ASR_DATA_WIDTH-1:0]),
1160 
         /*AUTOINST*/
1161 
             // Outputs
1162 
         // modified for bug 3017
1163 
         .tlu_restore_pc_w1 (tlu_restore_pc_w1[48:0]),
1164 
         .tlu_restore_npc_w1 (tlu_restore_npc_w1[48:0]),
1165 
             .tlu_partial_trap_pc_w1 (tlu_partial_trap_pc_w1[33:0]),
1166 
             .tlu_pib_rsr_data_e        (tlu_pib_rsr_data_e[63:0]),
1167 
         .tlu_asi_state_e       (tlu_asi_state_e[`TLU_ASI_STATE_WIDTH-1:0]),
1168 
             .tsa_wdata                     (tsa_wdata[`TLU_TSA_WIDTH-1:0]),
1169 
             .tlu_int_pstate_ie         (tlu_int_pstate_ie[3:0]),
1170 
             .local_pstate_ie       (local_pstate_ie[3:0]),
1171 
             .tlu_ifu_pstate_pef        (tlu_ifu_pstate_pef[3:0]),
1172 
             .tlu_lsu_pstate_cle        (tlu_lsu_pstate_cle[3:0]),
1173 
             .tlu_lsu_pstate_priv       (tlu_lsu_pstate_priv[3:0]),
1174 
             .tlu_int_redmode           (tlu_int_redmode[3:0]),
1175 
             .local_pstate_priv         (local_pstate_priv[`TLU_THRD_NUM-1:0]),
1176 
             .tlu_pstate_am             (tlu_pstate_am[3:0]),
1177 
             .tlu_sftint_id             (tlu_sftint_id[3:0]),
1178 
             .tlu_tick_incr_din         (tlu_tick_incr_din[61:0]),
1179 
             .tlu_sscan_test_data  (tlu_sscan_test_data[`TDP_SSCAN_WIDTH-1:0]),
1180 
         .tlu_dnrtry_global_g  (tlu_dnrtry_global_g[`TSA_GLOBAL_WIDTH-1:0]),
1181 
         .tlu_hpstate_enb  (tlu_hpstate_enb[`TLU_THRD_NUM-1:0]),
1182 
         .local_hpstate_enb  (local_hpstate_enb[`TLU_THRD_NUM-1:0]),
1183 
         .tcl_hpstate_enb  (tcl_hpstate_enb[`TLU_THRD_NUM-1:0]),
1184 
         .tlu_hpstate_tlz  (tlu_hpstate_tlz[`TLU_THRD_NUM-1:0]),
1185 
         .tlu_hpstate_priv  (tlu_hpstate_priv[`TLU_THRD_NUM-1:0]),
1186 
         .local_hpstate_priv  (local_hpstate_priv[`TLU_THRD_NUM-1:0]),
1187 
         .tcl_hpstate_priv  (tcl_hpstate_priv[`TLU_THRD_NUM-1:0]),
1188 
         .tlu_hpstate_ibe  (tlu_hpstate_ibe[`TLU_THRD_NUM-1:0]),
1189 
         .tlu_hintp        (tlu_hintp),
1190 
             // Inputs
1191 
         .tlu_ibrkpt_trap_w2 (tlu_ibrkpt_trap_w2),
1192 
         .pib_picl_wrap      (pib_picl_wrap[`TLU_THRD_NUM-1:0]),
1193 
         .pib_pich_wrap      (pib_pich_wrap[`TLU_THRD_NUM-1:0]),
1194 
         .tlu_por_rstint_g  (tlu_por_rstint_g[`TLU_THRD_NUM-1:0]),
1195 
             .rclk                          (rclk),
1196 
             .tlu_rst                   (tlu_rst),
1197 
         .tlu_trap_hpstate_enb  (tlu_trap_hpstate_enb),
1198 
             .tlu_thrd_wsel_w2          (tlu_thrd_wsel_w2[`TLU_THRD_NUM-1:0]),
1199 
             .tlu_final_ttype_w2                (tlu_final_ttype_w2[`TSA_TTYPE_WIDTH-1:0]),
1200 
             .tlu_pstate_din_sel0       (tlu_pstate_din_sel0[1:0]),
1201 
             .tlu_pstate_din_sel1       (tlu_pstate_din_sel1[1:0]),
1202 
             .tlu_pstate_din_sel2       (tlu_pstate_din_sel2[1:0]),
1203 
             .tlu_pstate_din_sel3       (tlu_pstate_din_sel3[1:0]),
1204 
             .tlu_wr_tsa_inst_w2                (tlu_wr_tsa_inst_w2),
1205 
             .lsu_asi_reg0              (lsu_asi_reg0[7:0]),
1206 
             .lsu_asi_reg1              (lsu_asi_reg1[7:0]),
1207 
             .lsu_asi_reg2              (lsu_asi_reg2[7:0]),
1208 
             .lsu_asi_reg3              (lsu_asi_reg3[7:0]),
1209 
             .tlu_tickcmp_sel           (tlu_tickcmp_sel[`TLU_THRD_NUM-1:0]),
1210 
             .exu_tlu_ccr0_w            (exu_tlu_ccr0_w[7:0]),
1211 
             .exu_tlu_ccr1_w            (exu_tlu_ccr1_w[7:0]),
1212 
             .exu_tlu_ccr2_w            (exu_tlu_ccr2_w[7:0]),
1213 
             .exu_tlu_ccr3_w            (exu_tlu_ccr3_w[7:0]),
1214 
             .exu_tlu_cwp0              (exu_tlu_cwp0[2:0]),
1215 
             .exu_tlu_cwp1              (exu_tlu_cwp1[2:0]),
1216 
             .exu_tlu_cwp2              (exu_tlu_cwp2[2:0]),
1217 
             .exu_tlu_cwp3              (exu_tlu_cwp3[2:0]),
1218 
         .tlu_trap_cwp_en   (tlu_trap_cwp_en[`TLU_THRD_NUM-1:0]),
1219 
         // modified for bug 3017
1220 
             // .ifu_tlu_pc_m           (ifu_tlu_pc_m[48:0]),
1221 
             // .ifu_tlu_npc_m          (ifu_tlu_npc_m[48:0]),
1222 
         .tlu_pc_new_w          (tlu_pc_new_w[48:0]),
1223 
         .tlu_npc_new_w         (tlu_npc_new_w[48:0]),
1224 
             .tlu_sftint_en_l_g         (tlu_sftint_en_l_g[`TLU_THRD_NUM-1:0]),
1225 
             .tlu_sftint_mx_sel         (tlu_sftint_mx_sel[`TLU_THRD_NUM-1:0]),
1226 
             .tlu_set_sftint_l_g        (tlu_set_sftint_l_g),
1227 
             .tlu_clr_sftint_l_g        (tlu_clr_sftint_l_g),
1228 
             .tlu_wr_sftint_l_g         (tlu_wr_sftint_l_g),
1229 
             .tlu_sftint_penc_sel       (tlu_sftint_penc_sel[3:0]),
1230 
             .tlu_tba_en_l              (tlu_tba_en_l[3:0]),
1231 
             .tlu_tick_en_l             (tlu_tick_en_l),
1232 
             .tlu_tickcmp_en_l          (tlu_tickcmp_en_l[3:0]),
1233 
             // .tlu_done_inst_m                (tlu_done_inst_m),
1234 
             // .tlu_dnrtry_inst_m              (tlu_dnrtry_inst_m),
1235 
             // .tlu_dnrtry_inst_m_l            (tlu_dnrtry_inst_m_l),
1236 
             .tlu_update_pc_l_w         (tlu_update_pc_l_w[3:0]),
1237 
             .tlu_tl_gt_0_w2            (tlu_tl_gt_0_w2),
1238 
             .tlu_select_tba_w2         (tdp_select_tba_w2),
1239 
             .tlu_select_redmode        (tlu_select_redmode),
1240 
             .tlu_update_pstate_l_w2    (tlu_update_pstate_l_w2[3:0]),
1241 
             .tlu_pil                   (tlu_pil[3:0]),
1242 
             .tlu_trp_lvl               (tlu_trp_lvl[2:0]),
1243 
             .tlu_tick_npt                  (tlu_tick_npt),
1244 
             .tlu_thrd_rsel_e           (tlu_thrd_rsel_e[3:0]),
1245 
             .tlu_tick_incr_dout        (tlu_incr64_dout[60:0]),
1246 
             .tlu_rdpr_mx1_sel          (tlu_rdpr_mx1_sel[2:0]),
1247 
             .tlu_rdpr_mx2_sel          (tlu_rdpr_mx2_sel[2:0]),
1248 
             .tlu_rdpr_mx3_sel          (tlu_rdpr_mx3_sel[1:0]),
1249 
             .tlu_rdpr_mx4_sel          (tlu_rdpr_mx4_sel[1:0]),
1250 
             .tlu_rdpr_mx5_sel          (tlu_rdpr_mx5_sel[2:0]),
1251 
             .tlu_rdpr_mx6_sel          (tlu_rdpr_mx6_sel[2:0]),
1252 
             .tlu_rdpr_mx7_sel          (tlu_rdpr_mx7_sel[3:0]),
1253 
             .ctu_sscan_tid          (ctu_sscan_tid[`TLU_THRD_NUM-1:0]),
1254 
         .tlu_gl_lvl0  (tlu_gl_lvl0[`TSA_GLOBAL_WIDTH-1:0]),
1255 
         .tlu_gl_lvl1  (tlu_gl_lvl1[`TSA_GLOBAL_WIDTH-1:0]),
1256 
         .tlu_gl_lvl2  (tlu_gl_lvl2[`TSA_GLOBAL_WIDTH-1:0]),
1257 
         .tlu_gl_lvl3  (tlu_gl_lvl3[`TSA_GLOBAL_WIDTH-1:0]),
1258 
         .tlu_hpstate_din_sel0  (tlu_hpstate_din_sel0[1:0]),
1259 
         .tlu_hpstate_din_sel1  (tlu_hpstate_din_sel1[1:0]),
1260 
         .tlu_hpstate_din_sel2  (tlu_hpstate_din_sel2[1:0]),
1261 
         .tlu_hpstate_din_sel3  (tlu_hpstate_din_sel3[1:0]),
1262 
         .tlu_htba_en_l  (tlu_htba_en_l[`TLU_THRD_NUM-1:0]),
1263 
         .tlu_htickcmp_en_l  (tlu_htickcmp_en_l[`TLU_THRD_NUM-1:0]),
1264 
         .tlu_htickcmp_intdis  (tlu_htickcmp_intdis),
1265 
         .tlu_pc_mxsel_w2 (tlu_pc_mxsel_w2),
1266 
         .tlu_set_hintp_sel_g  (tlu_set_hintp_sel_g[`TLU_THRD_NUM-1:0]),
1267 
         .tlu_stickcmp_en_l  (tlu_stickcmp_en_l[`TLU_THRD_NUM-1:0]),
1268 
         .tlu_update_hpstate_l_w2  (tlu_update_hpstate_l_w2[`TLU_THRD_NUM-1:0]),
1269 
         .tlu_wr_hintp_g  (tlu_wr_hintp_g[`TLU_THRD_NUM-1:0]),
1270 
         .tlu_wsr_data_w        (tlu_wsr_data_w[`TLU_ASR_DATA_WIDTH-1:0]),
1271 
             .se                        (se));
1272 
 
1273 
// modified for Niagara SRAMs methodology
1274 
 
1275 
bw_r_rf32x80 tsa0 (
1276 
             // Outputs
1277 
             .dout           (tsa0_dout[`TSA_MEM_WIDTH-1:0]),
1278 
         .so         (short_scan0_1),
1279 
             // Inputs
1280 
             .wr_adr     ({tsa_wr_tid[1:0],tsa_wr_tpl[2:0]}),
1281 
             .wr_en              (tsa_wr_vld[0]),
1282 
             .nib_wr_en  ({{12{tsa_pc_en}},
1283 
                      { 8{tsa_tstate_en}}}),
1284 
             .rd_adr     ({tsa_rd_tid[1:0],tsa_rd_tpl[2:0]}),
1285 
             .rd_en              (tsa_rd_en),
1286 
             .din                ({1'b0, tsa_wdata[`TLU_PC_HI:`TLU_PC_LO],
1287 
                       3'b0, tsa_wdata[`TLU_GL_HI:`TLU_CWP_LO]}),
1288 
         .reset_l    (arst_l),
1289 
         .rst_tri_en (mem_write_disable),
1290 
         .sehold     (sehold),
1291 
         .se         (se),
1292 
         .si         (short_si0),
1293 
         .rclk       (rclk));
1294 
 
1295 
bw_r_rf32x80 tsa1 (
1296 
             // Outputs
1297 
             .dout           (tsa1_dout[`TSA_MEM_WIDTH-1:0]),
1298 
         .so         (short_scan0_2),
1299 
             // Inputs
1300 
             .wr_adr     ({tsa_wr_tid[1:0],tsa_wr_tpl[2:0]}),
1301 
             .wr_en              (tsa_wr_vld[1]),
1302 
             .nib_wr_en  ({ 4'h0, // unused
1303 
                      { 1{tsa_htstate_en}},
1304 
                      {12{tsa_npc_en}},
1305 
                      { 3{tsa_ttype_en}}}),
1306 
             .rd_adr     ({tsa_rd_tid[1:0],tsa_rd_tpl[2:0]}),
1307 
             .rd_en              (tsa_rd_en),
1308 
             .din                ({16'h0000, // unused bits
1309 
                       tsa_wdata[`TLU_HTSTATE_HI:`TLU_HTSTATE_LO],
1310 
                       1'b0, tsa_wdata[`TLU_NPC_HI:`TLU_NPC_LO],
1311 
                       3'b0, tsa_wdata[`TLU_TT_HI:`TLU_TT_LO]}),
1312 
         .reset_l    (arst_l),
1313 
         .rst_tri_en (mem_write_disable),
1314 
         .sehold     (sehold),
1315 
         .se         (se),
1316 
         .si         (short_scan0_1),
1317 
         .rclk       (rclk));
1318 
 
1319 
// replaced with softmacro from the library
1320 
tlu_incr64      tick_incr64 (
1321 
                  .out  ({tlu_incr64_dout[61:0], tlu_tckctr_in[1:0]}),
1322 
                  .in   ({tlu_tick_incr_din[61:0], tlu_incr_tick[1:0]})
1323 
);
1324 
/*
1325 
zzinc64 tick_incr64 (
1326 
                  .out  ({tlu_incr64_dout[61:0], tlu_tckctr_in[1:0]}),
1327 
                  .in   ({tlu_tick_incr_din[61:0], tlu_incr_tick[1:0]})
1328 
);
1329 
*/
1330 
 
1331 
tlu_mmu_ctl mmu_ctl (
1332 
                                 .so            (so0),
1333 
                     .si(scan0_1),
1334 
                     .lsu_tlu_st_rs3_data_b12t0_g(lsu_tlu_st_rs3_data_g[12:0]),
1335 
                     .lsu_tlu_st_rs3_data_b48_g(lsu_tlu_st_rs3_data_g[48]),
1336 
                     //.lsu_tlu_st_rs3_data_b10t8_g(lsu_tlu_st_rs3_data_g[10:8]),
1337 
                     .tlu_sun4r_tte_g   (tlu_sun4r_tte_g),
1338 
                     .ifu_tlu_flush_m   (ifu_tlu_flush_m),
1339 
                     .tlu_mmu_early_flush_pipe_w (tlu_exu_early_flush_pipe_w),
1340 
                     .lsu_mmu_early_flush_w (lsu_tlu_early_flush_w),
1341 
                     .lsu_mmu_flush_pipe_w (lsu_mmu_flush_pipe_w),
1342 
                     .dmmu_sfsr_trp_wr  (lsu_dmmu_sfsr_trp_wr[3:0]),
1343 
                     .rst_tri_en        (mux_drive_disable),
1344 
                     .ifu_tlu_priv_violtn_m     (ifu_tlu_priv_violtn_m),
1345 
                     // MMU_ASI_RD_CHANGE
1346 
                     .lsu_exu_ldxa_m    (lsu_exu_ldxa_m),
1347 
                     .ifu_lsu_memref_d  (ifu_lsu_memref_d),
1348 
                     .ifu_lsu_imm_asi_d (ifu_lsu_imm_asi_d[8:0]),
1349 
                     .ifu_lsu_thrid_s   (ifu_lsu_thrid_s[1:0]),
1350 
                     .lsu_asi_reg0      (lsu_asi_reg0[7:0]),
1351 
                     .lsu_asi_reg1      (lsu_asi_reg1[7:0]),
1352 
                     .lsu_asi_reg2      (lsu_asi_reg2[7:0]),
1353 
                     .lsu_asi_reg3      (lsu_asi_reg3[7:0]),
1354 
                     .tlu_lng_ltncy_en_l(tlu_lng_ltncy_en_l),
1355 
                     .tlu_tsb_rd_ps0_sel (tlu_tsb_rd_ps0_sel),
1356 
                     .tlu_tsb_base_w2_d1 (tlu_tsb_base_w2_d1[47:13]),
1357 
                     .tlu_lsu_pstate_am (tlu_lsu_pstate_am[3:0]),
1358 
                     .exu_tlu_va_oor_m  (exu_tlu_va_oor_m),
1359 
                     .exu_tlu_va_oor_jl_ret_m   (exu_tlu_va_oor_jl_ret_m),
1360 
                     .tlu_lsu_tl_zero   (tlu_lsu_tl_zero[3:0]),
1361 
                     .lsu_mmu_defr_trp_taken_g (lsu_mmu_defr_trp_taken_g),
1362 
                     /*AUTOINST*/
1363 
                     // Outputs
1364 
                     .tlu_tlb_access_en_l_d1 (tlu_tlb_access_en_l_d1),
1365 
                     .mra_byte_wen      (mra_byte_wen[19:0]),
1366 
                     .tlu_tag_access_ctxt_sel_m (tlu_tag_access_ctxt_sel_m[2:0]),
1367 
                     .tlu_tlb_tag_invrt_parity(tlu_tlb_tag_invrt_parity),
1368 
                     .tlu_tlb_data_invrt_parity(tlu_tlb_data_invrt_parity),
1369 
                     .lsu_ifu_inj_ack   (lsu_ifu_inj_ack[3:0]),
1370 
                     .dmmu_any_sfsr_wr  (dmmu_any_sfsr_wr),
1371 
                     .dmmu_sfsr_wr_en_l (dmmu_sfsr_wr_en_l[3:0]),
1372 
                     .dmmu_sfar_wr_en_l (dmmu_sfar_wr_en_l[3:0]),
1373 
                     .immu_any_sfsr_wr  (immu_any_sfsr_wr),
1374 
                     .immu_sfsr_wr_en_l (immu_sfsr_wr_en_l[3:0]),
1375 
                     .tlu_tte_tag_g     (tlu_tte_tag_g[2:0]),
1376 
                     .tlu_dtlb_rw_index_vld_g(tlu_dtlb_rw_index_vld_g),
1377 
                     .tlu_dtlb_rw_index_g(tlu_dtlb_rw_index_g[5:0]),
1378 
                     .tlu_dtlb_data_rd_g(tlu_dtlb_data_rd_g),
1379 
                     .tlu_dtlb_tag_rd_g (tlu_dtlb_tag_rd_g),
1380 
                     .tlu_itlb_rw_index_vld_g(tlu_itlb_rw_index_vld_g),
1381 
                     .tlu_itlb_wr_vld_g (tlu_itlb_wr_vld_g),
1382 
                     .itlb_wr_vld_g     (itlb_wr_vld_g),
1383 
                     .tlu_itlb_rw_index_g(tlu_itlb_rw_index_g[5:0]),
1384 
                     .tlu_itlb_data_rd_g(tlu_itlb_data_rd_g),
1385 
                     .tlu_itlb_tag_rd_g (tlu_itlb_tag_rd_g),
1386 
                     .tlu_idtsb_8k_ptr  (tlu_idtsb_8k_ptr[47:0]),
1387 
                     .tlu_dtlb_invalidate_all_g(tlu_dtlb_invalidate_all_g),
1388 
                     .tlu_itlb_invalidate_all_g(tlu_itlb_invalidate_all_g),
1389 
                     .tlu_slxa_thrd_sel (tlu_slxa_thrd_sel[3:0]),
1390 
                     .tlu_lsu_ldxa_tid_w2(tlu_lsu_ldxa_tid_w2[1:0]),
1391 
                     .tlu_itlb_dmp_vld_g(tlu_itlb_dmp_vld_g),
1392 
                     .tlu_itlb_dmp_all_g(tlu_itlb_dmp_all_g),
1393 
                     .tlu_itlb_dmp_actxt_g(tlu_itlb_dmp_actxt_g),
1394 
                     .tlu_itlb_dmp_nctxt_g(tlu_itlb_dmp_nctxt_g),
1395 
                     .tlu_dtlb_dmp_vld_g(tlu_dtlb_dmp_vld_g),
1396 
                     //.tlu_dtlb_dmp_by_ctxt_g(tlu_dtlb_dmp_by_ctxt_g),
1397 
                     .tlu_dtlb_dmp_all_g(tlu_dtlb_dmp_all_g),
1398 
                     .tlu_dtlb_dmp_pctxt_g(tlu_dtlb_dmp_pctxt_g),
1399 
                     .tlu_dtlb_dmp_sctxt_g(tlu_dtlb_dmp_sctxt_g),
1400 
                     .tlu_dtlb_dmp_nctxt_g(tlu_dtlb_dmp_nctxt_g),
1401 
                     .tlu_dtlb_dmp_actxt_g(tlu_dtlb_dmp_actxt_g),
1402 
                     .tlu_idtlb_dmp_thrid_g(tlu_idtlb_dmp_thrid_g[1:0]),
1403 
                     .tlu_dmp_key_vld_g (tlu_dmp_key_vld_g[4:0]),
1404 
                     .tlu_int_asi_load  (tlu_int_asi_load),
1405 
                     // .tlu_int_asi_store      (tlu_int_asi_store),
1406 
                     .tlu_int_asi_thrid (tlu_int_asi_thrid[1:0]),
1407 
                     .tlu_int_asi_vld   (tlu_int_asi_vld),
1408 
                     .tlb_access_rst_l  (tlb_access_rst_l),
1409 
                     .tlu_lsu_stxa_ack  (tlu_lsu_stxa_ack),
1410 
                     .tlu_lsu_stxa_ack_tid(tlu_lsu_stxa_ack_tid[1:0]),
1411 
                     .mra_wr_ptr        (mra_wr_ptr[3:0]),
1412 
                     .mra_rd_ptr        (mra_rd_ptr[3:0]),
1413 
                     .mra_wr_vld        (mra_wr_vld),
1414 
                     .mra_rd_vld        (mra_rd_vld),
1415 
                     .tag_access_wdata_sel(tag_access_wdata_sel[2:0]),
1416 
                     .tlu_admp_key_sel  (tlu_admp_key_sel),
1417 
                     // .tlu_mmu_sync_data_excp_g(tlu_mmu_sync_data_excp_g),
1418 
                     .tlu_tte_wr_pid_g  (tlu_tte_wr_pid_g[2:0]),
1419 
                     .tlu_lsu_ldxa_async_data_vld(tlu_lsu_ldxa_async_data_vld),
1420 
                     .tlu_tte_real_g    (tlu_tte_real_g),
1421 
                     .tlu_ldxa_l1mx1_sel(tlu_ldxa_l1mx1_sel[3:0]),
1422 
                     .tlu_ldxa_l1mx2_sel(tlu_ldxa_l1mx2_sel[3:0]),
1423 
                     .tlu_ldxa_l2mx1_sel(tlu_ldxa_l2mx1_sel[2:0]),
1424 
                     // Inputs
1425 
                     .tlu_itag_acc_sel_g (tlu_itag_acc_sel_g),
1426 
                     .sehold            (sehold),
1427 
                     .spu_tlu_rsrv_illgl_m  (1'b0),
1428 
                     .ifu_mmu_trap_m    (ifu_mmu_trap_m),
1429 
                     .ffu_tlu_ill_inst_m(ffu_tlu_ill_inst_m),
1430 
                     .ifu_tlu_inst_vld_m (ifu_tlu_inst_vld_m_bf1),
1431 
                     .exu_lsu_priority_trap_m(exu_lsu_priority_trap_m),
1432 
                     .exu_mmu_early_va_e (exu_mmu_early_va_e[7:0]),
1433 
                     .tlu_tag_access_ctxt_g (tlu_tag_access_ctxt_g[12:0]),
1434 
                     .ifu_lsu_error_inj (ifu_lsu_error_inj[3:0]),
1435 
                     .lsu_tlu_nucleus_ctxt_m (lsu_tlu_nucleus_ctxt_m),
1436 
                     .lsu_tlu_tte_pg_sz_g (lsu_tlu_tte_pg_sz_g[2:0]),
1437 
                     .ifu_lsu_ld_inst_e (ifu_lsu_ld_inst_e),
1438 
                     .ifu_lsu_st_inst_e (ifu_lsu_st_inst_e),
1439 
                     .lsu_tlu_dmmu_miss_g(lsu_tlu_dmmu_miss_g),
1440 
                     .tlu_dtsb_split_w2 (tlu_dtsb_split_w2),
1441 
                     .tlu_dtsb_size_w2  (tlu_dtsb_size_w2[3:0]),
1442 
                     .tlu_dtag_access_w2(tlu_dtag_access_w2[47:13]),
1443 
                     .tlu_itsb_split_w2 (tlu_itsb_split_w2),
1444 
                     .tlu_itsb_size_w2  (tlu_itsb_size_w2[3:0]),
1445 
                     .tlu_ctxt_cfg_w2   (tlu_ctxt_cfg_w2[5:0]),
1446 
                     //.tlu_tag_access_nctxt_g(tlu_tag_access_nctxt_g),
1447 
                     .lsu_tlu_st_rs3_data_g(lsu_tlu_st_rs3_data_g[62:61]),
1448 
                     .ifu_tlu_immu_miss_m(ifu_tlu_immu_miss_m),
1449 
                     // .ifu_tlu_thrid_e        (ifu_tlu_thrid_e[1:0]),
1450 
                     .ifu_lsu_alt_space_e(ifu_lsu_alt_space_e),
1451 
                     .ifu_tlu_alt_space_d(ifu_tlu_alt_space_d),
1452 
                     .lsu_tlu_dtlb_done (lsu_tlu_dtlb_done),
1453 
                     .ifu_tlu_itlb_done (ifu_tlu_itlb_done),
1454 
                     .lsu_tlu_tlb_asi_state_m(lsu_tlu_tlb_asi_state_m[7:0]),
1455 
                     .lsu_tlu_tlb_ldst_va_m(lsu_tlu_tlb_ldst_va_m[10:0]),
1456 
                     .lsu_tlu_tlb_ld_inst_m(lsu_tlu_tlb_ld_inst_m),
1457 
                     .lsu_tlu_tlb_st_inst_m(lsu_tlu_tlb_st_inst_m),
1458 
                     .lsu_tlu_tlb_access_tid_m(lsu_tlu_tlb_access_tid_m[1:0]),
1459 
                     .immu_sfsr_trp_wr  (immu_sfsr_trp_wr[3:0]),
1460 
                     .lsu_tlu_daccess_excptn_g(lsu_tlu_daccess_excptn_g),
1461 
                     .lsu_tlu_daccess_prot_g(lsu_tlu_daccess_prot_g),
1462 
                     .lsu_pid_state0    (lsu_pid_state0[2:0]),
1463 
                     .lsu_pid_state1    (lsu_pid_state1[2:0]),
1464 
                     .lsu_pid_state2    (lsu_pid_state2[2:0]),
1465 
                     .lsu_pid_state3    (lsu_pid_state3[2:0]),
1466 
                     .rclk              (rclk),
1467 
                     .se                (se),
1468 
                     .grst_l            (grst_l),
1469 
                     .arst_l            (arst_l));
1470 
 
1471 
/*
1472 
tlu_mmu_dp AUTO_TEMPLATE ();
1473 
*/
1474 
 
1475 
 
1476 
tlu_mmu_dp mmu_dp (
1477 
           .so (short_scan0_3),
1478 
           .si (short_scan0_2),
1479 
                   .ifu_tlu_pc_m        (ifu_tlu_pc_m[47:13]),
1480 
                   .lsu_exu_ldxa_data_g (lsu_exu_ldxa_data_g[63:0]),
1481 
                   .tlu_dsfsr_din_g     (lsu_dsfsr_din_g[23:0]),
1482 
                   // MMU_ASI_RD_CHANGE
1483 
                   .tlu_lng_ltncy_en_l(tlu_lng_ltncy_en_l),
1484 
                   .tlu_tsb_rd_ps0_sel (tlu_tsb_rd_ps0_sel),
1485 
                   .tlu_tsb_base_w2_d1 (tlu_tsb_base_w2_d1[47:13]),
1486 
                   /*AUTOINST*/
1487 
                   // Outputs
1488 
                   .tlu_tag_access_ctxt_g (tlu_tag_access_ctxt_g[12:0]),
1489 
                   .tlu_ctxt_cfg_w2     (tlu_ctxt_cfg_w2[5:0]),
1490 
                   .tlu_dtsb_split_w2   (tlu_dtsb_split_w2),
1491 
                   .tlu_dtsb_size_w2    (tlu_dtsb_size_w2[3:0]),
1492 
                   .tlu_dtag_access_w2  (tlu_dtag_access_w2[47:13]),
1493 
                   .tlu_itsb_split_w2   (tlu_itsb_split_w2),
1494 
                   .tlu_itsb_size_w2    (tlu_itsb_size_w2[3:0]),
1495 
                   .tlu_itlb_tte_tag_w2 (tlu_itlb_tte_tag_w2[58:0]),
1496 
                   .tlu_itlb_tte_data_w2(tlu_itlb_tte_data_w2[42:0]),
1497 
                   .tlu_dtlb_tte_tag_w2 (tlu_dtlb_tte_tag_w2[58:0]),
1498 
                   .tlu_dtlb_tte_data_w2(tlu_dtlb_tte_data_w2[42:0]),
1499 
                   // .tlu_lsu_ldxa_data_w2(tlu_lsu_ldxa_data_w2[63:0]),
1500 
                   .tlu_idtlb_dmp_key_g (tlu_idtlb_dmp_key_g[40:0]),
1501 
                   .tlu_dsfsr_flt_vld   (tlu_dsfsr_flt_vld[3:0]),
1502 
                   .tlu_isfsr_flt_vld   (tlu_isfsr_flt_vld[3:0]),
1503 
                   //.tlu_tag_access_nctxt_g(tlu_tag_access_nctxt_g),
1504 
                   .mra_wdata           (mra_wdata[155:0]),
1505 
                   // Inputs
1506 
                   .tlu_tlb_access_en_l_d1 (tlu_tlb_access_en_l_d1),
1507 
                   .tlu_sun4r_tte_g     (tlu_sun4r_tte_g),
1508 
                   .tlu_tlb_tag_invrt_parity(tlu_tlb_tag_invrt_parity),
1509 
                   .tlu_tlb_data_invrt_parity(tlu_tlb_data_invrt_parity),
1510 
                   .tlu_addr_msk_g      (tlu_addr_msk_g),
1511 
                   .dmmu_any_sfsr_wr    (dmmu_any_sfsr_wr),
1512 
                   .dmmu_sfsr_wr_en_l   (dmmu_sfsr_wr_en_l[3:0]),
1513 
                   .immu_any_sfsr_wr    (immu_any_sfsr_wr),
1514 
                   .immu_sfsr_wr_en_l   (immu_sfsr_wr_en_l[3:0]),
1515 
                   .lsu_tlu_dside_ctxt_m(lsu_tlu_dside_ctxt_m[12:0]),
1516 
                   .lsu_tlu_pctxt_m     (lsu_tlu_pctxt_m[12:0]),
1517 
                   .tlu_tag_access_ctxt_sel_m(tlu_tag_access_ctxt_sel_m[2:0]),
1518 
                   .lsu_tlu_st_rs3_data_b63t59_g(lsu_tlu_st_rs3_data_g[63:59]),
1519 
                   .lsu_tlu_st_rs3_data_b47t0_g(lsu_tlu_st_rs3_data_g[47:0]),
1520 
                   .exu_lsu_ldst_va_e   (exu_lsu_ldst_va_e[`ASI_VA_WIDTH-1:0]),
1521 
                   .tlu_idtsb_8k_ptr    (tlu_idtsb_8k_ptr[47:0]),
1522 
                   .lsu_tlu_tlb_dmp_va_m(lsu_tlu_tlb_dmp_va_m[47:13]),
1523 
                   .tlu_slxa_thrd_sel   (tlu_slxa_thrd_sel[3:0]),
1524 
                   .tlu_tte_tag_g       (tlu_tte_tag_g[2:0]),
1525 
                   .tlu_dmp_key_vld_g   (tlu_dmp_key_vld_g[4:0]),
1526 
                   .tlb_access_rst_l    (tlb_access_rst_l),
1527 
                   .tag_access_wdata_sel(tag_access_wdata_sel[2:0]),
1528 
                   .mra_rdata           (mra_rdata[159:10]),
1529 
                   .tlu_admp_key_sel    (tlu_admp_key_sel),
1530 
                   .tlu_isfsr_din_g     (tlu_isfsr_din_g[23:0]),
1531 
                   .tlu_tte_wr_pid_g    (tlu_tte_wr_pid_g[2:0]),
1532 
                   .tlu_tte_real_g      (tlu_tte_real_g),
1533 
                   .tlu_ldxa_l1mx1_sel  (tlu_ldxa_l1mx1_sel[3:0]),
1534 
                   .tlu_ldxa_l1mx2_sel  (tlu_ldxa_l1mx2_sel[3:0]),
1535 
                   .tlu_ldxa_l2mx1_sel  (tlu_ldxa_l2mx1_sel[2:0]),
1536 
                   .rclk                (rclk),
1537 
                   .arst_l              (arst_l),
1538 
                   .grst_l              (grst_l),
1539 
            .se (se),
1540 
                   .dmmu_sfar_wr_en_l   (dmmu_sfar_wr_en_l[3:0]));
1541 
        //   .rst_l             (tlu_rst_l));
1542 
 
1543 
tlu_hyperv tlu_hyperv (/*AUTOINST*/
1544 
         .so(scan1_3),
1545 
         .si(scan1_2),
1546 
             .grst_l     (grst_l),
1547 
             .arst_l     (arst_l),
1548 
             .rst_tri_en (mux_drive_disable),
1549 
         // output
1550 
         // modified for timing
1551 
         // .tlu_gl_rw_g (tlu_gl_rw_g),
1552 
         .tlu_gl_rw_m (tlu_gl_rw_m),
1553 
         .tlu_gl_lvl0 (tlu_gl_lvl0[`TSA_GLOBAL_WIDTH-1:0]),
1554 
         .tlu_gl_lvl1 (tlu_gl_lvl1[`TSA_GLOBAL_WIDTH-1:0]),
1555 
         .tlu_gl_lvl2 (tlu_gl_lvl2[`TSA_GLOBAL_WIDTH-1:0]),
1556 
         .tlu_gl_lvl3 (tlu_gl_lvl3[`TSA_GLOBAL_WIDTH-1:0]),
1557 
         .tlu_hpstate_din_sel0 (tlu_hpstate_din_sel0[1:0]),
1558 
         .tlu_hpstate_din_sel1 (tlu_hpstate_din_sel1[1:0]),
1559 
         .tlu_hpstate_din_sel2 (tlu_hpstate_din_sel2[1:0]),
1560 
         .tlu_hpstate_din_sel3 (tlu_hpstate_din_sel3[1:0]),
1561 
         .tlu_htickcmp_rw_e (tlu_htickcmp_rw_e),
1562 
         // .tlu_update_hpstate_l_g (tlu_update_hpstate_l_g[`TLU_THRD_NUM-1:0]),
1563 
         .tlu_update_hpstate_l_w2 (tlu_update_hpstate_l_w2[`TLU_THRD_NUM-1:0]),
1564 
         // .tlu_htickcmp_en_l (tlu_htickcmp_en_l[`TLU_THRD_NUM-1:0]),
1565 
         .tlu_htickcmp_intdis (tlu_htickcmp_intdis),
1566 
         // .tlu_hintp_en_l_g (tlu_hintp_en_l_g[`TLU_THRD_NUM-1:0]),
1567 
         .tlu_wr_hintp_g (tlu_wr_hintp_g[`TLU_THRD_NUM-1:0]),
1568 
         // .tlu_set_hintp_g (tlu_set_hintp_g[`TLU_THRD_NUM-1:0]),
1569 
         .tlu_set_hintp_sel_g (tlu_set_hintp_sel_g[`TLU_THRD_NUM-1:0]),
1570 
         .tlu_htba_en_l (tlu_htba_en_l[`TLU_THRD_NUM-1:0]),
1571 
         // .tlu_hyper_lite (tlu_hyper_lite[`TLU_THRD_NUM-1:0]),
1572 
         .tlu_hscpd_dacc_excpt_m (tlu_hscpd_dacc_excpt_m),
1573 
         .tlu_qtail_dacc_excpt_m (tlu_qtail_dacc_excpt_m),
1574 
         .tlu_scpd_rd_vld_m (tlu_scpd_rd_vld_m),
1575 
         // .tlu_scpd_rd_vld_g (tlu_scpd_rd_vld_g),
1576 
         .tlu_scpd_wr_vld_g (tlu_scpd_wr_vld_g),
1577 
         .tlu_scpd_rd_addr_m (tlu_scpd_rd_addr_m[`SCPD_RW_ADDR_WIDTH-1:0]),
1578 
         .tlu_scpd_wr_addr_g (tlu_scpd_wr_addr_g[`SCPD_RW_ADDR_WIDTH-1:0]),
1579 
         .tlu_asi_queue_rdata_g(tlu_asi_queue_rdata_g[`TLU_ASI_QUE_WIDTH-1:0]),
1580 
         .tlu_ld_data_vld_g(tlu_ld_data_vld_g),
1581 
         .tlu_asi_queue_rd_vld_g(tlu_asi_queue_rd_vld_g),
1582 
                 // .tlu_va_all_zero_g(tlu_va_all_zero_g),
1583 
                 .tlu_va_ill_g(tlu_va_ill_g),
1584 
         .tlu_htstate_rw_d (tlu_htstate_rw_d),
1585 
         .tlu_htstate_rw_g (tlu_htstate_rw_g),
1586 
             // .tlu_htba_mx2_sel (tlu_htba_mx2_sel),
1587 
         // .tlu_rdpr_mx5_sel (tlu_rdpr_mx5_sel[3:0]),
1588 
         .tlu_hyperv_rdpr_sel (tlu_hyperv_rdpr_sel[4:0]),
1589 
         // .tlu_rdpr_mx5_active (tlu_rdpr_mx5_active),
1590 
             .tlu_exu_agp (tlu_exu_agp[`TSA_GLOBAL_WIDTH-1:0]),
1591 
             .tlu_exu_agp_swap (tlu_exu_agp_swap),
1592 
         .tlu_cpu_mondo_cmp (tlu_cpu_mondo_cmp[`TLU_THRD_NUM-1:0]),
1593 
         .tlu_dev_mondo_cmp (tlu_dev_mondo_cmp[`TLU_THRD_NUM-1:0]),
1594 
         .tlu_resum_err_cmp (tlu_resum_err_cmp[`TLU_THRD_NUM-1:0]),
1595 
             // .tlu_exu_agp_tid        (tlu_exu_agp_tid[1:0]),
1596 
                 .tlu_asi_write_g       (tlu_asi_write_g),
1597 
                .inc_ind_asi_wr_inrr(inc_ind_asi_wr_inrr[`TLU_THRD_NUM-1:0]),
1598 
                .inc_ind_asi_wr_indr(inc_ind_asi_wr_indr[`TLU_THRD_NUM-1:0]),
1599 
                .inc_ind_asi_rd_invr(inc_ind_asi_rd_invr[`TLU_THRD_NUM-1:0]),
1600 
                .tlu_local_thrid_g(tlu_local_thrid_g[`TLU_THRD_NUM-1:0]),
1601 
         // input
1602 
         .tlu_por_rstint_g (tlu_por_rstint_g[`TLU_THRD_NUM-1:0]),
1603 
         // .tlu_wsr_inst_g (tlu_wsr_inst_g),
1604 
         .tlu_wsr_inst_nq_g (tlu_wsr_inst_nq_g),
1605 
         // .ifu_tlu_thrid_e (ifu_tlu_thrid_e[1:0]),
1606 
         .ifu_tlu_thrid_d (ifu_tlu_thrid_d[1:0]),
1607 
         .ifu_tlu_sraddr_d (ifu_tlu_sraddr_d_v2[`TLU_ASR_ADDR_WIDTH-1:0]),
1608 
         .tlu_wsr_data_w_global (tlu_wsr_data_w[`TLU_GLOBAL_WIDTH-1:0]),
1609 
         .tlu_dnrtry_global_g (tlu_dnrtry_global_g[`TSA_GLOBAL_WIDTH-1:0]),
1610 
         .tlu_dnrtry0_inst_g (tlu_dnrtry0_inst_g),
1611 
         .tlu_dnrtry1_inst_g (tlu_dnrtry1_inst_g),
1612 
         .tlu_dnrtry2_inst_g (tlu_dnrtry2_inst_g),
1613 
         .tlu_dnrtry3_inst_g (tlu_dnrtry3_inst_g),
1614 
         // modified due to timing
1615 
         // .tlu_thrd0_traps (tlu_thrd0_traps),
1616 
         // .tlu_thrd1_traps (tlu_thrd1_traps),
1617 
         // .tlu_thrd2_traps (tlu_thrd2_traps),
1618 
         // .tlu_thrd3_traps (tlu_thrd3_traps),
1619 
         // .tlu_select_tba_g (tlu_select_tba_g),
1620 
         .tlu_thrd_traps_w2 (tlu_thrd_traps_w2[`TLU_THRD_NUM-1:0]),
1621 
         .tlu_select_tba_w2 (tlu_select_tba_w2),
1622 
         .tlu_tick_ctl_din (tlu_tick_ctl_din),
1623 
         // .tlu_htick_match (tlu_htick_match),
1624 
         .tlu_tickcmp_sel (tlu_tickcmp_sel[`TLU_THRD_NUM-1:0]),
1625 
         .tlu_pstate_priv (local_pstate_priv[`TLU_THRD_NUM-1:0]),
1626 
         .tlu_hpstate_priv (local_hpstate_priv[`TLU_THRD_NUM-1:0]),
1627 
         .tlu_hpstate_enb (local_hpstate_enb[`TLU_THRD_NUM-1:0]),
1628 
         .ifu_lsu_alt_space_e (ifu_lsu_alt_space_e),
1629 
         .ifu_lsu_ld_inst_e (ifu_lsu_ld_inst_e),
1630 
         .ifu_lsu_st_inst_e (ifu_lsu_st_inst_e),
1631 
         .tlu_asi_state_e (tlu_asi_state_e[`TLU_ASI_STATE_WIDTH-1:0]),
1632 
         // new signal to replace ifu_tlu_flush_w
1633 
         // .ifu_tlu_flush_w (ifu_tlu_flush_w),
1634 
                 // .tlu_flush_pipe_w (tlu_flush_pipe_w),
1635 
                 // .tlu_flush_all_w (tlu_flush_all_w),
1636 
         .lsu_tlu_early_flush_w (lsu_tlu_early_flush2_w),
1637 
             .tlu_local_flush_w (tlu_local_flush_w),
1638 
                 .tlu_lsu_int_ldxa_vld_w2(tlu_lsu_int_ldxa_vld_w2),
1639 
                 .tlu_asi_data_nf_vld_w2 (tlu_asi_data_nf_vld_w2),
1640 
         .ifu_tlu_flush_fd_w      (ifu_tlu_flush_fd_w),
1641 
                 .tlu_inst_vld_m  (tlu_inst_vld_nq_m),
1642 
         // .exu_lsu_ldst_va_e (exu_lsu_ldst_va_e[`TLU_ASI_VA_WIDTH-1:0]),
1643 
         .lsu_tlu_ldst_va_m (lsu_tlu_ldst_va_m[`TLU_ASI_VA_WIDTH-1:0]),
1644 
         .tlu_asi_queue_data_g (lsu_tlu_rs3_data_g[`TLU_ASI_QUE_HI:`TLU_ASI_QUE_LO]),
1645 
             // .tlu_exu_agp_tid           (tlu_exu_agp_tid[1:0]),
1646 
             // .tlu_agp_tid_g     (tlu_agp_tid_g[1:0]),
1647 
             .tlu_agp_tid_w2       (tlu_agp_tid_w2[1:0]),
1648 
         .se(se),
1649 
         // .tlu_rst_l (tlu_rst_l),
1650 
         // .clk (clk));
1651 
         .rclk (rclk));
1652 
 
1653 
/*
1654 
bw_r_rf16x160 AUTO_TEMPLATE (
1655 
                .word_wen       (4'b1111),
1656 
                .rd_clk         (rclk),
1657 
                .wr_clk         (rclk),
1658 
                .reset_l        (arst_l),
1659 
                .din            ({mra_wdata[155:0],4'b0000}),
1660 
                //.si           (),
1661 
                .si_r           (),
1662 
                .si_w           (),
1663 
                .se             (se),
1664 
                .sehold         (sehold),
1665 
                //.so           ());
1666 
                .so_r           (),
1667 
                .so_w           ());
1668 
*/
1669 
 
1670 
bw_r_rf16x160 mra (/*AUTOINST*/
1671 
                // Outputs
1672 
                .dout           ({mra_rdata[159:10],dummy_mra_rdata[9:0]}),
1673 
                //.so           (),
1674 
                .so_r           (short_scan0_4),
1675 
                .so_w           (short_scan0_5),
1676 
                // Inputs
1677 
                .rd_clk         (rclk),
1678 
                .wr_clk         (rclk),
1679 
                .din            ({mra_wdata[155:0],4'b0000}),
1680 
                .rst_tri_en     (mem_write_disable),
1681 
                .word_wen       (4'b1111),
1682 
                .byte_wen       (mra_byte_wen[19:0]),
1683 
                .wr_adr         (mra_wr_ptr[3:0]),
1684 
                .rd_adr         (mra_rd_ptr[3:0]),
1685 
                .wr_en          (mra_wr_vld),
1686 
                .read_en        (mra_rd_vld),
1687 
                .reset_l        (arst_l),
1688 
                .sehold         (sehold),
1689 
                //.si           (),
1690 
                .si_w           (short_scan0_4),
1691 
                .si_r           (short_scan0_3),
1692 
                .se             (se));
1693 
 
1694 
 
1695 
 
1696 
//tlu_mra mra (/*AUTOINST*/
1697 
//           // Outputs
1698 
//           .mra_rdata                 (mra_rdata[155:0]),
1699 
//           // Inputs
1700 
//           .mra_wr_ptr                (mra_wr_ptr[3:0]),
1701 
//           .mra_rd_ptr                (mra_rd_ptr[3:0]),
1702 
//           .mra_wr_vld                (mra_wr_vld),
1703 
//           .mra_rd_vld                (mra_rd_vld),
1704 
//           .mra_field1_en             (mra_field1_en),
1705 
//           .mra_field2_en             (mra_field2_en),
1706 
//           .mra_field3_en             (mra_field3_en),
1707 
//           .mra_field4_en             (mra_field4_en),
1708 
//           .mra_wdata                 (mra_wdata[155:0]),
1709 
//           .clk                       (rclk));
1710 
 
1711 
/*
1712 
tlu_pib AUTO_TEMPLATE (
1713 
                .ifu_tlu_imiss_m            (ifu_tlu_imiss_m),
1714 
                .lsu_tlu_dcache_miss_w2 (lsu_tlu_dcache_miss_w2[3:0]),
1715 
                .lsu_tlu_l2_dmiss           (lsu_tlu_l2_dmiss[3:0]),
1716 
                .lsu_tlu_stb_full_w2    (lsu_tlu_stb_full_w2[3:0]));
1717 
        .ffu_tlu_fpu_tid        (ffu_tlu_fpu_tid[1:0]),
1718 
        .ffu_tlu_fpu_cmplt      (ffu_tlu_fpu_cmplt),
1719 
        // .pib_pic_wrap           (pib_pic_wrap[3:0]),
1720 
        .pib_picl_wrap           (pib_picl_wrap[`TLU_THRD_NUM-1:0]),
1721 
        .pich_wrap_flg           (pich_wrap_flg[`TLU_THRD_NUM-1:0]),
1722 
        .pich_onebelow_flg       (pich_onebelow_flg[`TLU_THRD_NUM-1:0]),
1723 
        .pich_twobelow_flg       (pich_twobelow_flg[`TLU_THRD_NUM-1:0]),
1724 
        .tlu_pic_onebelow_e      (tlu_pic_onebelow_e),
1725 
        .tlu_pic_twobelow_e      (tlu_pic_twobelow_e),
1726 
        .tlu_pic_wrap_e          (tlu_pic_wrap_e),
1727 
        // modified for bug 5436: Niagara 2.0
1728 
            .tlu_pcr_ut     (tlu_pcr_ut[`TLU_THRD_NUM-1:0]),
1729 
            .tlu_pcr_st     (tlu_pcr_st[`TLU_THRD_NUM-1:0]),
1730 
        //.tlu_pcr_ut_e            (tlu_pcr_ut_e),
1731 
        //.tlu_pcr_st_e            (tlu_pcr_st_e),
1732 
        // .pich_threebelow_flg     (pich_threebelow_flg[`TLU_THRD_NUM-1:0]),
1733 
        // modified for timing fixes
1734 
        // .pib_priv_act_trap      (pib_priv_act_trap[3:0]),
1735 
        .pib_priv_act_trap_m    (pib_priv_act_trap_m[3:0]),
1736 
*/
1737 
tlu_pib tlu_pib (/*AUTOINST*/
1738 
                 .so (so1),
1739 
                 .si (scan1_3),
1740 
                     .grst_l    (grst_l),
1741 
                     .arst_l    (arst_l),
1742 
                 .ifu_tlu_imiss_e       (ifu_tlu_imiss_e),
1743 
                 .ifu_tlu_immu_miss_m   (ifu_tlu_immu_miss_m),
1744 
                 .tlu_hpstate_enb  (local_hpstate_enb[`TLU_THRD_NUM-1:0]),
1745 
                 .ifu_tlu_l2imiss       (ifu_tlu_l2imiss[`TLU_THRD_NUM-1:0]),
1746 
                     .tlu_thread_inst_vld_g     (tlu_thread_inst_vld_g[`TLU_THRD_NUM-1:0]),
1747 
                 .ifu_tlu_thrid_d       (ifu_tlu_thrid_d[1:0]),
1748 
                 .exu_tlu_wsr_data_m    (exu_tlu_wsr_data_m[`TLU_ASR_DATA_WIDTH-1:0]),
1749 
                 .tlu_full_flush_pipe_w2 (tlu_full_flush_pipe_w2),
1750 
                 .tlu_tcc_inst_w         (tlu_tcc_inst_w),
1751 
                 .ifu_tlu_flush_fd_w      (ifu_tlu_flush_fd3_w),
1752 
                 .ifu_tlu_sraddr_d      (ifu_tlu_sraddr_d_v2[`TLU_ASR_ADDR_WIDTH-1:0]),
1753 
                 .ifu_tlu_rsr_inst_d    (ifu_tlu_rsr_inst_d),
1754 
                 // .ifu_tlu_wsr_inst_d    (ifu_tlu_wsr_inst_d),
1755 
                 .lsu_tlu_wsr_inst_e    (lsu_tlu_wsr_inst_e),
1756 
                     .tlu_wsr_inst_nq_g         (tlu_wsr_inst_nq_g),
1757 
                 .tlu_pib_rsr_data_e    (tlu_pib_rsr_data_e[`TLU_ASR_DATA_WIDTH-1:0]),
1758 
                 .tlu_pstate_priv       (local_pstate_priv[`TLU_THRD_NUM-1:0]),
1759 
                     .tlu_hpstate_priv      (local_hpstate_priv[`TLU_THRD_NUM-1:0]),
1760 
                     .tlu_thread_wsel_g         (tlu_thread_wsel_g[`TLU_THRD_NUM-1:0]),
1761 
                 .ffu_tlu_fpu_tid       (ffu_tlu_fpu_tid[1:0]),
1762 
                 .ffu_tlu_fpu_cmplt     (ffu_tlu_fpu_cmplt),
1763 
                 .lsu_tlu_dmmu_miss_g   (lsu_tlu_dmmu_miss_g),
1764 
                 .lsu_tlu_dcache_miss_w2(lsu_tlu_dcache_miss_w2[`TLU_THRD_NUM-1:0]),
1765 
                 .lsu_tlu_l2_dmiss       (lsu_tlu_l2_dmiss[`TLU_THRD_NUM-1:0]),
1766 
                 .lsu_tlu_stb_full_w2   (lsu_tlu_stb_full_w2[`TLU_THRD_NUM-1:0]),
1767 
                 .tlu_wsr_data_w        (tlu_wsr_data_w[`TLU_ASR_DATA_WIDTH-1:0]),
1768 
                 // modified for timing fixes
1769 
                     // .pib_priv_act_trap     (pib_priv_act_trap[`TLU_THRD_NUM-1:0]),
1770 
                     .pib_priv_act_trap_m   (pib_priv_act_trap_m[`TLU_THRD_NUM-1:0]),
1771 
                 // .pib_pic_wrap        (pib_pic_wrap[`TLU_THRD_NUM-1:0]),
1772 
                 .pib_picl_wrap          (pib_picl_wrap[`TLU_THRD_NUM-1:0]),
1773 
                 .pich_wrap_flg          (pich_wrap_flg[`TLU_THRD_NUM-1:0]),
1774 
                 .pich_onebelow_flg      (pich_onebelow_flg[`TLU_THRD_NUM-1:0]),
1775 
                 .pich_twobelow_flg      (pich_twobelow_flg[`TLU_THRD_NUM-1:0]),
1776 
                 .tlu_pic_onebelow_e     (tlu_pic_onebelow_e),
1777 
                 .tlu_pic_twobelow_e     (tlu_pic_twobelow_e),
1778 
                 // modified for bug 5436: Niagara 2.0
1779 
                     .tlu_pcr_ut            (tlu_pcr_ut[`TLU_THRD_NUM-1:0]),
1780 
                     .tlu_pcr_st            (tlu_pcr_st[`TLU_THRD_NUM-1:0]),
1781 
                 //.tlu_pcr_ut_e            (tlu_pcr_ut_e),
1782 
                 //.tlu_pcr_st_e            (tlu_pcr_st_e),
1783 
                 .tlu_pic_wrap_e         (tlu_pic_wrap_e),
1784 
                 // .pich_threebelow_flg      (pich_threebelow_flg[`TLU_THRD_NUM-1:0]),
1785 
                 // .tlu_que_trap_sel_m  (tlu_que_trap_sel_m[`QUE_TRAP_SEL_WIDTH-1:0]),
1786 
                 // .tlu_exu_rsr_data_e  (tlu_exu_rsr_data_e[`TLU_ASR_DATA_WIDTH-1:0]),
1787 
//
1788 
// reset was removed to abide to the Niagara reset methodology
1789 
//               .reset (reset),
1790 
                 .se (se),
1791 
                 // .tlu_rst_l                          (tlu_rst_l),
1792 
                 // .rst_tri_en                         (mux_drive_disable),
1793 
                 .rclk                                  (rclk) );
1794 
 
1795 
// modified due to Niagara SRAM methodology
1796 
/*
1797 
tlu_scpd tlu_scpd (
1798 
                 .lsu_tlu_st_rs3_data_g (lsu_tlu_rs3_data_g[`TLU_SCPD_DATA_WIDTH-1:0]),
1799 
                 .tlu_scpd_rd_vld_m     (tlu_scpd_rd_vld_m),
1800 
                 .tlu_scpd_wr_vld_g     (tlu_scpd_wr_vld_g),
1801 
                 .tlu_scpd_rd_addr_m    (tlu_scpd_rd_addr_m[`SCPD_RW_ADDR_WIDTH-1:0]),
1802 
                 .tlu_scpd_wr_addr_g    (tlu_scpd_wr_addr_g[`SCPD_RW_ADDR_WIDTH-1:0]),
1803 
//
1804 
// reset was removed to abide to the Niagara reset methodology
1805 
//               .reset (reset),
1806 
                 .tlu_rst                               (tlu_rst),
1807 
                 .clk                                   (rclk),
1808 
                 .tlu_scpd_asi_rdata_g  (tlu_scpd_asi_rdata_g[`TLU_SCPD_DATA_WIDTH-1:0]));
1809 
//
1810 
*/
1811 
bw_r_rf32x80 tlu_scpd (
1812 
                 // output
1813 
                 .dout    (tlu_scpd_asi_rdata_g[79:0]),
1814 
                 .so      (short_scan0_6),
1815 
                 // intput
1816 
                 .din     ({{16{1'b0}}, // unused inputs
1817 
                            lsu_tlu_rs3_data_g[`TLU_SCPD_DATA_WIDTH-1:0]}),
1818 
                 .rd_en   (tlu_scpd_rd_vld_m),
1819 
                 .wr_en   (tlu_scpd_wr_vld_g),
1820 
                 .rd_adr  (tlu_scpd_rd_addr_m[`SCPD_RW_ADDR_WIDTH-1:0]),
1821 
                 .wr_adr  (tlu_scpd_wr_addr_g[`SCPD_RW_ADDR_WIDTH-1:0]),
1822 
                 .nib_wr_en (20'hfffff),
1823 
                 .reset_l (arst_l),
1824 
                 .rst_tri_en (mem_write_disable),
1825 
                 .sehold  (sehold),
1826 
                 .se      (se),
1827 
                 .si      (short_scan0_5),
1828 
                 //.clk   (clk));
1829 
                 .rclk    (rclk));
1830 
endmodule
1831 
// Local Variables:
1832 
// verilog-library-directories:("." "../../../srams/rtl")
1833 
// End:

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