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// ========== Copyright Header Begin ==========================================
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//
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// OpenSPARC T1 Processor File: tlu_addern_32.v
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// Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
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//
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// The above named program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU General Public
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// License version 2 as published by the Free Software Foundation.
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//
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// The above named program is distributed in the hope that it will be
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// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// General Public License for more details.
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//
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// You should have received a copy of the GNU General Public
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// License along with this work; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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// ========== Copyright Header End ============================================
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////////////////////////////////////////////////////////////////////////
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/*
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// Description: parameterized adder macro
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*/
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////////////////////////////////////////////////////////////////////////
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// Global header file includes
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////////////////////////////////////////////////////////////////////////
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`include "sys.h" // system level definition file which contains the
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// time scale definition
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////////////////////////////////////////////////////////////////////////
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// Local header file includes / local defines
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////////////////////////////////////////////////////////////////////////
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module tlu_addern_32 (din, incr, sum);
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// synopsys template
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parameter ADDER_DATA_WIDTH = 33;
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parameter INCR_DATA_WIDTH = 1;
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parameter UPPER_DATA_WIDTH = ADDER_DATA_WIDTH - INCR_DATA_WIDTH;
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input [ADDER_DATA_WIDTH-1:0] din;
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input [INCR_DATA_WIDTH-1:0] incr;
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output [ADDER_DATA_WIDTH-1:0] sum;
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//
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////////////////////////////////////////////////////////////////////////
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// local signal declaraiont
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////////////////////////////////////////////////////////////////////////
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assign sum[ADDER_DATA_WIDTH-1:0] =
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din[ADDER_DATA_WIDTH-1:0] + {{UPPER_DATA_WIDTH{1'b0}},incr[INCR_DATA_WIDTH-1:0]};
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endmodule // tlu_addern_32
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