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[/] [sparc64soc/] [trunk/] [T1-common/] [common/] [cluster_header_sync.v] - Blame information for rev 7

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1 2 dmitryr
// ========== Copyright Header Begin ==========================================
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// 
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// OpenSPARC T1 Processor File: cluster_header_sync.v
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// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
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// 
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// The above named program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU General Public
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// License version 2 as published by the Free Software Foundation.
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// 
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// The above named program is distributed in the hope that it will be 
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// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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// General Public License for more details.
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// 
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// You should have received a copy of the GNU General Public
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// License along with this work; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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// 
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// ========== Copyright Header End ============================================
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// The sync pulse cluster header is instatiated as a hard macro.
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// This model is for simulation only.
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module cluster_header_sync (/*AUTOARG*/
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   // Outputs
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   dram_rx_sync_local, dram_tx_sync_local, jbus_rx_sync_local,
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   jbus_tx_sync_local, so,
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   // Inputs
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   dram_rx_sync_global, dram_tx_sync_global, jbus_rx_sync_global,
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   jbus_tx_sync_global, cmp_gclk, cmp_rclk, si, se
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   );
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   output dram_rx_sync_local;
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   output dram_tx_sync_local;
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   output jbus_rx_sync_local;
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   output jbus_tx_sync_local;
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   output so;
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   input  dram_rx_sync_global;
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   input  dram_tx_sync_global;
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   input  jbus_rx_sync_global;
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   input  jbus_tx_sync_global;
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   input  cmp_gclk;
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   input  cmp_rclk;
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   input  si;
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   input  se;
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   wire   dram_rx_so;
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   wire   dram_tx_so;
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   wire   jbus_rx_so;
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   bw_clk_cclk_sync sync_wrapper (
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                                  .dram_rx_sync_local(dram_rx_sync_local),
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                                  .dram_tx_sync_local(dram_tx_sync_local),
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                                  .jbus_rx_sync_local(jbus_rx_sync_local),
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                                  .jbus_tx_sync_local(jbus_tx_sync_local),
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                                  .so(so),
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                                  .dram_rx_sync_global(dram_rx_sync_global),
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                                  .dram_tx_sync_global(dram_tx_sync_global),
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                                  .jbus_rx_sync_global(jbus_rx_sync_global),
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                                  .jbus_tx_sync_global(jbus_tx_sync_global),
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                                  .cmp_gclk(cmp_gclk),
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                                  .cmp_rclk(cmp_rclk),
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                                  .si(si),
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                                  .se(se)
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                                  );
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endmodule // cluster_header_sync

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