OpenCores
URL https://opencores.org/ocsvn/spi_master_slave/spi_master_slave/trunk

Subversion Repositories spi_master_slave

[/] [spi_master_slave/] [trunk/] [syn/] [spi_master_envsettings.html] - Blame information for rev 25

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1 5 jdoin 
<HTML><HEAD><TITLE>Xilinx System Settings Report</TITLE></HEAD>
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<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
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<center><big><big><b>System Settings</b></big></big></center><br>
4 
<A NAME="Environment Settings"></A>
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&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
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<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
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<TD ALIGN=CENTER COLSPAN='5'><B> Environment Settings </B></TD>
8 
</tr>
9 
<tr bgcolor='#ffff99'>
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<td><b>Environment Variable</b></td>
11 
<td><b>xst</b></td>
12 
<td><b>ngdbuild</b></td>
13 
<td><b>map</b></td>
14 
<td><b>par</b></td>
15 
</tr>
16 
<tr>
17 
<td>PATHEXT</td>
18 
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
19 20 jdoin 
<td><font color=gray>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</font></td>
20 
<td><font color=gray>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</font></td>
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<td><font color=gray>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</font></td>
22 5 jdoin 
</tr>
23 
<tr>
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<td>Path</td>
25 20 jdoin 
<td>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt64;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt64;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files (x86)\Flash Magic</td>
26 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt64\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt64\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt64;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt64;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files (x86)\Flash Magic</font></td>
27 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</font></td>
28 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</font></td>
29 5 jdoin 
</tr>
30 
<tr>
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<td>XILINX</td>
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<td>C:\Xilinx\13.1\ISE_DS\ISE\</td>
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<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\</font></td>
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<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\</font></td>
35 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\</font></td>
36 5 jdoin 
</tr>
37 
<tr>
38 
<td>XILINX_DSP</td>
39 
<td>C:\Xilinx\13.1\ISE_DS\ISE</td>
40 20 jdoin 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE</font></td>
41 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE</font></td>
42 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE</font></td>
43 5 jdoin 
</tr>
44 
<tr>
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<td>XILINX_EDK</td>
46 
<td>C:\Xilinx\13.1\ISE_DS\EDK</td>
47 20 jdoin 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\EDK</font></td>
48 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\EDK</font></td>
49 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\EDK</font></td>
50 5 jdoin 
</tr>
51 
<tr>
52 20 jdoin 
<td>XILINX_FOR_ALTIUM_OVERRIDE</td>
53 
<td> </td>
54 
<td><font color=gray> </font></td>
55 
<td><font color=gray>&lt;&nbsp; not set &nbsp;&gt;</font></td>
56 
<td><font color=gray>&lt;&nbsp; not set &nbsp;&gt;</font></td>
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</tr>
58 
<tr>
59 5 jdoin 
<td>XILINX_PLANAHEAD</td>
60 
<td>C:\Xilinx\13.1\ISE_DS\PlanAhead</td>
61 20 jdoin 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\PlanAhead</font></td>
62 
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\PlanAhead</font></td>
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<td><font color=gray>C:\Xilinx\13.1\ISE_DS\PlanAhead</font></td>
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</tr>
65 
</TABLE>
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<A NAME="Synthesis Property Settings"></A>
67 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
68 
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
69 
<TD ALIGN=CENTER COLSPAN='4'><B>Synthesis Property Settings </B></TD>
70 
</tr>
71 
<tr bgcolor='#ffff99'>
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<td><b>Switch Name</b></td>
73 
<td><b>Property Name</b></td>
74 
<td><b>Value</b></td>
75 
<td><b>Default Value</b></td>
76 
</tr>
77 
<tr>
78 
<td>-ifn</td>
79 
<td>&nbsp;</td>
80 
<td>spi_master_atlys_top.prj</td>
81 
<td>&nbsp;</td>
82 
</tr>
83 
<tr>
84 
<td>-ifmt</td>
85 
<td>&nbsp;</td>
86 
<td>mixed</td>
87 
<td>Mixed</td>
88 
</tr>
89 
<tr>
90 
<td>-ofn</td>
91 
<td>&nbsp;</td>
92 
<td>spi_master_atlys_top</td>
93 
<td>&nbsp;</td>
94 
</tr>
95 
<tr>
96 
<td>-ofmt</td>
97 
<td>&nbsp;</td>
98 
<td>NGC</td>
99 
<td>NGC</td>
100 
</tr>
101 
<tr>
102 
<td>-p</td>
103 
<td>&nbsp;</td>
104 
<td>xc6slx45-2-csg324</td>
105 
<td>&nbsp;</td>
106 
</tr>
107 
<tr>
108 
<td>-top</td>
109 
<td>&nbsp;</td>
110 
<td>spi_master_atlys_top</td>
111 
<td>&nbsp;</td>
112 
</tr>
113 
<tr>
114 
<td>-opt_mode</td>
115 
<td>Optimization Goal</td>
116 
<td>Speed</td>
117 
<td>Speed</td>
118 
</tr>
119 
<tr>
120 
<td>-opt_level</td>
121 
<td>Optimization Effort</td>
122 
<td>2</td>
123 
<td>1</td>
124 
</tr>
125 
<tr>
126 
<td>-power</td>
127 
<td>Power Reduction</td>
128 
<td>NO</td>
129 
<td>No</td>
130 
</tr>
131 
<tr>
132 
<td>-iuc</td>
133 
<td>Use synthesis Constraints File</td>
134 
<td>NO</td>
135 
<td>No</td>
136 
</tr>
137 
<tr>
138 
<td>-keep_hierarchy</td>
139 
<td>Keep Hierarchy</td>
140 
<td>No</td>
141 
<td>No</td>
142 
</tr>
143 
<tr>
144 
<td>-netlist_hierarchy</td>
145 
<td>Netlist Hierarchy</td>
146 
<td>As_Optimized</td>
147 
<td>As_Optimized</td>
148 
</tr>
149 
<tr>
150 
<td>-rtlview</td>
151 
<td>Generate RTL Schematic</td>
152 
<td>Yes</td>
153 
<td>No</td>
154 
</tr>
155 
<tr>
156 
<td>-glob_opt</td>
157 
<td>Global Optimization Goal</td>
158 
<td>AllClockNets</td>
159 
<td>AllClockNets</td>
160 
</tr>
161 
<tr>
162 
<td>-read_cores</td>
163 
<td>Read Cores</td>
164 
<td>YES</td>
165 
<td>Yes</td>
166 
</tr>
167 
<tr>
168 
<td>-write_timing_constraints</td>
169 
<td>Write Timing Constraints</td>
170 
<td>NO</td>
171 
<td>No</td>
172 
</tr>
173 
<tr>
174 
<td>-cross_clock_analysis</td>
175 
<td>Cross Clock Analysis</td>
176 
<td>NO</td>
177 
<td>No</td>
178 
</tr>
179 
<tr>
180 
<td>-bus_delimiter</td>
181 
<td>Bus Delimiter</td>
182 
<td>&lt;&gt;</td>
183 
<td>&lt;&gt;</td>
184 
</tr>
185 
<tr>
186 
<td>-slice_utilization_ratio</td>
187 
<td>Slice Utilization Ratio</td>
188 
<td>100</td>
189 
<td>100</td>
190 
</tr>
191 
<tr>
192 
<td>-bram_utilization_ratio</td>
193 
<td>BRAM Utilization Ratio</td>
194 
<td>100</td>
195 
<td>100</td>
196 
</tr>
197 
<tr>
198 
<td>-dsp_utilization_ratio</td>
199 
<td>DSP Utilization Ratio</td>
200 
<td>100</td>
201 
<td>100</td>
202 
</tr>
203 
<tr>
204 
<td>-reduce_control_sets</td>
205 
<td>&nbsp;</td>
206 
<td>Auto</td>
207 
<td>Auto</td>
208 
</tr>
209 
<tr>
210 
<td>-fsm_extract</td>
211 
<td>&nbsp;</td>
212 
<td>YES</td>
213 
<td>Yes</td>
214 
</tr>
215 
<tr>
216 
<td>-fsm_encoding</td>
217 
<td>&nbsp;</td>
218 
<td>Gray</td>
219 
<td>Auto</td>
220 
</tr>
221 
<tr>
222 
<td>-safe_implementation</td>
223 
<td>&nbsp;</td>
224 
<td>No</td>
225 
<td>No</td>
226 
</tr>
227 
<tr>
228 
<td>-fsm_style</td>
229 
<td>&nbsp;</td>
230 
<td>LUT</td>
231 
<td>LUT</td>
232 
</tr>
233 
<tr>
234 
<td>-ram_extract</td>
235 
<td>&nbsp;</td>
236 
<td>No</td>
237 
<td>Yes</td>
238 
</tr>
239 
<tr>
240 
<td>-rom_extract</td>
241 
<td>&nbsp;</td>
242 
<td>No</td>
243 
<td>Yes</td>
244 
</tr>
245 
<tr>
246 
<td>-shreg_extract</td>
247 
<td>&nbsp;</td>
248 
<td>NO</td>
249 
<td>Yes</td>
250 
</tr>
251 
<tr>
252 
<td>-auto_bram_packing</td>
253 
<td>&nbsp;</td>
254 
<td>NO</td>
255 
<td>No</td>
256 
</tr>
257 
<tr>
258 
<td>-resource_sharing</td>
259 
<td>&nbsp;</td>
260 
<td>YES</td>
261 
<td>Yes</td>
262 
</tr>
263 
<tr>
264 
<td>-async_to_sync</td>
265 
<td>&nbsp;</td>
266 
<td>NO</td>
267 
<td>No</td>
268 
</tr>
269 
<tr>
270 
<td>-use_dsp48</td>
271 
<td>&nbsp;</td>
272 
<td>Auto</td>
273 
<td>Auto</td>
274 
</tr>
275 
<tr>
276 
<td>-iobuf</td>
277 
<td>&nbsp;</td>
278 
<td>YES</td>
279 
<td>Yes</td>
280 
</tr>
281 
<tr>
282 
<td>-max_fanout</td>
283 
<td>&nbsp;</td>
284 
<td>100000</td>
285 
<td>100000</td>
286 
</tr>
287 
<tr>
288 
<td>-bufg</td>
289 
<td>&nbsp;</td>
290 
<td>16</td>
291 
<td>16</td>
292 
</tr>
293 
<tr>
294 
<td>-register_duplication</td>
295 
<td>&nbsp;</td>
296 
<td>YES</td>
297 
<td>Yes</td>
298 
</tr>
299 
<tr>
300 
<td>-register_balancing</td>
301 
<td>&nbsp;</td>
302 
<td>No</td>
303 
<td>No</td>
304 
</tr>
305 
<tr>
306 
<td>-optimize_primitives</td>
307 
<td>&nbsp;</td>
308 
<td>NO</td>
309 
<td>No</td>
310 
</tr>
311 
<tr>
312 
<td>-use_clock_enable</td>
313 
<td>&nbsp;</td>
314 
<td>Auto</td>
315 
<td>Auto</td>
316 
</tr>
317 
<tr>
318 
<td>-use_sync_set</td>
319 
<td>&nbsp;</td>
320 
<td>Auto</td>
321 
<td>Auto</td>
322 
</tr>
323 
<tr>
324 
<td>-use_sync_reset</td>
325 
<td>&nbsp;</td>
326 
<td>Auto</td>
327 
<td>Auto</td>
328 
</tr>
329 
<tr>
330 
<td>-iob</td>
331 
<td>&nbsp;</td>
332 
<td>Auto</td>
333 
<td>Auto</td>
334 
</tr>
335 
<tr>
336 
<td>-equivalent_register_removal</td>
337 
<td>&nbsp;</td>
338 
<td>YES</td>
339 
<td>Yes</td>
340 
</tr>
341 
<tr>
342 
<td>-slice_utilization_ratio_maxmargin</td>
343 
<td>&nbsp;</td>
344 
<td>5</td>
345 
<td>0</td>
346 
</tr>
347 
</TABLE>
348 
<A NAME="Translation Property Settings"></A>
349 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
350 
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
351 
<TD ALIGN=CENTER COLSPAN='4'><B>Translation Property Settings </B></TD>
352 
</tr>
353 
<tr bgcolor='#ffff99'>
354 
<td><b>Switch Name</b></td>
355 
<td><b>Property Name</b></td>
356 
<td><b>Value</b></td>
357 
<td><b>Default Value</b></td>
358 
</tr>
359 
<tr>
360 20 jdoin 
<td><font color=gray>-intstyle</font></td>
361 
<td><font color=gray>&nbsp;</font></td>
362 
<td><font color=gray>ise</font></td>
363 
<td><font color=gray>None</font></td>
364 5 jdoin 
</tr>
365 
<tr>
366 20 jdoin 
<td><font color=gray>-dd</font></td>
367 
<td><font color=gray>&nbsp;</font></td>
368 
<td><font color=gray>_ngo</font></td>
369 
<td><font color=gray>None</font></td>
370 5 jdoin 
</tr>
371 
<tr>
372 20 jdoin 
<td><font color=gray>-p</font></td>
373 
<td><font color=gray>&nbsp;</font></td>
374 
<td><font color=gray>xc6slx45-csg324-2</font></td>
375 
<td><font color=gray>None</font></td>
376 5 jdoin 
</tr>
377 
<tr>
378 20 jdoin 
<td><font color=gray>-uc</font></td>
379 
<td><font color=gray>&nbsp;</font></td>
380 
<td><font color=gray>spi_master_atlys.ucf</font></td>
381 
<td><font color=gray>None</font></td>
382 5 jdoin 
</tr>
383 
</TABLE>
384 
<A NAME="Map Property Settings"></A>
385 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
386 
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
387 
<TD ALIGN=CENTER COLSPAN='4'><B>Map Property Settings </B></TD>
388 
</tr>
389 
<tr bgcolor='#ffff99'>
390 
<td><b>Switch Name</b></td>
391 
<td><b>Property Name</b></td>
392 
<td><b>Value</b></td>
393 
<td><b>Default Value</b></td>
394 
</tr>
395 
<tr>
396 20 jdoin 
<td><font color=gray>-detail</font></td>
397 
<td><font color=gray>Generate Detailed MAP Report</font></td>
398 
<td><font color=gray>TRUE</font></td>
399 
<td><font color=gray>TRUE</font></td>
400 11 jdoin 
</tr>
401 
<tr>
402 20 jdoin 
<td><font color=gray>-ol</font></td>
403 
<td><font color=gray>Place & Route Effort Level (Overall)</font></td>
404 
<td><font color=gray>high</font></td>
405 
<td><font color=gray>high</font></td>
406 5 jdoin 
</tr>
407 
<tr>
408 20 jdoin 
<td><font color=gray>-xe</font></td>
409 
<td><font color=gray>Placer Extra Effort Map</font></td>
410 
<td><font color=gray>NORMAL</font></td>
411 
<td><font color=gray>&nbsp;</font></td>
412 5 jdoin 
</tr>
413 
<tr>
414 20 jdoin 
<td><font color=gray>-xt</font></td>
415 
<td><font color=gray>Extra Cost Tables</font></td>
416 
<td><font color=gray>0</font></td>
417 
<td><font color=gray>0</font></td>
418 5 jdoin 
</tr>
419 
<tr>
420 20 jdoin 
<td><font color=gray>-global_opt</font></td>
421 
<td><font color=gray>Global Optimization map</font></td>
422 
<td><font color=gray>TRUE</font></td>
423 
<td><font color=gray>FALSE</font></td>
424 5 jdoin 
</tr>
425 
<tr>
426 20 jdoin 
<td><font color=gray>-ir</font></td>
427 
<td><font color=gray>Use RLOC Constraints</font></td>
428 
<td><font color=gray>OFF</font></td>
429 
<td><font color=gray>OFF</font></td>
430 5 jdoin 
</tr>
431 
<tr>
432 20 jdoin 
<td><font color=gray>-mt</font></td>
433 
<td><font color=gray>Enable Multi-Threading</font></td>
434 
<td><font color=gray>2</font></td>
435 
<td><font color=gray>0</font></td>
436 5 jdoin 
</tr>
437 
<tr>
438 20 jdoin 
<td><font color=gray>-t</font></td>
439 
<td><font color=gray>Starting Placer Cost Table (1-100) Map</font></td>
440 
<td><font color=gray>1</font></td>
441 
<td><font color=gray>0</font></td>
442 5 jdoin 
</tr>
443 
<tr>
444 20 jdoin 
<td><font color=gray>-r</font></td>
445 
<td><font color=gray>Register Ordering</font></td>
446 
<td><font color=gray>4</font></td>
447 
<td><font color=gray>4</font></td>
448 5 jdoin 
</tr>
449 
<tr>
450 20 jdoin 
<td><font color=gray>-equivalent_register_removal</font></td>
451 
<td><font color=gray>Equivalent Register Removal</font></td>
452 
<td><font color=gray>TRUE</font></td>
453 
<td><font color=gray>TRUE</font></td>
454 5 jdoin 
</tr>
455 
<tr>
456 20 jdoin 
<td><font color=gray>-intstyle</font></td>
457 
<td><font color=gray>&nbsp;</font></td>
458 
<td><font color=gray>ise</font></td>
459 
<td><font color=gray>None</font></td>
460 5 jdoin 
</tr>
461 
<tr>
462 20 jdoin 
<td><font color=gray>-lc</font></td>
463 
<td><font color=gray>LUT Combining</font></td>
464 
<td><font color=gray>area</font></td>
465 
<td><font color=gray>off</font></td>
466 5 jdoin 
</tr>
467 
<tr>
468 20 jdoin 
<td><font color=gray>-o</font></td>
469 
<td><font color=gray>&nbsp;</font></td>
470 
<td><font color=gray>spi_master_atlys_top_map.ncd</font></td>
471 
<td><font color=gray>None</font></td>
472 5 jdoin 
</tr>
473 
<tr>
474 20 jdoin 
<td><font color=gray>-w</font></td>
475 
<td><font color=gray>&nbsp;</font></td>
476 
<td><font color=gray>true</font></td>
477 
<td><font color=gray>false</font></td>
478 5 jdoin 
</tr>
479 
<tr>
480 20 jdoin 
<td><font color=gray>-pr</font></td>
481 
<td><font color=gray>Pack I/O Registers/Latches into IOBs</font></td>
482 
<td><font color=gray>off</font></td>
483 
<td><font color=gray>off</font></td>
484 5 jdoin 
</tr>
485 
<tr>
486 20 jdoin 
<td><font color=gray>-p</font></td>
487 
<td><font color=gray>&nbsp;</font></td>
488 
<td><font color=gray>xc6slx45-csg324-2</font></td>
489 
<td><font color=gray>None</font></td>
490 5 jdoin 
</tr>
491 
</TABLE>
492 20 jdoin 
<A NAME="Place and Route Property Settings"></A>
493 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
494 
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
495 
<TD ALIGN=CENTER COLSPAN='4'><B>Place and Route Property Settings </B></TD>
496 
</tr>
497 
<tr bgcolor='#ffff99'>
498 
<td><b>Switch Name</b></td>
499 
<td><b>Property Name</b></td>
500 
<td><b>Value</b></td>
501 
<td><b>Default Value</b></td>
502 
</tr>
503 
<tr>
504 
<td><font color=gray>-xe</font></td>
505 
<td><font color=gray>&nbsp;</font></td>
506 
<td><font color=gray>n</font></td>
507 
<td><font color=gray>None</font></td>
508 
</tr>
509 
<tr>
510 
<td><font color=gray>-intstyle</font></td>
511 
<td><font color=gray>&nbsp;</font></td>
512 
<td><font color=gray>ise</font></td>
513 
<td><font color=gray>&nbsp;</font></td>
514 
</tr>
515 
<tr>
516 
<td><font color=gray>-mt</font></td>
517 
<td><font color=gray>Enable Multi-Threading</font></td>
518 
<td><font color=gray>4</font></td>
519 
<td><font color=gray>off</font></td>
520 
</tr>
521 
<tr>
522 
<td><font color=gray>-ol</font></td>
523 
<td><font color=gray>Place & Route Effort Level (Overall)</font></td>
524 
<td><font color=gray>high</font></td>
525 
<td><font color=gray>std</font></td>
526 
</tr>
527 
<tr>
528 
<td><font color=gray>-w</font></td>
529 
<td><font color=gray>&nbsp;</font></td>
530 
<td><font color=gray>true</font></td>
531 
<td><font color=gray>false</font></td>
532 
</tr>
533 
</TABLE>
534 5 jdoin 
<A NAME="Operating System Information"></A>
535 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
536 
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
537 
<TD ALIGN=CENTER COLSPAN='5'><B> Operating System Information </B></TD>
538 
</tr>
539 
<tr bgcolor='#ffff99'>
540 
<td><b>Operating System Information</b></td>
541 
<td><b>xst</b></td>
542 
<td><b>ngdbuild</b></td>
543 
<td><b>map</b></td>
544 
<td><b>par</b></td>
545 
</tr>
546 
<tr>
547 
<td>CPU Architecture/Speed</td>
548 20 jdoin 
<td>Intel(R) Xeon(R) CPU           E5620  @ 2.40GHz/2394 MHz</td>
549 
<td><font color=gray>Intel(R) Xeon(R) CPU           E5620  @ 2.40GHz/2394 MHz</font></td>
550 
<td><font color=gray>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</font></td>
551 
<td><font color=gray>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</font></td>
552 5 jdoin 
</tr>
553 
<tr>
554 
<td>Host</td>
555 20 jdoin 
<td>EELE313</td>
556 
<td><font color=gray>EELE313</font></td>
557 
<td><font color=gray>Develop-W7</font></td>
558 
<td><font color=gray>Develop-W7</font></td>
559 5 jdoin 
</tr>
560 
<tr>
561 
<td>OS Name</td>
562 20 jdoin 
<td>Microsoft Windows 7 , 64-bit</td>
563 
<td><font color=gray>Microsoft Windows 7 , 64-bit</font></td>
564 
<td><font color=gray>Microsoft Windows 7 , 32-bit</font></td>
565 
<td><font color=gray>Microsoft Windows 7 , 32-bit</font></td>
566 5 jdoin 
</tr>
567 
<tr>
568 
<td>OS Release</td>
569 
<td>Service Pack 1  (build 7601)</td>
570 20 jdoin 
<td><font color=gray>Service Pack 1  (build 7601)</font></td>
571 
<td><font color=gray>Service Pack 1  (build 7601)</font></td>
572 
<td><font color=gray>Service Pack 1  (build 7601)</font></td>
573 5 jdoin 
</tr>
574 
</TABLE>
575 
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