URL https://opencores.org/ocsvn/spi_slave/spi_slave/trunk

Subversion Repositories spi_slave

[/] [spi_slave/] [trunk/] [sim/] [rtl_sim/] [modelsim_sim/] [run/] [fifo/] [fifo_tb_c.do] - Blame information for rev 37

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vlib work
# packages
vcom -93 ../../../../../bench/vhdl/images-body.vhd
vcom -93 ../../../../../bench/vhdl/txt_util.vhd
# DUT
vcom -93 ../../../../../rtl/vhdl/gray_adder.vhd
vcom -93 ../../../../../rtl/vhdl/gray2bin.vhd
vcom -93 ../../../../../rtl/vhdl/bin2gray.vhd
vcom -93 ../../../../../rtl/vhdl/fifo_prog_flags.vhd
vcom -93 ../../../../../rtl/vhdl/ram.vhd
vcom -93 ../../../../../rtl/vhdl/fifo.vhd
# Testbench
vcom -93 ../../../../../bench/vhdl/fifo_tb.vhd

Line No.	Rev	Author	Line
1	12	dkoethe	`vlib work`
2			`# packages`
3			`vcom -93 ../../../../../bench/vhdl/images-body.vhd`
4			`vcom -93 ../../../../../bench/vhdl/txt_util.vhd`
5			`# DUT`
6			`vcom -93 ../../../../../rtl/vhdl/gray_adder.vhd`
7			`vcom -93 ../../../../../rtl/vhdl/gray2bin.vhd`
8			`vcom -93 ../../../../../rtl/vhdl/bin2gray.vhd`
9			`vcom -93 ../../../../../rtl/vhdl/fifo_prog_flags.vhd`
10			`vcom -93 ../../../../../rtl/vhdl/ram.vhd`
11			`vcom -93 ../../../../../rtl/vhdl/fifo.vhd`
12			`# Testbench`
13			`vcom -93 ../../../../../bench/vhdl/fifo_tb.vhd`

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Subversion Repositories spi_slave

[/] [spi_slave/] [trunk/] [sim/] [rtl_sim/] [modelsim_sim/] [run/] [fifo/] [fifo_tb_c.do] - Blame information for rev 37