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[/] [srdydrdy_lib/] [trunk/] [examples/] [bridge/] [env/] [env_top.v] - Blame information for rev 9

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1 8 ghutchis 
`timescale 1ns/1ps
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module env_top;
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  reg clk, reset;
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  initial
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    begin
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      clk = 0;
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      forever clk = #4 ~clk;
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    end
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  initial
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    begin
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      $dumpfile ("env_top.vcd");
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      $dumpvars;
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      reset = 1;
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      #200;
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      reset = 0;
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      #200;
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22 9 ghutchis 
      repeat (`FIB_ENTRIES)
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        @(posedge clk);
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25 8 ghutchis 
      fork
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        driver0.send_packet (1, 2, 20);
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        driver1.send_packet (2, 3, 64);
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        driver2.send_packet (3, 4, 64);
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        driver3.send_packet (4, 1, 64);
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      join
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      #500;
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      $finish;
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    end
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  /*AUTOWIRE*/
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  // Beginning of automatic wires (for undeclared instantiated-module outputs)
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  wire                  gmii_rx_clk_0;          // From driver0 of gmii_driver.v
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  wire                  gmii_rx_clk_1;          // From driver1 of gmii_driver.v
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  wire                  gmii_rx_clk_2;          // From driver2 of gmii_driver.v
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  wire                  gmii_rx_clk_3;          // From driver3 of gmii_driver.v
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  wire                  gmii_rx_dv_0;           // From driver0 of gmii_driver.v
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  wire                  gmii_rx_dv_1;           // From driver1 of gmii_driver.v
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  wire                  gmii_rx_dv_2;           // From driver2 of gmii_driver.v
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  wire                  gmii_rx_dv_3;           // From driver3 of gmii_driver.v
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  wire [7:0]             gmii_rxd_0;             // From driver0 of gmii_driver.v
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  wire [7:0]             gmii_rxd_1;             // From driver1 of gmii_driver.v
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  wire [7:0]             gmii_rxd_2;             // From driver2 of gmii_driver.v
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  wire [7:0]             gmii_rxd_3;             // From driver3 of gmii_driver.v
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  wire                  gmii_tx_dv_0;           // From bridge of bridge_ex1.v
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  wire                  gmii_tx_dv_1;           // From bridge of bridge_ex1.v
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  wire                  gmii_tx_dv_2;           // From bridge of bridge_ex1.v
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  wire                  gmii_tx_dv_3;           // From bridge of bridge_ex1.v
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  wire [7:0]             gmii_txd_0;             // From bridge of bridge_ex1.v
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  wire [7:0]             gmii_txd_1;             // From bridge of bridge_ex1.v
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  wire [7:0]             gmii_txd_2;             // From bridge of bridge_ex1.v
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  wire [7:0]             gmii_txd_3;             // From bridge of bridge_ex1.v
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  // End of automatics
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  /* gmii_driver AUTO_TEMPLATE
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   (
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     .\(.*\)  (gmii_\1_@[]),
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   );
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   */
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  gmii_driver driver0
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    (/*AUTOINST*/
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     // Outputs
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     .rxd                               (gmii_rxd_0[7:0]),        // Templated
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     .rx_dv                             (gmii_rx_dv_0),          // Templated
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     .rx_clk                            (gmii_rx_clk_0));        // Templated
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  gmii_driver driver1
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    (/*AUTOINST*/
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     // Outputs
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     .rxd                               (gmii_rxd_1[7:0]),        // Templated
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     .rx_dv                             (gmii_rx_dv_1),          // Templated
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     .rx_clk                            (gmii_rx_clk_1));        // Templated
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  gmii_driver driver2
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    (/*AUTOINST*/
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     // Outputs
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     .rxd                               (gmii_rxd_2[7:0]),        // Templated
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     .rx_dv                             (gmii_rx_dv_2),          // Templated
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     .rx_clk                            (gmii_rx_clk_2));        // Templated
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  gmii_driver driver3
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    (/*AUTOINST*/
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     // Outputs
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     .rxd                               (gmii_rxd_3[7:0]),        // Templated
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     .rx_dv                             (gmii_rx_dv_3),          // Templated
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     .rx_clk                            (gmii_rx_clk_3));        // Templated
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  bridge_ex1 bridge
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    (/*AUTOINST*/
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     // Outputs
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     .gmii_tx_dv_0                      (gmii_tx_dv_0),
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     .gmii_tx_dv_1                      (gmii_tx_dv_1),
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     .gmii_tx_dv_2                      (gmii_tx_dv_2),
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     .gmii_tx_dv_3                      (gmii_tx_dv_3),
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     .gmii_txd_0                        (gmii_txd_0[7:0]),
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     .gmii_txd_1                        (gmii_txd_1[7:0]),
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     .gmii_txd_2                        (gmii_txd_2[7:0]),
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     .gmii_txd_3                        (gmii_txd_3[7:0]),
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     // Inputs
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     .clk                               (clk),
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     .reset                             (reset),
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     .gmii_rx_clk_0                     (gmii_rx_clk_0),
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     .gmii_rx_clk_1                     (gmii_rx_clk_1),
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     .gmii_rx_clk_2                     (gmii_rx_clk_2),
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     .gmii_rx_clk_3                     (gmii_rx_clk_3),
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     .gmii_rx_dv_0                      (gmii_rx_dv_0),
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     .gmii_rx_dv_1                      (gmii_rx_dv_1),
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     .gmii_rx_dv_2                      (gmii_rx_dv_2),
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     .gmii_rx_dv_3                      (gmii_rx_dv_3),
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     .gmii_rxd_0                        (gmii_rxd_0[7:0]),
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     .gmii_rxd_1                        (gmii_rxd_1[7:0]),
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     .gmii_rxd_2                        (gmii_rxd_2[7:0]),
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     .gmii_rxd_3                        (gmii_rxd_3[7:0]));
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endmodule // env_top
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// Local Variables:
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// verilog-library-directories:("." "../rtl")
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// End:

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