OpenCores
URL https://opencores.org/ocsvn/srdydrdy_lib/srdydrdy_lib/trunk

Subversion Repositories srdydrdy_lib

[/] [srdydrdy_lib/] [trunk/] [examples/] [bridge/] [env/] [gmii_driver.v] - Blame information for rev 30

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 8 ghutchis
// Send an ethernet packet over GMII
2
 
3
module gmii_driver
4
  (output reg [7:0] rxd,
5
   output reg       rx_dv,
6
   output reg       rx_clk);
7
 
8
  integer           startup_skew;
9
 
10
  reg [7:0]          rxbuf [0:2048];
11
  reg [31:0]         crc32_result;
12
 
13
  // begin start clock with random skew amount
14
  initial
15
    begin
16
      startup_skew = {$random} % 200;
17
      rx_clk = 0;
18
      rx_dv = 0;
19
      rxd   = 0;
20
      repeat (startup_skew) #0.1;
21
      forever rx_clk = #4 ~rx_clk;
22
    end
23
 
24 24 ghutchis
  task gencrc32;
25
    input [7:0]   length;
26
    output [31:0] icrc;
27
    reg [31:0]    nxt_icrc;
28
    integer       i, len;
29
    begin
30
      icrc = {32{1'b1}};
31
 
32
      for (len=0; len<length; len=len+1)
33
        begin
34
          nxt_icrc[7:0] = icrc[7:0] ^ rxbuf[len];
35
          nxt_icrc[31:8] = icrc[31:8];
36
 
37
          for (i=0; i<8; i=i+1)
38
            begin
39
              if (nxt_icrc[0])
40
                nxt_icrc = nxt_icrc[31:1] ^ 32'hEDB88320;
41
              else
42
                nxt_icrc = nxt_icrc[31:1];
43
            end
44
 
45
          icrc = nxt_icrc;
46 30 ghutchis
          $display ("DEBUG: byte %02d data=%x crc=%x", len, rxbuf[len], icrc);
47 24 ghutchis
        end // for (len=0; len<length; len=len+1)
48
 
49
      icrc = ~icrc;
50
    end
51
  endtask
52
 
53
/* -----\/----- EXCLUDED -----\/-----
54 8 ghutchis
  // Copied from: http://www.mindspring.com/~tcoonan/gencrc.v
55
  //
56
  // Generate a (DOCSIS) CRC32.
57
  //
58
  // Uses the GLOBAL variables:
59
  //
60
  //    Globals referenced:
61
  //       parameter    CRC32_POLY = 32'h04C11DB7;
62
  //       reg [ 7:0]   crc32_packet[0:255];
63
  //       integer      crc32_length;
64
  //
65
  //    Globals modified:
66
  //       reg [31:0]   crc32_result;
67
  //
68
  localparam    CRC32_POLY = 32'h04C11DB7;
69
  task gencrc32;
70
    input [31:09] crc32_length;
71
    integer     cbyte, cbit;
72
    reg         msb;
73
    reg [7:0]   current_cbyte;
74
    reg [31:0]  temp;
75
    begin
76
      crc32_result = 32'hffffffff;
77
      for (cbyte = 0; cbyte < crc32_length; cbyte = cbyte + 1) begin
78
        current_cbyte = rxbuf[cbyte];
79
         for (cbit = 0; cbit < 8; cbit = cbit + 1) begin
80
            msb = crc32_result[31];
81
            crc32_result = crc32_result << 1;
82
            if (msb != current_cbyte[cbit]) begin
83
               crc32_result = crc32_result ^ CRC32_POLY;
84
               crc32_result[0] = 1;
85
            end
86
         end
87
      end
88
 
89
      // Last step is to "mirror" every bit, swap the 4 bytes, and then complement each bit.
90
      //
91
      // Mirror:
92
      for (cbit = 0; cbit < 32; cbit = cbit + 1)
93
         temp[31-cbit] = crc32_result[cbit];
94
 
95
      // Swap and Complement:
96
      crc32_result = ~{temp[7:0], temp[15:8], temp[23:16], temp[31:24]};
97
   end
98
endtask
99 24 ghutchis
 -----/\----- EXCLUDED -----/\----- */
100 8 ghutchis
 
101 11 ghutchis
  task print_packet;
102
    input [31:0] length;
103
    integer      i;
104
    begin
105
      for (i=0; i<length; i=i+1)
106
        begin
107
          if (i % 16 == 0) $write ("%x: ", i[15:0]);
108
          $write ("%x ", rxbuf[i]);
109
          if (i % 16 == 7) $write ("| ");
110
          if (i % 16 == 15) $write ("\n");
111
        end
112
      if (i % 16 != 0) $write ("\n");
113
    end
114
  endtask
115
 
116 8 ghutchis
  task send_packet;
117
    input [47:0] da, sa;
118
    input [15:0] length;
119
    integer      p;
120
    begin
121
      { rxbuf[0],rxbuf[1],rxbuf[2],rxbuf[3],rxbuf[4],rxbuf[5] } = da;
122
      { rxbuf[6],rxbuf[7],rxbuf[8],rxbuf[9],rxbuf[10],rxbuf[11] } = sa;
123
      for (p=12; p<length; p=p+1)
124
        rxbuf[p] = $random;
125
 
126 24 ghutchis
      //gencrc32 (length);
127 30 ghutchis
      gencrc32 (length-4, crc32_result);
128 24 ghutchis
      { rxbuf[length-1], rxbuf[length-2],
129
        rxbuf[length-3], rxbuf[length-4] } = crc32_result;
130 8 ghutchis
 
131
      $display ("%m : Sending packet DA=%x SA=%x of length %0d", da, sa, length);
132 11 ghutchis
      print_packet (length);
133
 
134 8 ghutchis
      repeat (7)
135
        begin
136
          @(posedge rx_clk);
137
          rx_dv <= #1 1;
138
          rxd   <= #1 `GMII_PRE;
139
        end
140
 
141
      @(posedge rx_clk);
142
      rxd <= #1 `GMII_SFD;
143
 
144
      p = 0;
145
      while (p < length)
146
        begin
147
          @(posedge rx_clk);
148
          rxd <= #1 rxbuf[p];
149
          p = p + 1;
150
        end
151
 
152
      // complete 12B inter frame gap
153
      repeat (12)
154
        begin
155
          @(posedge rx_clk);
156
          rx_dv <= #1 0;
157
          rxd   <= #1 0;
158
        end
159
    end
160
  endtask // send_packet
161
 
162
 
163
endmodule // gmii_driver

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.