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[/] [srdydrdy_lib/] [trunk/] [examples/] [bridge/] [rtl/] [port_ring_tap_fsm.v] - Blame information for rev 5

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1 5 ghutchis 
module port_ring_tap_fsm
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  #(parameter rdp_sz = 64,
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    parameter portnum = 0)
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  (
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   input               clk,
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   input               reset,
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   output reg               lfli_drdy,
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   output reg               lprx_drdy,
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   output reg[rdp_sz-1:0]    lptx_data,
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   output reg               lptx_srdy,
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   output reg               lri_drdy,
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   output reg[rdp_sz-1:0]    lro_data,
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   output reg               lro_srdy,
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   input [rdp_sz-1:0]   lfli_data,
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   input               lfli_srdy,
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   input [rdp_sz-1:0]   lprx_data,
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   input               lprx_srdy,
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   input               lptx_drdy,
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   input [rdp_sz-1:0]   lri_data,
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   input               lri_srdy,
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   input               lro_drdy
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   // End of automatics
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   );
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  reg [6:0]            state, nxt_state;
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  wire [`NUM_PORTS-1:0] port_mask;
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  reg [`NUM_PORTS-1:0]  pe_vec, nxt_pe_vec;
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  assign port_mask = 1 << portnum;
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  parameter s_idle = 0,
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              s_rcmd = 1,
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              s_rfwd = 2,
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              s_rcopy = 3,
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              s_rsink = 4,
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              s_tcmd = 5,
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              s_tdata = 6;
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  always @*
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    begin
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      lro_data = lri_data;
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      case (1'b1)
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        state[s_idle] :
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          begin
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            if (lfli_srdy)
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              begin
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              end
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            else if (lri_srdy)
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              begin
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                if (lri_data[`PRW_DATA] & port_mask)
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                  begin
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                    // packet is for our port
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                    nxt_pe_vec = lri_data[`PRW_DATA] & ~port_mask;
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                    // if enable vector is not empty, send the
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                    // vector to the next port
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                    if ((nxt_pe_vec != 0) & lro_drdy)
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                      begin
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                        lro_data[`PRW_DATA] = nxt_pe_vec;
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                        lro_data[`PRW_PVEC] = 1;
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                        lro_srdy = 1;
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                        lri_drdy = 1;
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                        nxt_state = ns_rcopy;
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                      end
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                    else
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                      begin
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                        lri_drdy = 1;
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                        nxt_state = ns_rsink;
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                      end // else: !if((nxt_pe_vec != 0) & lro_drdy)
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                  end // if (lri_data[`PRW_DATA] & port_mask)
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                else
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                  // packet is not for our port, forward it on the
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                  // ring
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                  begin
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                    if (lro_drdy)
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                      begin
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                        lri_drdy = 1;
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                        lro_srdy = 1;
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                        nxt_state = ns_rfwd;
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                      end
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                  end // else: !if(lri_data[`PRW_DATA] & port_mask)
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              end // if (lri_srdy)
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          end // case: state[s_idle]
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        default : nxt_state = ns_idle;
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      endcase // case (1'b1)
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    end // always @ *
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endmodule // port_ring_tap_fsm

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