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sinclairrf |
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<!-- Copyright 2012, Sinclair R.F., Inc. -->
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<html>
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<title>
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macros
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</title>
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<body>
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<h1>Macros for the 9x8 micro controller</h1><br/>
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Copyright 2012, Sinclair R.F., Inc.<br/><br/>
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This document describes the macros for 9x8 micro controller.<br/><br/>
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Macros are used to access opcodes that cannot be used directly or to help
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improve code readability and provide syntax checking for some
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opcodes.<br/><br/>
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<h2>call, callc, jump, and jumpc</h2>
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The unconditional and the conditional call and jump instructions are three
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instruction sequences. The first instructions pushes the 8 lsb of
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the target address onto the stack, the second instruction is the jump or
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call with the 5 msb of the target address encoded into the
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instruction, and the third instruction is the instruction that is always
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executed immediately after the jump or call. Because the first two
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instructions are dependent on the target address a macro is required to
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generate the push and the call or jump instruction. Also, because the
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instruction immediately after the call or jump is always executed
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immediately after the call or jump it is also generated by the macro. The
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default value for this third instruction can be changed by including it as
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the optional second argument to the macro.<br/><br/>
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<h2>fetch, fetch+, fetch-, store, store+, and store-</h2>
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The fetch and store instructions required the 2 bit memory bank index
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to be encoded as part of the fetch or store instruction. The memory bank
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is specified by its name.<br/><br/>
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The macros also ensure that the provided symbol is a memory bank
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name.<br/><br/>
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<h2>fetchvalue and storevalue</h2>
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These macros are used read a value from or write a value to memory by
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variable name. The offset of the variable within the memory bank is
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pushed onto the data stack and the memory bank associated with the
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variable is encoded into the <tt>fetch</tt> or <tt>store</tt> instruction.
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The <tt>storevalue</tt> macro also consumes the top of the data stack by
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adding a third, <tt>drop</tt> instruction.<br/><br/>
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These macros ensure that the provided symbol is a variable name.<br/><br/>
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<h2>fetchvector and storevector</h2>
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These macros are used to generate multi-instructions sequences to transfer
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two or more values between the memory and the data stack. The storevector
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macro transfers the data stack to memory with the top of the data stack
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stored at the specified variable, the next value stored at the next
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location in memory and so forth. The fetchvector macro reads the values
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from memory in the reverse order in which they were stored so that the
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fetchvector and storevector macros are inverses of each other.<br/><br/>
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If the MSB of a multi-byte value is stored at the top of the data stack as
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per the Forth convention, then the storevector macro places the MSB at the
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specified variable and the subsequent less significant bytes at subsequent
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locations in memory.<br/><br/>
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These macros ensure that the provided symbol is a variable name.<br/><br/>
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<h2>fetchindexed and storeindex</h2>
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If the top of the data stack is an index into a multi-byte value, these
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macros can be used to fetch or store the associated value from the
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specified variable. Using the macro ensures the correct memory bank is
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used for the specified variable.<br/><br/>
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These macros ensure that the provided symbol is a variable name.<br/><br/>
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<h2>inport and outport</h2>
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The <tt>inport</tt> and <tt>outport</tt> instructions can be specified
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directly in the assembly file. However, the code reliability and
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readability can be improved by using the macros. For example, if the top
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of the data stack is to be output to the specified port and then dropped,
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the macro <tt>.outport(O_NAME)</tt> will generate the required three
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instruction sequence.<br/><br/>
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These macros also ensure that and input port or an output port respectively
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are specified to the macro, thus helping to identify coding
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mistakes.<br/><br/>
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<h2>return</h2>
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Because the instruction immediately following the return instruction is
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executed immediately after the return instruction, a macro is used to
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ensure that the two instruction sequence is properly generated. The
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default instruction can be changed by providing the optional argument to
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the macro.<br/><br/>
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<h1>Macros</h1>
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Alphebetic listing:
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<a href="#.call">.call</a>,
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<a href="#.callc">.callc</a>,
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<a href="#.fetch">.fetch</a>,
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<a href="#.fetch+">.fetch+</a>,
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<a href="#.fetch-">.fetch-</a>,
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<a href="#.fetchindexed">.fetchindexed</a>,
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<a href="#.fetchvalue">.fetchvalue</a>,
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<a href="#.fetchvector">.fetchvector</a>,
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<a href="#.inport">.inport</a>,
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<a href="#.jump">.jump</a>,
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<a href="#.jumpc">.jumpc</a>,
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<a href="#.outport">.outport</a>,
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<a href="#.return">.return</a>,
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<a href="#.store">.store</a>,
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<a href="#.store+">.store+</a>,
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<a href="#.store-">.store-</a>,
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<a href="#.storeindexed">.storeindexed</a>,
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<a href="#.storevalue">.storevalue</a>,
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and <a href="#.storevector">.storevector</a>.<br/><br/>
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<h2><a name=".call">.call</a></h2>
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<b>Description:</b> Generate the 3 instruction sequence associated with a <tt>call</tt> instruction.<br/><br/>
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<b>Operation(1):</b> <tt>.call(label)</tt> generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — call with the 5 msb of the label address encoded in the call instruction<br/>
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3 — no operation<br/><br/>
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<b>Operation(2):</b> <tt>.call(label,op)</tt> where "op" is an instruction generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — call with the 5 msb of the label address encoded in the call instruction<br/>
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3 — op<br/><br/>
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Note that Operation(1) is a special case of Operation(2) with "op" being the <tt>nop</tt> instruction.<br/>
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<h2><a name=".callc">.callc</a></h2>
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<b>Description:</b> Generate the 3 instruction sequence associated with a <tt>callc</tt> instruction.<br/><br/>
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<b>Operation(1):</b> <tt>.callc(label)</tt> generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — callc with the 5 msb of the label address encoded in the callc instruction<br/>
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3 — drop<br/><br/>
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<b>Operation(2):</b> <tt>.callc(label,op)</tt> where "op" is an instruction generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — callc with the 5 msb of the label address encoded in the callc instruction<br/>
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3 — op<br/><br/>
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Note that Operation(1) is a special case of Operation(2) with "op" being the <tt>drop</tt> instruction.<br/>
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<h2><a name=".fetch">.fetch</a></h2>
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<b>Description:</b> Generate the <tt>fetch</tt> instruction.<br/><br/>
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<b>Operation:</b> <tt>.fetch(ram)</tt> generates the following instruction:<br/>
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1 — fetch with the 2 bit memory index encoded in the fetch instruction.<br/>
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<h2><a name=".fetch+">.fetch+</a></h2>
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<b>Description:</b> Generate the <tt>fetch+</tt> instruction.<br/><br/>
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<b>Operation:</b> <tt>.fetch+(ram)</tt> generates the following instruction:<br/>
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1 — fetch+ with the 2 bit memory index encoded in the fetch+ instruction.<br/>
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<h2><a name=".fetch-">.fetch-</a></h2>
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<b>Description:</b> Generate the <tt>fetch-</tt> instruction.<br/><br/>
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<b>Operation:</b> <tt>.fetch-(ram)</tt> generates the following instruction:<br/>
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1 — fetch- with the 2 bit memory index encoded in the fetch- instruction.<br/>
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<h2><a name=".fetchindexed">.fetchindexed</a></h2>
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TODO
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<h2><a name=".fetchvalue">.fetchvalue</a></h2>
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TODO
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<h2><a name=".fetchvector">.fetchvector</a></h2>
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TODO
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<h2><a name=".inport">.inport</a></h2>
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<b>Description:</b> Generate the 2 instruction sequence associated with a <tt>inport</tt> instruction.<br/><br/>
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<b>Operation:</b> <tt>.inport(label)</tt> generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — <tt>inport</tt><br/>
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<h2>.jump</h2>
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<b>Description:</b> Generate the 3 instruction sequence associated with a <tt>jump</tt> instruction.<br/><br/>
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<b>Operation(1):</b> <tt>.jump(label)</tt> generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — jump with the 5 msb of the label address encoded in the jump instruction<br/>
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3 — no operation<br/><br/>
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<b>Operation(2):</b> <tt>.jump(label,op)</tt> where "op" is an instruction generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — jump with the 5 msb of the label address encoded in the jump instruction<br/>
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3 — op<br/><br/>
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Note that Operation(1) is a special case of Operation(2) with "op" being the <tt>nop</tt> instruction.<br/>
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<h2>.jumpc</h2>
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<b>Description:</b> Generate the 3 instruction sequence associated with a <tt>jumpc</tt> instruction.<br/><br/>
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<b>Operation(1):</b> <tt>.jumpc(label)</tt> generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — jumpc with the 5 msb of the label address encoded in the jumpc instruction<br/>
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3 — drop<br/><br/>
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<b>Operation(2):</b> <tt>.jumpc(label,op)</tt> where "op" is an instruction generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — jumpc with the 5 msb of the label address encoded in the jumpc instruction<br/>
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3 — op<br/><br/>
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Note that Operation(1) is a special case of Operation(2) with "op" being the <tt>drop</tt> instruction.<br/>
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<h2><a name=".outport">.outport</a></h2>
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<b>Description:</b> Generate the 3 instruction sequence associated with a <tt>outport</tt> instruction.<br/><br/>
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<b>Operation(1):</b> <tt>.outport(label)</tt> generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — <tt>outport</tt><br/>
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3 — <tt>drop</tt><br/><br/>
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<b>Operation(2):</b> <tt>.outport(label,op)</tt> generates the following 3 instructions:<br/>
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1 — push the 8 lsb of the label address onto the data stack<br/>
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2 — <tt>outport</tt><br/>
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3 — op<br/><br/>
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Note that Operation(1) is a special case of Operation(2) with "op" being the <tt>drop</tt> instruction.<br/>
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<h2><a name=".return">.return</a></h2>
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TODO
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<h2><a name=".store">.store</a></h2>
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<b>Description:</b> Generate the <tt>store</tt> instruction.<br/><br/>
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<b>Operation:</b> <tt>.store(ram)</tt> generates the following instruction:<br/>
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1 — store with the 2 bit memory index encoded in the store instruction.<br/>
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<h2><a name=".store+">.store+</a></h2>
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<b>Description:</b> Generate the <tt>store+</tt> instruction.<br/><br/>
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<b>Operation:</b> <tt>.store+(ram)</tt> generates the following instruction:<br/>
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1 — store+ with the 2 bit memory index encoded in the store+ instruction.<br/>
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<h2><a name=".store-">.store-</a></h2>
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<b>Description:</b> Generate the <tt>store-</tt> instruction.<br/><br/>
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<b>Operation:</b> <tt>.store-(ram)</tt> generates the following instruction:<br/>
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1 — store- with the 2 bit memory index encoded in the store- instruction.<br/>
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<h2><a name=".storeindexed">.storeindexed</a></h2>
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TODO
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<h2><a name=".storevalue">.storevalue</a></h2>
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TODO
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<h2><a name=".storevector">.storevector</a></h2>
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TODO
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</body>
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</html>
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