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sinclairrf |
//
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// PERIPHERAL PWM_8bit: @NAME@
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//
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localparam L__COUNT = @COUNT@-1;
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localparam L__COUNT_NBITS = $clog2(L__COUNT+1);
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generate
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// generate the ticks for the PWM
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reg [L__COUNT_NBITS-1:0] s__tick_counter = L__COUNT[0+:L__COUNT_NBITS];
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reg s__tick_counter_is_zero = 1'b0;
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always @ (posedge i_clk)
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if (i_rst) begin
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s__tick_counter <= L__COUNT[0+:L__COUNT_NBITS];
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s__tick_counter_is_zero <= 1'b0;
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end else if (s__tick_counter_is_zero) begin
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s__tick_counter <= L__COUNT[0+:L__COUNT_NBITS];
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s__tick_counter_is_zero <= 1'b0;
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end else begin
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s__tick_counter <= s__tick_counter - { {(L__COUNT_NBITS-1){1'b0}}, 1'b1 };
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s__tick_counter_is_zero <= (s__tick_counter == { {(L__COUNT_NBITS-1){1'b0}}, 1'b1 });
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end
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// run the 1 to 255 PWM counter
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reg [7:0] s__pwm_counter = 8'd1;
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always @ (posedge i_clk)
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if (i_rst)
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s__pwm_counter <= 8'd1;
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else if (s__tick_counter_is_zero)
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if (s__pwm_counter == 8'hFF)
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s__pwm_counter <= 8'd1;
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else
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s__pwm_counter <= s__pwm_counter + 8'd1;
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else
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s__pwm_counter <= s__pwm_counter;
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// Use a loop to instantiate each channel
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reg [@INSTANCES@-1:0] s__raw = {(@INSTANCES@){@OFF@}};
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genvar ix;
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for (ix=0; ix<@INSTANCES@; ix=ix+1) begin : gen__channel
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reg [7:0] s__threshold = 8'd0;
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/* verilator lint_off WIDTH */
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wire [7:0] s__ix = ix; // Xilinx ISE can't bit-slice a genvar
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/* verilator lint_on WIDTH */
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always @ (posedge i_clk)
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if (i_rst)
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s__threshold <= 8'd0;
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else if (s_outport && (s_T == (8'd@IX_OUTPORT_0@ + s__ix)))
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s__threshold <= s_N;
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else
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s__threshold <= s__threshold;
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wire [7:0] s__threshold_use;
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if (@NORUNT@) begin : gen__norunt
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reg [7:0] s__threshold_use_tmp = 8'd0;
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always @ (posedge i_clk)
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if (i_rst)
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s__threshold_use_tmp <= 8'd0;
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else if (s__tick_counter_is_zero && (s__pwm_counter == 8'd255))
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s__threshold_use_tmp <= s__threshold;
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else
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s__threshold_use_tmp <= s__threshold_use_tmp;
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assign s__threshold_use = s__threshold_use_tmp;
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end else begin : gen__not_norunt
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assign s__threshold_use = s__threshold;
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end
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always @ (posedge i_clk)
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if (i_rst)
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s__raw[ix] <= @OFF@;
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else
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s__raw[ix] <= (s__pwm_counter <= s__threshold_use) ? @ON@ : @OFF@;
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end
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// needed since 1-bit wide signals don't have indices.
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always @ (s__raw)
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@NAME@ = s__raw;
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endgenerate
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