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[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [AXI4_Lite_Master/] [tb_AXI4_Lite_Master.s] - Blame information for rev 2

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1 2 sinclairrf
; Copyright 2013, Sinclair R.F., Inc.
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; Test bench for AXI4-Lite master peripheral.
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.main
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  ; Write 4 bytes.
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  0x0F 0x01 0x02 0x03 0x04 .call(alm_write_u32,0x7C)
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  ; Read 4 bytes.
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  .call(alm_read_u32,0x7C)
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  ; Write the gray code of the address to all of memory
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  0x80 :loop_write_all
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    4 - >r
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    0x0F r@ ${4-1} :loop_4 >r
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      dup dup 0>> ^ swap 1+
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    r> .jumpc(loop_4,1-) drop drop
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    r@ .call(alm_write_u32)
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  r> .jumpc(loop_write_all,nop) drop
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  ; Issue several reads.
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  0x40 :loop_read >r
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    r@ .call(alm_read_u32)
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    ${4-1} :loop_diag >r .outport(O_DIAG_DATA) r> .jumpc(loop_diag,1-) drop
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  r> .jumpc(loop_read,0>>) drop
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  ; Send termination strobe to the test bench and then wait forever.
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  .outstrobe(O_DONE)
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  :infinite .jump(infinite)
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; Read a 32-bit value at a 32-bit aligned address.
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; ( u_addr - u_LSB u u u_MSB )
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.function alm_read_u32
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  ; Output the 7-bit address.
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  .outport(O_ALM_ADDRESS)
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  ; Issue the strobe that starts the read process.
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  .outstrobe(O_ALM_CMD_READ)
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  ; Wait for the read process to finish.
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  :wait .inport(I_ALM_BUSY) .jumpc(wait)
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  ; Read the 4 bytes
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  ${4-1} :loop_read .inport(I_ALM_READ_BYTE) swap .jumpc(loop_read,1-) drop
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  .return
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; Issue a write
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; ( u_we u_LSB u u u_MSB u_addr - )
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.function alm_write_u32
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  ; Output the 7-bit address.
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  .outport(O_ALM_ADDRESS)
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  ; Output the 4 data bytes, MSB first.
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  ${4-1} :loop_data swap .outport(O_ALM_DATA) .jumpc(loop_data,1-) drop
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  ; Ensure all 4 bytes are written.
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  .outport(O_ALM_WE)
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  ; Issue the strobe that starts the write.
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  .outstrobe(O_ALM_CMD_WRITE)
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  ; Wait for the write process to finish.
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  :wait .inport(I_ALM_BUSY) .jumpc(wait)
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  .return

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