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[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [UART/] [tb_UART.s] - Blame information for rev 2

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Line No. Rev Author Line
1 2 sinclairrf
; Copyright 2013, Sinclair R.F., Inc.
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; Test bench for UARTx peripheral.
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.main
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; Put a message into the output FIFO on UART1 including the null terminator.
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N"Hello World!\r\n"
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:out_loop O_UART1_Tx outport .jumpc(out_loop)
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; Echo the input on UART1 to the output on UART2 up to and including the null
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; terminator.
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:echo_loop .inport(I_UART1_RX_EMPTY) .jumpc(echo_loop)
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  .inport(I_UART1_Rx) O_UART2_Tx outport .jumpc(echo_loop)
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; Copy the UART2 input FIFO to the output port up to and including the null
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; terminator.
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:copy_loop .inport(I_UART2_RX_EMPTY) .jumpc(copy_loop)
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  .inport(I_UART2_Rx) O_DATA outport .jumpc(copy_loop)
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; Signal program termination.
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0x01 .outport(O_DONE)
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; Wait forever.
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:infinite .jump(infinite)

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