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[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [UART_CTS_RTR/] [tb_UART_CTS_RTR.s] - Blame information for rev 6

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Line No. Rev Author Line
1 6 sinclairrf
; Copyright 2014, Sinclair R.F., Inc.
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; Test bench for UART peripheral with CTS/CTSn and RTR/RTRn flow controls
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; enabled.
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.main
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; Put a message significantly longer than 24 bytes on the data stack.
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N"ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz"
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; Transmit bytes to UART1 until its FIFO is full.
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:out_uart1 .outport(O_UART1_TX) .inport(I_UART1_TX_BUSY) 0= .jumpc(out_uart1)
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; Wait 100 usec on a 10 MHz clock ==> wait 1000 clock cycles.
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${(1000/4)-1} :wait nop .jumpc(wait,1-) drop
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; Loop until the 'z' makes it out from UART4.
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:loop
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  dup 0= .jumpc(no_UART1)
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    .inport(I_UART1_TX_BUSY) .jumpc(no_UART1)
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    .outport(O_UART1_TX)
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  :no_UART1
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  .inport(I_UART2_RX_EMPTY) .inport(I_UART2_TX_BUSY) or .jumpc(no_UART2)
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    .inport(I_UART2_RX) .outport(O_UART2_TX)
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  :no_UART2
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  .inport(I_UART3_RX_EMPTY) .inport(I_UART3_TX_BUSY) or .jumpc(no_UART3)
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    .inport(I_UART3_RX) .outport(O_UART3_TX)
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  :no_UART3
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  .inport(I_UART4_RX_EMPTY) .jumpc(loop)
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  .inport(I_UART4_RX)
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  O_DATA outport
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  'z' - .jumpc(loop)
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; Signal program termination.
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0x01 .outport(O_DONE)
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; Wait forever.
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:infinite .jump(infinite)

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