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[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [UART_Rx/] [tb_UART_Rx.s-fifo] - Blame information for rev 12

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Line No. Rev Author Line
1 2 sinclairrf
; Copyright 2013, Sinclair R.F., Inc.
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;
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; Test bench for UART_Rx peripheral with FIFO.
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.main
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  ; Wait for the entire message to be transmitted.
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  0x00 0x41 >r :wait
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    .jumpc(no_major_dec,1-) r> 1- >r :no_major_dec r@ -1<> .jumpc(wait)
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  ; Read from the UART Rx port until it's empty
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  :loop .inport(I_UART_RX_EMPTY) .jumpc(end_loop)
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    .inport(I_UART_RX) .outport(O_DATA)
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    .jump(loop)
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  :end_loop
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  ; Signal program termination.
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  1 .outport(O_DONE)
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  ; Wait forever.
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  :infinite .jump(infinite)

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