OpenCores
URL https://opencores.org/ocsvn/ssbcc/ssbcc/trunk

Subversion Repositories ssbcc

[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [UART_Rx/] [tb_UART_Rx.s-rtrn] - Blame information for rev 9

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 9 sinclairrf
; Copyright 2015, Sinclair R.F., Inc.
2
;
3
; Test bench for UART_Rx peripheral with RTRn signal output.
4
 
5
.main
6
 
7
  ; Wait for the FIFO to fill.
8
  0x00 0x41 >r :wait
9
    .jumpc(no_major_dec,1-) r> 1- >r :no_major_dec r@ -1<> .jumpc(wait)
10
 
11
  ; Read from the UART Rx port until the terminating null character is encountered.
12
  :loop
13
    ;If no character is available, then continue waiting.
14
    .inport(I_UART_RX_EMPTY) .jumpc(loop)
15
    ; Read the next character and output it, preserving it on the data stack.
16
    .inport(I_UART_RX) O_DATA outport
17
    ; If the character was not a null character, then continue running the loop.
18
    .jumpc(loop)
19
 
20
  ; Signal program termination.
21
  1 .outport(O_DONE)
22
 
23
  ; Wait forever.
24
  :infinite .jump(infinite)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.