Subversion Repositories ssbcc

#

# Copyright 2012, Sinclair R.F., Inc.

#

# Test bench for UART_Tx peripheral.

#

ARCHITECTURE    core/9x8 Verilog

INSTRUCTION     64

DATA_STACK      32

RETURN_STACK    16

PARAMETER       G_CLK_FREQ_HZ   100_000_000

PARAMETER       G_BAUD          230400

PERIPHERAL      UART_Tx         outport=O_UART1_TX \

                                outstatus=I_UART1_TX \

                                outsignal=o_uart1_tx \

                                baudmethod=868 \

                                outFIFO=32

PERIPHERAL      UART_Tx         outport=O_UART2_TX \

                                outstatus=I_UART2_TX \

                                outsignal=o_uart2_tx \

                                baudmethod=G_CLK_FREQ_HZ/115200 \

                                outFIFO=32

PERIPHERAL      UART_Tx         outport=O_UART3_TX \

                                outstatus=I_UART3_TX \

                                outsignal=o_uart3_tx \

                                baudmethod=100_000_000/G_BAUD \

                                noOutFIFO \

                                nStop=2

OUTPORT 1-bit o_done O_DONE

ASSEMBLY tb_UART_Tx.s