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[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [adder_16bit/] [tb_adder_16bit.9x8] - Blame information for rev 2

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#
# Copyright 2012, Sinclair R.F., Inc.
#
# Test bench for adder_16bit peripheral.
#
 
ARCHITECTURE    core/9x8 Verilog
INSTRUCTION     128
DATA_STACK      32
RETURN_STACK    16
 
OUTPORT         8-bit,strobe    o_v_out,o_v_wr  O_V_OUT
OUTPORT         1-bit           o_done          O_DONE
 
PERIPHERAL      adder_16bit
 
ASSEMBLY tb_adder_16bit.s

Line No.	Rev	Author	Line
1	2	sinclairrf	`#`
2			`# Copyright 2012, Sinclair R.F., Inc.`
3			`#`
4			`# Test bench for adder_16bit peripheral.`
5			`#`
6
7			`ARCHITECTURE core/9x8 Verilog`
8			`INSTRUCTION 128`
9			`DATA_STACK 32`
10			`RETURN_STACK 16`
11
12			`OUTPORT 8-bit,strobe o_v_out,o_v_wr O_V_OUT`
13			`OUTPORT 1-bit o_done O_DONE`
14
15			`PERIPHERAL adder_16bit`
16
17			`ASSEMBLY tb_adder_16bit.s`

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[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [adder_16bit/] [tb_adder_16bit.9x8] - Blame information for rev 2