OpenCores
URL https://opencores.org/ocsvn/ssbcc/ssbcc/trunk

Subversion Repositories ssbcc

[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [adder_16bit/] [tb_adder_16bit.s] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 sinclairrf
; Copyright 2012, Sinclair R.F., Inc.
2
;
3
; Test bench for adder_16bit peripheral.
4
 
5
.include adder_16bit.s
6
 
7
.main
8
 
9
  ; eat a few cycles
10
  ${2-1} :loop .jumpc(loop,1-) drop
11
 
12
  ; 0x1234 + 0x5678
13
  0x34 0x12 0x78 0x56 .call(addsub_u16_u16__u16,0) .outport(O_V_OUT) .outport(O_V_OUT)
14
  ; 0x5678 - 0x1234
15
  0x78 0x56 0x34 0x12 .call(addsub_u16_u16__u16,1) .outport(O_V_OUT) .outport(O_V_OUT)
16
  ; 0xFFFF + 0x0001
17
  0xFF 0xFF 0x01 0x00 .call(addsub_u16_u16__u16,0) .outport(O_V_OUT) .outport(O_V_OUT)
18
  ; 0xFFFF + 0x0100
19
  0xFF 0xFF 0x00 0x01 .call(addsub_u16_u16__u16,0) .outport(O_V_OUT) .outport(O_V_OUT)
20
  ; 0x0000 - 0x0001
21
  0x00 0x00 0x01 0x00 .call(addsub_u16_u16__u16,1) .outport(O_V_OUT) .outport(O_V_OUT)
22
 
23
  ; signal the end of the test and enter an infinite loop.
24
  1 .outport(O_DONE)
25
  :infinite .jump(infinite)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.