Subversion Repositories ssbcc

#

# Copyright 2013, Sinclair R.F., Inc.

#

# Test bench for counter peripheral.

#

ARCHITECTURE core/9x8 Verilog

INSTRUCTION     1024

DATA_STACK      32

RETURN_STACK    32

PORTCOMMENT     narrow counter

PERIPHERAL      counter         insignal=i_strobe_narrow \

                                inport=I_STROBE_NARROW

PORTCOMMENT     wide counter

PERIPHERAL      counter         insignal=i_strobe_wide \

                                inport=I_STROBE_WIDE \

                                width=12 \

                                outlatch=O_LATCH_STROBE_WIDE

PORTCOMMENT     diagnostic output

OUTPORT         8-bit           o_diag_msb \

                                O_DIAG_MSB

OUTPORT         8-bit           o_diag_lsb \

                                O_DIAG_LSB

OUTPORT         strobe          o_diag_wr \

                                O_DIAG_WR

PORTCOMMENT     termination signal

OUTPORT         strobe          o_done \

                                O_DONE

ASSEMBLY tb_counter.s