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https://opencores.org/ocsvn/ssbcc/ssbcc/trunk
[/] [ssbcc/] [trunk/] [core/] [9x8/] [tb/] [arch/] [arch-2r2m.s] - Blame information for rev 2
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sinclairrf |
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; Copyright 2013, Sinclair R.F., Inc.
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;
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; Test memory I/O
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.memory RAM ram_a
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.variable a 0*${size['ram_a']}
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.memory RAM ram_b
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.variable b 0*${size['ram_b']}
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.include init.s
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.main
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;
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; Write to memory a, then memory b, then memory a again (to help detect write
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; errors for any memory configuration).
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;
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${size['ram_a']/2} :loop_write_a0 0xA5 over ^ over .store(ram_a) drop .jumpc(loop_write_a0,0>>) drop
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${size['ram_b']/2} :loop_write_b0 0x96 over ^ over .store(ram_b) drop .jumpc(loop_write_b0,0>>) drop
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${size['ram_a']/2} :loop_write_a1 0x5A over ^ over .store(ram_a) drop .jumpc(loop_write_a1,0>>) drop
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; Read the final memory values.
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${size['ram_a']/2} :loop_read_a dup .fetch(ram_a) drop .jumpc(loop_read_a,0>>) drop
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${size['ram_b']/2} :loop_read_b dup .fetch(ram_b) drop .jumpc(loop_read_b,0>>) drop
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${size['rom_z']-1} :loop_read_z dup .fetch(rom_z) drop .jumpc(loop_read_z,1-) drop
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${size['rom_y']-1} :loop_read_y dup .fetch(rom_y) drop .jumpc(loop_read_y,1-) drop
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; Terminate the simulation.
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.outstrobe(O_DONE_STROBE)
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; Sit in an infinite loop.
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:infinite .jump(infinite)
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