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<html>
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<title>
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Memory Initialization
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</title>
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<body>
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This file describes the contents of the memory intialization file and how to
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use it for various vendor-specific tools.
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<h1>Format</h1>
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  Each line of the file consists of a hex address into which the values are to
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  be stored and the corresponding value.  For SSBCC.9x8 these are 9-bit
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  values.<br/><br/>
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  The format of each line is "<tt>@%04X %03X</tt>" where the 4-digit value is
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  the hex memory address and the 3-digit hex value is the 9-bit memory
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  value.<br/><br/>
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<h1>Xilinx <tt>data2mem</tt></h1>
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  <tt>data2mem</tt> is a tool for modifying the block ram initialization
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  contents of bitstreams.  Using this tool allows the micro controller assembly
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  code to be modified in the bitstream without rerunning the entire build
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  process.<br/><br/>
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  The following illustrates how to use <tt>data2mem</tt> using
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  ISE&nbsp;14.5:<br/><br/>
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  <ol>
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  <li>Create a <tt>BMM</tt> file named "<tt>uc.bmm</tt>" for inclusion in the
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    build process:<br/><br/>
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    The file should look like the following.  The text
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    "<tt>top_inst/uc_inst</tt>" needs to be modified to point to your
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    instantiation of the micro controller.  Sometimes
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    "<tt>uc_inst/Mram_s_opcodeMemory</tt>" becomes
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    "<tt>uc_inst_Mram_s_opcodeMemory</tt>"<br/><br/>
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    <tt>ADDRESS_SPACE&nbsp;uc&nbsp;RAMB18&nbsp;WORD_ADDRESSING&nbsp;[0x0:0x7FF]<br/>
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    &nbsp;&nbsp;BUS_BLOCK<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;top_inst/uc_inst/Mram_s_opcodeMemory&nbsp;[0:8];<br/>
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    &nbsp;&nbsp;END_BUS_BLOCK;<br/>
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    END_ADDRESS_SPACE;<br/></tt><br/>
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    The following command can be used to verify the syntax of this <tt>BMM</tt>
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    file:<br/><br/>
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    <tt>&nbsp;&nbsp;data2mem&nbsp;-bm&nbsp;uc_bmm<br/></tt><br/>
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    WARNING:  Using "<tt>ARCHITECTURE&nbsp;4096</tt>" on a Spartan-6 build
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    produced two RAMB16's and one RAMB8, not the expected two RAMB18's.
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    Changing the configuration command to "<tt>ARCHITECTURE&nbsp;2048*2</tt>"
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    produced the desired results.  The following <tt>BMM</tt> extracted the two
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    RAMB18 locations with the desired memory mapping:<br/><br/>
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    <tt>ADDRESS_SPACE&nbsp;uc&nbsp;RAMB18&nbsp;WORD_ADDRESSING&nbsp;[0x0:0xFFF]<br/>
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    &nbsp;&nbsp;BUS_BLOCK<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;top_inst/uc_inst_Mram_s_opcodeMemory_0&nbsp;[0:8];<br/>
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    &nbsp;&nbsp;END_BUS_BLOCK;<br/>
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    &nbsp;&nbsp;BUS_BLOCK<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;top_inst/uc_inst_Mram_s_opcodeMemory_1&nbsp;[0:8];<br/>
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    &nbsp;&nbsp;END_BUS_BLOCK;<br/>
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    END_ADDRESS_SPACE;<br/></tt><br/>
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    Note:  For a Spartan-3A the bit indices <tt>[0:8]</tt> may need to be reversed.<br/><br/>
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  <li>Add this file to the build process.<br/><br/>
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    For a command-line build this is done by adding "<tt>-bm&nbsp;uc.bmm</tt>"
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    to the argument list for ngdbuild.<br/><br/>
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    When <tt>bitgen</tt> is run it will create a file named "<tt>uc_bd.bmm</tt>
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    which will include the memory block address required to run
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    <tt>data2mem</tt>.<br/><br/>
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  <li>Perform the build and ensure that <tt>uc_bd.bmm</tt> has the address for
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    the memory block.<br/><br/>
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  <li>Run <tt>data2mem</tt> as follows, where "<tt>orig.bit</tt>" is the
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    assumed name for the original bitstream generated by Xilinx' tools:<br/><br/>
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    <tt>data2mem&nbsp;-bm&nbsp;uc_bd.bmm&nbsp;-bt&nbsp;orig.bit&nbsp;-bd&nbsp;uc.mem&nbsp;-o&nbsp;b&nbsp;new.bit;<br/></tt><br/>
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  <li>Compare the original bitstream to the modified bitstream as follows to
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    ensure this process worked.<br/><br/>
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    <tt>data2mem&nbsp;-bm&nbsp;uc.bmm&nbsp;-bt&nbsp;orig.bit&nbsp;-d&nbsp;&gt;&nbsp;orig.dump;<br/>
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    data2mem&nbsp;-bm&nbsp;uc.bmm&nbsp;-bt&nbsp;new.bit&nbsp;-d&nbsp;&gt;&nbsp;new.dump;<br/>
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    diff&nbsp;orig.dump&nbsp;new.dump&nbsp;|&nbsp;less;<br/></tt><br/>
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    The only differences other than file names and dates and such should be the
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    initialization values for the memory block.<br/><br/>
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    You can validate this process by using the original memory initialization
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    file, in which case the above differences should be limited to the file
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    name, data, etc., but not the memory contents.<br/><br/>
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  </ol>
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  If you didn't include the <tt>BMM</tt> file in the build process you can use
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  <tt>fpga_editor</tt> to get the memory names and memory locations.  The
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  command to invoke it is:<br/><br/>
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  <tt>&nbsp;&nbsp;fpga_editor&nbsp;-r&nbsp;file.ncd&nbsp;file.pcf<br/></tt><br/>
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  Then, under "<tt>Name&nbsp;Filter</tt>" type "<tt>*opcodeMemory*</tt>" and hit
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  the <tt>ENTER</tt> key.
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<h1>Xilinx <tt>Vivado</tt></h1>
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  As of this writing, Xilinx' Vivado does not have clean non-SDK support for
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  generating the files required to modify the processor instruction memory.
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  However, the TCL scripting language can be used for the following work-around
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  to this problem:
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  <ol>
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  <li>Determine the name of the memory.<br/><br/>
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    The following commands lists the names of all the block rams.  This
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    obviously needs to be done after place and route.<br/><br/>
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    <tt>join [get_cells -hierarchical -filter { LOC =~ "RAMB*" }] "\n";<br/></tt><br/>
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    or<br/><br/>
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    <tt>join [filter [get_cells -hierarchical] { BEL =~ "RAMB*" }] "\n"<br/></tt><br/>
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    Alternatively, the following command lists the names of the block rams, the
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    type of the block ram, and their locations:<br/><br/>
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    <tt>foreach a [filter [get_cells -hierarchical] { BEL =~ "RAMB*" }] {
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      puts "$a [lindex [report_property -return_string $a BEL] 7] [lindex
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      [report_property -return_string $a LOC] 7]"; }<br/></tt><br/>
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    Any of these can be included in the build script or can be cut and pasted
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    into the TCL console in the GUI after place and route.<br/><br/>
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    Note:  The "<tt>list_property_value</tt>" seems to be more natural to use
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    than the "<tt>[lindex&nbsp;...</tt>" commands, but can only be used for
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    enumerated types, i.e., not for <tt>BEL</tt> and <tt>LOC</tt>
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    properties.<br/><br/>
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    </li>
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  <li>Once you've identified the name(s) of the memories, add the following
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    command to the build script or use it on a checkpoint.  Here,
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    uc/inst/s_PC_reg_rep was the single memory in the micro controller.<br/><br/>
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    <tt>foreach&nbsp;memName&nbsp;[list&nbsp;"uc/inst/s_PC_reg_rep"] {<br/>
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    &nbsp;&nbsp;set&nbsp;memBel&nbsp;[lindex&nbsp;[report_property&nbsp;-return_string&nbsp;[get_cells&nbsp;$memName]&nbsp;BEL]&nbsp;7];<br/>
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    &nbsp;&nbsp;set&nbsp;memLoc&nbsp;[lindex&nbsp;[report_property&nbsp;-return_string&nbsp;[get_cells&nbsp;$memName]&nbsp;LOC]&nbsp;7];<br/>
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    &nbsp;&nbsp;puts "MYBMMINFO:&nbsp;$memName&nbsp;$memBel&nbsp;$memLoc]";<br/>
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    }<br/></tt><br/>
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    This should add lines starting with "<tt>MYBMMINFO:</tt>" to the Vivado log
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    file with each memory name, type, and location.<br/><br/>
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    Note:  If the processor uses more than one block ram, simply append the name
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    to the "<tt>list</tt>" in this TCL script.<br/><br/>
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    </li>
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  <li>Use the following <tt>gawk</tt> script or similar to generate a
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    <tt>BMM</tt> file from the "<tt>MYBMMINFO:</tt>" lines.  Here, the
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    "<tt>vivado.log</tt>" is the Vivado log file and "<tt>build-bmm</tt> is the
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    name of this file.<br/><br/>
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    <tt>#!/bin/bash<br/>
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    #<br/>
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    #&nbsp;Generate&nbsp;a&nbsp;BMM&nbsp;file&nbsp;for&nbsp;the&nbsp;micro&nbsp;controller&nbsp;from&nbsp;the&nbsp;MYBMMINFO&nbsp;lines&nbsp;in&nbsp;the<br/>
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    #&nbsp;Vivado&nbsp;log&nbsp;file.<br/>
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    #<br/>
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    #&nbsp;Usage:&nbsp;&nbsp;./build-bmm<br/>
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    <br/>
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    gawk&nbsp;--&nbsp;'<br/>
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    BEGIN&nbsp;{<br/>
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    &nbsp;&nbsp;nMemories&nbsp;=&nbsp;0;<br/>
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    &nbsp;&nbsp;memName[nMemories++]&nbsp;=&nbsp;"uc/inst/s_PC_reg_rep";<br/>
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    }<br/>
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    /^MYBMMINFO:/&nbsp;{&nbsp;bel[$2]&nbsp;=&nbsp;$3;&nbsp;loc[$2]&nbsp;=&nbsp;$4;&nbsp;}<br/>
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    END&nbsp;{<br/>
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    &nbsp;&nbsp;for&nbsp;(ix=0;&nbsp;ix&lt;nMemories;&nbsp;++ix)<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;if&nbsp;(!(memName[ix]&nbsp;in&nbsp;bel))&nbsp;{<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;printf("FATAL&nbsp;ERROR:&nbsp;&nbsp;MYBMMINFO&nbsp;record&nbsp;not&nbsp;found&nbsp;for&nbsp;\"%s\"\n",&nbsp;memName)&nbsp;&gt;&nbsp;"/dev/stderr";<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;exit&nbsp;1;<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;}<br/>
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    &nbsp;&nbsp;memType&nbsp;=&nbsp;"";<br/>
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    &nbsp;&nbsp;for&nbsp;(ix=0;&nbsp;ix&lt;nMemories;&nbsp;++ix)&nbsp;{<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;split(loc[memName[ix]],splitLoc,"_");<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;if&nbsp;(memType&nbsp;==&nbsp;"")&nbsp;{<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;memType&nbsp;=&nbsp;splitLoc[1];<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;if&nbsp;(memType&nbsp;=&nbsp;"RAMB18")&nbsp;L&nbsp;=&nbsp;2048;<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;if&nbsp;(memType&nbsp;=&nbsp;"RAMB36")&nbsp;L&nbsp;=&nbsp;4096;<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;L&nbsp;*=&nbsp;nMemories;<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;printf("ADDRESS_SPACE&nbsp;uc&nbsp;%s&nbsp;WORD_ADDRESSING&nbsp;[0x0:0x%x]\n",memType,L-1);<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;}<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;else&nbsp;if&nbsp;(splitLoc[1]&nbsp;!=&nbsp;memType)&nbsp;{<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;printf("Inconsistent&nbsp;memory&nbsp;types:&nbsp;&nbsp;%s&nbsp;is&nbsp;%s&nbsp;instead&nbsp;of&nbsp;%s\n",memName[ix],splitLoc[1],memType)&nbsp;>&nbsp;"/dev/stderr";<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;exit&nbsp;1;<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;}<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;printf("&nbsp;&nbsp;BUS_BLOCK\n");<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;printf("&nbsp;&nbsp;&nbsp;&nbsp;%s&nbsp;[8:0]&nbsp;PLACED&nbsp;=&nbsp;%s;\n",memName[ix],splitLoc[2]);<br/>
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    &nbsp;&nbsp;&nbsp;&nbsp;printf("&nbsp;&nbsp;END_BUS_BLOCK;\n");<br/>
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    &nbsp;&nbsp;}<br/>
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    &nbsp;&nbsp;printf("END_ADDRESS_SPACE;\n");<br/>
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    }<br/>
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    '&nbsp;vivado.log&nbsp;&gt;&nbsp;build_uc.bmm<br/></tt><br/>
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    </li>
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  <li>Update the contents of the bitstream file as follows.  Here,
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    <tt>build.bit</tt> is the original bitstream and <tt>build_uc.bit</tt> is
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    the bitstream updated with the new micro controller instructions.<br/><br/>
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    <tt>data2mem&nbsp;-bm&nbsp;build_uc.bmm&nbsp;-bt&nbsp;build.bit&nbsp;-bd&nbsp;uc/uc.mem&nbsp;-o&nbsp;b
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    build_uc.bit<br/></tt><br/>
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    Alternatively, use something like the following as an "<tt>update_uc</tt>"
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    script file:<br/><br/>
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    <tt>#!/bin/bash<br/>
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    #<br/>
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    #&nbsp;Update&nbsp;the&nbsp;micro&nbsp;controller&nbsp;instruction&nbsp;memory&nbsp;in&nbsp;the&nbsp;BIT&nbsp;file.<br/>
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    #<br/>
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    #&nbsp;Usage:&nbsp;&nbsp;./update-uc<br/>
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    <br/>
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    if&nbsp;test&nbsp;!&nbsp;-f&nbsp;build_uc.bmm&nbsp;-o&nbsp;vivado.log&nbsp;-nt&nbsp;build_uc.bmm;&nbsp;then<br/>
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    &nbsp;&nbsp;./build-bmm&nbsp;||&nbsp;{&nbsp;echo&nbsp;"build-bmm&nbsp;failed"&nbsp;>&nbsp;/dev/stderr;&nbsp;exit&nbsp;1;&nbsp;}<br/>
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    fi<br/>
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    <br/>
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    (&nbsp;cd&nbsp;uc;&nbsp;ssbcc&nbsp;-q&nbsp;--define-clog2&nbsp;uc.9x8&nbsp;)&nbsp;\<br/>
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    ||&nbsp;{&nbsp;echo&nbsp;"ssbcc&nbsp;failed"&nbsp;>&nbsp;/dev/stderr;&nbsp;exit&nbsp;1;&nbsp;}<br/>
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    <br/>
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    data2mem&nbsp;-bm&nbsp;build_uc.bmm&nbsp;-bt&nbsp;build.bit&nbsp;-bd&nbsp;uc/uc.mem&nbsp;-o&nbsp;b&nbsp;build_uc.bit&nbsp;\<br/>
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    ||&nbsp;{&nbsp;echo&nbsp;"data2mem&nbsp;failed"&nbsp;>&nbsp;/dev/stderr;&nbsp;exit&nbsp;1;&nbsp;}<br/></tt><br/>
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    </li>
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  </ol>
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  Note:  If you want to use these procedures to identify the memories after
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  you've run Vivado, you must include a "<tt>write_checkpoint</tt>" command in
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  your TCL script.  For example, include the following command after
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  "<tt>write_bitstream&nbsp;-force&nbsp;build.bit</tt>"<br/><br/>
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  <tt>write_checkpoint&nbsp;-force&nbsp;build;<br/></tt><br/>
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  and then use the following command in a subsequent Vivado session to open the
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  checkpoint:<br/><br/>
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  <tt>read_checkpoint&nbsp;build;<br/></tt><br/>
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  Once these are done you can examine the memory names and so forth.<br/><br/>
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</body>
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