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[/] [ssbcc/] [trunk/] [example/] [i2c/] [EEPROM/] [Xilinx-SP601/] [make] - Blame information for rev 5

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Line No. Rev Author Line
1 5 sinclairrf
#!/bin/sh
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#
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# Make script for SP601 board.
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#
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# Usage:
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#   ./make |& tee log
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source /opt/Xilinx/14.7/ISE_DS/settings64.sh
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# Ensure the script to build the micro processor is present.
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if [ -n "`which ssbcc | sed -n -e '/^which:/p'`" ]; then
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  echo "FATAL ERROR:" > /dev/stderr;
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  echo "Could not find \"ssbcc\" required for build" > /dev/stderr;
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  exit 1;
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fi
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#
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# Set the build parameters.
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#
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NAME=sp601
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DEVICE=xc6slx16-2-csg324
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FILES="";
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FILES+=" ../uc/i2c_eeprom.v";
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FILES+=" ${NAME}.v";
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#
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# Prepatory work
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#
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# Build the micro processor.
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( cd ../uc; ssbcc --define-clog i2c_eeprom.9x8 ) || { echo "SSBCC failed" > /dev/stderr; exit 1; }
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#
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# Configure and run the synthesis
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#
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for fname in ${FILES}; do
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  echo "verilog work \"${fname}\"";
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done > ${NAME}.prj;
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mkdir -p xst/projnav.tmp;
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cat < ${NAME}.xst
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set -tmpdir "xst/projnav.tmp"
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set -xsthdpdir "xst"
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run
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-ifn ${NAME}.prj
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-ifmt mixed
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-ofn ${NAME}
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-ofmt NGC
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-p ${DEVICE}
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-top ${NAME}
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-opt_mode Speed
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-opt_level 1
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-power NO
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-iuc NO
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-keep_hierarchy No
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-netlist_hierarchy As_Optimized
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-rtlview Yes
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-glob_opt AllClockNets
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-read_cores YES
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-write_timing_constraints NO
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-cross_clock_analysis NO
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-hierarchy_separator /
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-bus_delimiter <>
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-case Maintain
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-slice_utilization_ratio 100
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-bram_utilization_ratio 100
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-dsp_utilization_ratio 100
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-lc Auto
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-reduce_control_sets Auto
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-fsm_extract YES -fsm_encoding Auto
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-safe_implementation No
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-fsm_style LUT
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-ram_extract Yes
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-ram_style Auto
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-rom_extract Yes
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-shreg_extract YES
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-rom_style Auto
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-auto_bram_packing NO
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-resource_sharing YES
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-async_to_sync NO
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-shreg_min_size 2
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-use_dsp48 Auto
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-iobuf YES
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-max_fanout 100000
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-bufg 16
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-register_duplication YES
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-register_balancing No
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-optimize_primitives NO
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-use_clock_enable Auto
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-use_sync_set Auto
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-use_sync_reset Auto
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-iob Auto
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-equivalent_register_removal YES
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-slice_utilization_ratio_maxmargin 5
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EOF
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xst \
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  -ifn "${NAME}.xst" \
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  -ofn "${NAME}.syr" \
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|| { echo "XST Failed!" > /dev/stderr; exit 1; }
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#
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# Run through PAR
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#
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ngdbuild \
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  -dd _ngo \
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  -nt timestamp \
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  -uc ${NAME}.ucf \
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  -p ${DEVICE} \
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  ${NAME}.ngc ${NAME}.ngd \
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|| { echo "ngdbuild Failed!" > /dev/stderr; exit 1; }
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map \
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  -p ${DEVICE} \
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  -w \
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  -logic_opt off \
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  -ol high \
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  -t 1 \
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  -xt 0 \
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  -register_duplication off \
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  -r 4 \
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  -global_opt off \
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  -mt off \
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  -ir off \
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  -pr off \
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  -lc off \
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  -power off \
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  -o ${NAME}.ncd \
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  ${NAME}.ngd ${NAME}.pcf \
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|| { echo "MAP Failed!" > /dev/stderr; exit 1; }
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par \
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  -w \
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  -ol high \
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  -mt off \
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  ${NAME}.ncd ${NAME}.ncd ${NAME}.pcf \
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|| { echo "PAR Failed!" > /dev/stderr; exit 1; }
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#
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# Optionally perform timing analysis
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#
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if [ `false` ]; then
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  trce \
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    -v 3 \
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    -s 3 \
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    -n 3 \
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    -fastpaths \
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    -xml ${NAME}.twx \
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    ${NAME}.ncd \
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    -o ${NAME}.twr \
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    ${NAME}.pcf \
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    -ucf ${NAME}.ucf
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fi
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#
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# Generate the bitstream file
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#
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cat <${NAME}.ut
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-w
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-g DebugBitstream:No
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-g Binary:no
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-g CRC:Enable
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-g Reset_on_err:No
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-g ConfigRate:2
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-g ProgPin:PullUp
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-g TckPin:PullUp
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-g TdiPin:PullUp
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-g TdoPin:PullUp
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-g TmsPin:PullUp
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-g UnusedPin:PullDown
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-g UserID:0xFFFFFFFF
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-g ExtMasterCclk_en:No
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-g SPI_buswidth:1
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-g TIMER_CFG:0xFFFF
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-g multipin_wakeup:No
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-g StartUpClk:CClk
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-g DONE_cycle:4
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-g GTS_cycle:5
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-g GWE_cycle:6
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-g LCK_cycle:NoWait
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-g Security:None
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-g DonePipe:No
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-g DriveDone:No
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-g en_sw_gsr:No
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-g drive_awake:No
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-g sw_clk:Startupclk
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-g sw_gwe_cycle:5
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-g sw_gts_cycle:4
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EOF
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bitgen -f ${NAME}.ut ${NAME}.ncd \
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|| { echo "BITGEN Failed!" > /dev/stderr; exit 1; }

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