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[/] [ssbcc/] [trunk/] [example/] [i2c/] [TMP100/] [Xilinx-SP601/] [sp601.v] - Blame information for rev 7

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1 5 sinclairrf
/*******************************************************************************
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 *
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 * Copyright 2012, Sinclair R.F., Inc.
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 *
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 * Top-level module to demonstrate reading four TMP100 I2C temperature sensors
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 * and  to display their hex outputs to a console about once per second.
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 *
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 ******************************************************************************/
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module sp601(
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  // 200 MHz differential clock
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  input  wire   ip_sysclk_p,
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  input  wire   ip_sysclk_n,
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  // I2C bus
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  inout  wire   iop_i2c_scl,
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  inout  wire   iop_i2c_sda,
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  // UART Tx
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  output wire   op_usb_1_rx,
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  // echo I2C bus to logic analyzer
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  output wire   op_i2c_scl,
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  output wire   op_i2c_sda
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);
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/*
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 * Generate a 100 MHz clock from the 200 MHz oscillator.
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 */
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wire s_sysclk;
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IBUFGDS sysclk_inst(
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  .I    (ip_sysclk_p),
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  .IB   (ip_sysclk_n),
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  .O    (s_sysclk)
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);
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wire s_divclk;
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BUFIO2 #(
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  .DIVIDE               (4),
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  .DIVIDE_BYPASS        ("FALSE"),
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  .USE_DOUBLER          ("TRUE")
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) bufio2_inst (
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  .I            (s_sysclk),
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  .IOCLK        (),
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  .DIVCLK       (s_divclk),
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  .SERDESSTROBE ()
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);
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wire s_clk;
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BUFG sclk_inst(
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  .I    (s_divclk),
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  .O    (s_clk)
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);
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/*
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 * Generate a synchronous reset.
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 */
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reg [3:0] s_reset_count = 4'hF;
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always @ (posedge s_clk)
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  s_reset_count <= s_reset_count - 4'd1;
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reg s_rst = 1'b1;
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always @ (posedge s_clk)
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  if (s_reset_count == 4'd0)
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    s_rst <= 1'b0;
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  else
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    s_rst <= s_rst;
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/*
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 * Instantiate the micro controller.
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 */
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i2c_tmp100 ie_inst(
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  // synchronous reset and processor clock
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  .i_rst        (s_rst),
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  .i_clk        (s_clk),
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  // I2C bus
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  .io_scl       (iop_i2c_scl),
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  .io_sda       (iop_i2c_sda),
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  // UART_Tx port
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  .o_UART_Tx    (op_usb_1_rx)
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);
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/*
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 * Copy the I2C bus to the logic analyzer outputs.
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 */
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assign op_i2c_scl = iop_i2c_scl;
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assign op_i2c_sda = iop_i2c_sda;
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endmodule

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