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# Copyright 2012, Sinclair R.F., Inc.

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USER_HEADER

Illustration of an SSBCC.9x8 machine to blink an LED.

o_led is the output LED state.

This module was computer generated.  Bugs should be fixed in the source modules

for this computer generated code, not in this module.

END_USER_HEADER

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# 9-bit opcodes and 8-bit data

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ARCHITECTURE core/9x8 Verilog

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# Define the memory widths and the structure of the associated ROMs and RAMs.

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INSTRUCTION             2048

RETURN_STACK            32

DATA_STACK              32

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# Define the I/O ports.

# Note:  "o_led" will be a single-bit output from the processor.  This will be

#        the lsb of the 8-bit value copied from the stack to the port.

# Note:  "C_LED" will be the constant port number used to access the LED port

#        inside the Forth code.

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PORTCOMMENT LED on/off signal

OUTPORT 1-bit o_led O_LED

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# Run the assembler for the embedded code.

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ASSEMBLY led.s