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[/] [ssbcc/] [trunk/] [lib/] [9x8/] [tb/] [cmp_8bit_uu/] [uc.9x8] - Blame information for rev 4

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# Copyright 2013, Sinclair R.F., Inc.
# Test bench for the icomparison math library.
 
ARCHITECTURE core/9x8 Verilog
 
INSTRUCTION     1024
DATA_STACK      32
RETURN_STACK    32
 
PORTCOMMENT 8-bit test values
OUTPORT 8-bit,strobe   o_value,o_value_wr O_VALUE
 
PORTCOMMENT termination strobe
OUTPORT strobe  o_terminate_str O_TERMINATE
 
ASSEMBLY uc.s

Line No.	Rev	Author	Line
1	2	sinclairrf	`# Copyright 2013, Sinclair R.F., Inc.`
2	4	sinclairrf	`# Test bench for the icomparison math library.`
3	2	sinclairrf
4			`ARCHITECTURE core/9x8 Verilog`
5
6			`INSTRUCTION 1024`
7			`DATA_STACK 32`
8			`RETURN_STACK 32`
9
10			`PORTCOMMENT 8-bit test values`
11			`OUTPORT 8-bit,strobe o_value,o_value_wr O_VALUE`
12
13			`PORTCOMMENT termination strobe`
14			`OUTPORT strobe o_terminate_str O_TERMINATE`
15
16			`ASSEMBLY uc.s`

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[/] [ssbcc/] [trunk/] [lib/] [9x8/] [tb/] [cmp_8bit_uu/] [uc.9x8] - Blame information for rev 4