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[/] [ssbcc/] [trunk/] [lib/] [9x8/] [tb/] [math/] [tb.v] - Blame information for rev 4

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1 4 sinclairrf
/*******************************************************************************
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 *
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 * Copyright 2014, Sinclair R.F., Inc.
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 *
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 * Test bench for the core/9x8 math library.
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 *
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 ******************************************************************************/
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`timescale 1ns/1ps
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module tb;
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reg s_clk = 1'b1;
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always @ (s_clk)
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  s_clk <= #5 ~s_clk;
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reg s_rst = 1'b1;
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initial begin
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  repeat (5) @ (posedge s_clk)
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  s_rst <= 1'b0;
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end
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wire [95:0] s_value;
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wire        s_value_done;
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wire        s_terminate;
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uc inst_uc(
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  // synchronous reset and processor clock
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  .i_rst        (s_rst),
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  .i_clk        (s_clk),
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  // 8-bit test values
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  .o_value      (s_value),
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  .o_value_done (s_value_done),
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  // termination strobe
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  .o_terminate  (s_terminate)
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);
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always @ (posedge s_value_done)
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  $display("%08h + %08h = %08h", s_value[64+:32], s_value[32+:32], s_value[0+:32]);
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always @ (posedge s_terminate)
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  $finish;
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initial begin
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  $dumpfile("tb.vcd");
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  $dumpvars();
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end
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endmodule

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