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[/] [ssbcc/] [trunk/] [todo] - Blame information for rev 11

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Line No. Rev Author Line
1 2 sinclairrf
  BUGS:
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  example
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*   "<", ... operators for signed 8-bit values
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  ssbcc
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*   change "outstatus" to "outfull" for UART and UART_Tx
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*   add size[variable_name]
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    add r* to over-write either s_T or s_N?
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*   accommodate Lattice Diamond synthesis and memory initialization
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*   make "quiet" the default
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*   ensure timer tolerance is non-zero
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*   ensure all "raise" statements include the source line code number
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*   write COMBINE MEMORY tests
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?   bit-slice constants (similarly to parameters)
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    handle ';' that aren't preceded by a space
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    use .IFNDEF instead of checking assembler check for previously included files
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    add "rot" instruction?
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    add address range validation for memory accesses
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    add warning for unreachable code following .jump or .return instructions
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    add "share memory" feature?
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      for dual-port memories in slave peripherals (i.e., registers readable by the bus master)
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      for peripherals such as adders where long chains of outputs and inports would have been required and .store+/- and .fetch+/- would be much more efficient code-wise
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      how to accommodate multiple "shared memory" peripherals?
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    finish interrupt handling, add monitor-interrupt peripheral to ensure correct re-enable from the interrupt handler
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    remove dead parameters and dead code
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    rework design as required to make it more robust
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    documentation
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      top-level overview, point to implemented cores
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      required:  ARCHITECTURE and sizes, ASSEMBLY, and HDL
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      I/O Ports
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      INPORT and OUTPORT
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      PERIPHERAL
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        finish doc/peripheral.html
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*     all error messages
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    generate Altera SOPC/Qsys TCL script
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    add VHDL
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  core/9x8
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    documentation
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      update
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      assembler
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        directives
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        instructions
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          change "opcodes.html" to "instructions.html", ...
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        parameters
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        constants
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        interrupts
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      peripherals
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      running the test benches
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    core.v
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      additional instructions?
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        "invert" opcode in 6'b000100 group
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        "tst&=" and "tst&<>" instructions -- replace T with the stated comparison based on the bitwise and of T and N
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        "cmp=" and "cmp<>" instructions -- replace T with the statued comparison based on N-T
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    asm
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      require .memory directive to be repeated after other directives, EOF, etc.
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      improve error message for missing input files
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      add non-return-stack-alteration restriction to some optional macro arguments
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      implement .abbr directive
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      add .if(...) [.elif(...)]* [.else] .endif directive set
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        avoid full parsing of false branches (accommodate other cores?)
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        add symbol for current core -- is9x8 (?)
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    peripherals
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      INTERRUPT
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      interrupt enable/disable (through INTERRUPT command)
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      multi-byte adder
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      multiplier
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      PICK -- emulate the Forth operator?
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        this can be done if the data stack is in its own dual-port memory, but that kinds of defeats the purpose of a small micro controller
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      bus slave peripherals -- store external commands in a FIFO and statuses in dual-port RAM or shared RAM for external reads
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        SPI_slave
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        I2C_slave
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      SoC Interconnects
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        wishbone_slave
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        avalon_slave
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        wishbone_master
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        avalon_master
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        ARM_slave
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    core.vhd
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      do this once core.v is completed
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  examples
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*   Game-of-life
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    add more examples
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      "echo" program
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      Jim Haberly -- accumulate 10 samples from an ADC
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    JPEG compression example?
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      Cast's JPEG-E core: http://www.cast-inc.com/ip-cores/images/jpeg-e/index.html (1343 slices, 170 MHz, 7 RAMB16, 9 DSP48)
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  lib/9x8/math.s
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    -- incorporate adder peripheral
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    -- add_u8_u32__u32, ...
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    -- sub_uX_uY__uZ, X,Y,Z \in {8,16,24,32}, Z \in min(X,Y)+{0,8}, Z<=32
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    -- add signed versions
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  lib/9x8/forth.s
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    -- identify good instructions to include
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      pick
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  publicize
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    - opencores
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    - ssbcc.net
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    - Programmable Planet
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    - EETimes and other e-rags
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    - add to web page

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