OpenCores
URL https://opencores.org/ocsvn/statled/statled/trunk

Subversion Repositories statled

[/] [statled/] [trunk/] [rtl/] [statled.v] - Blame information for rev 5

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 mitko
`timescale 1ns / 100ps
2
/******************************************************************************
3
*  Status LED module
4
*
5
*  Use single LED ouput to displays various internal states as blink codes.
6
*  http://www.opencores.org/cores/statled
7
*
8
******************************************************************************/
9
module statled (
10 4 mitko
    input           clk,
11
    input           rst,
12
    input  [3:0]    status,
13
    output          led
14 2 mitko
);
15
 
16
`include "statled_par.v"
17
 
18 3 mitko
reg [32:0]       pre;            // Prescaler
19
reg [7:0]        bcnt;           // Bit counter
20
reg [15:0]       lsr;            // LED shift register 
21
reg [15:0]       cr;             // Code register
22
reg [3:0]        str;            // Status register
23
wire            rate;           // LED rate
24 2 mitko
 
25
//-----------------------------------------------------------------------------
26
// LED rate  
27
//
28
always @(posedge clk or posedge rst)
29
        if (rst)
30 3 mitko
        pre <= #tDLY 0;
31 2 mitko
    else if (rate)
32 3 mitko
        pre <= #tDLY 0;
33 2 mitko
    else
34 3 mitko
        pre <= #tDLY pre + 1;
35 2 mitko
 
36
assign rate = (pre == STATLED_PULSE_CLKCNT);
37
 
38
//-----------------------------------------------------------------------------
39
// Capture status inputs
40
//
41
always @(posedge clk or posedge rst)
42 5 mitko
    if (rst)
43 3 mitko
        str <= #tDLY 0;
44 2 mitko
    else
45 3 mitko
        str <= #tDLY status;
46 2 mitko
 
47
//-----------------------------------------------------------------------------
48
// Shift register and bit counter
49
//
50
always @(posedge clk or posedge rst)
51 5 mitko
    if (rst)
52 3 mitko
        bcnt <= #tDLY 15;
53 5 mitko
    else if (bcnt == 16)
54 3 mitko
        bcnt <= #tDLY 0;
55 5 mitko
    else if (rate)
56 3 mitko
        bcnt <= #tDLY bcnt + 1;
57 2 mitko
 
58
always @(posedge clk or posedge rst)
59 5 mitko
    if (rst)
60 3 mitko
        lsr <= #tDLY 0;
61 5 mitko
    else if (bcnt == 16)
62 3 mitko
        lsr <= #tDLY cr;
63 5 mitko
    else if (rate)
64 3 mitko
        lsr <= #tDLY lsr << 1;
65 2 mitko
 
66
assign led = rst? 1 : lsr[15];
67
 
68
//-----------------------------------------------------------------------------
69
// Codes 
70
//
71
always @*
72
    case(str)
73 4 mitko
        0: cr = CODE_50_50;           // Default code
74
        1: cr = CODE_ONE;             // State 1 
75
        2: cr = CODE_TWO;             // State 2
76
        3: cr = CODE_THREE;           // ....
77
        4: cr = CODE_FOUR;            //
78
        5: cr = CODE_FIVE;            //
79
        6: cr = CODE_SIX;             //
80
 
81
        default: cr = 0;
82
    endcase
83 2 mitko
 
84
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.