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[/] [structural_vhdl/] [trunk/] [idea_machine/] [m32adder.vst] - Blame information for rev 4

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1 2 marta
-- VHDL structural description generated from `m32adder`
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--              date : Sat Sep  8 03:38:10 2001
3
 
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-- Entity Declaration
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ENTITY m32adder IS
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  PORT (
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  a : in BIT_VECTOR (31 DOWNTO 0);      -- a
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  b : in BIT_VECTOR (31 DOWNTO 0);      -- b
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  sum : out BIT_VECTOR (31 DOWNTO 0);   -- sum
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  vdd : in BIT; -- vdd
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  vss : in BIT  -- vss
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  );
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END m32adder;
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-- Architecture Declaration
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ARCHITECTURE VST OF m32adder IS
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  COMPONENT halfadder_glopf
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    port (
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    a : in BIT; -- a
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    b : in BIT; -- b
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    cout : out BIT;     -- cout
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    sout : out BIT;     -- sout
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    vdd : in BIT;       -- vdd
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    vss : in BIT        -- vss
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    );
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  END COMPONENT;
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  COMPONENT fulladder_glopg
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    port (
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    a : in BIT; -- a
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    b : in BIT; -- b
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    cin : in BIT;       -- cin
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    cout : out BIT;     -- cout
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    sout : out BIT;     -- sout
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    vdd : in BIT;       -- vdd
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    vss : in BIT        -- vss
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    );
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  END COMPONENT;
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  COMPONENT xr2_x1
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    port (
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    i0 : in BIT;        -- i0
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    i1 : in BIT;        -- i1
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    q : out BIT;        -- q
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    vdd : in BIT;       -- vdd
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    vss : in BIT        -- vss
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    );
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  END COMPONENT;
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  SIGNAL cout0 : BIT;   -- cout0
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  SIGNAL cout1 : BIT;   -- cout1
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  SIGNAL cout10 : BIT;  -- cout10
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  SIGNAL cout11 : BIT;  -- cout11
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  SIGNAL cout12 : BIT;  -- cout12
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  SIGNAL cout13 : BIT;  -- cout13
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  SIGNAL cout14 : BIT;  -- cout14
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  SIGNAL cout15 : BIT;  -- cout15
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  SIGNAL cout16 : BIT;  -- cout16
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  SIGNAL cout17 : BIT;  -- cout17
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  SIGNAL cout18 : BIT;  -- cout18
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  SIGNAL cout19 : BIT;  -- cout19
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  SIGNAL cout2 : BIT;   -- cout2
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  SIGNAL cout20 : BIT;  -- cout20
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  SIGNAL cout21 : BIT;  -- cout21
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  SIGNAL cout22 : BIT;  -- cout22
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  SIGNAL cout23 : BIT;  -- cout23
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  SIGNAL cout24 : BIT;  -- cout24
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  SIGNAL cout25 : BIT;  -- cout25
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  SIGNAL cout26 : BIT;  -- cout26
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  SIGNAL cout27 : BIT;  -- cout27
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  SIGNAL cout28 : BIT;  -- cout28
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  SIGNAL cout29 : BIT;  -- cout29
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  SIGNAL cout3 : BIT;   -- cout3
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  SIGNAL cout30 : BIT;  -- cout30
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  SIGNAL cout4 : BIT;   -- cout4
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  SIGNAL cout5 : BIT;   -- cout5
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  SIGNAL cout6 : BIT;   -- cout6
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  SIGNAL cout7 : BIT;   -- cout7
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  SIGNAL cout8 : BIT;   -- cout8
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  SIGNAL cout9 : BIT;   -- cout9
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  SIGNAL o_xr1 : BIT;   -- o_xr1
85
 
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BEGIN
87
 
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  halfadder : halfadder_glopf
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(0),
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    cout => cout0,
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    b => b(0),
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    a => a(0));
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  fulladder1 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(1),
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    cout => cout1,
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    cin => cout0,
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    b => b(1),
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    a => a(1));
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  fulladder2 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(2),
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    cout => cout2,
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    cin => cout1,
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    b => b(2),
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    a => a(2));
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  fulladder3 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(3),
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    cout => cout3,
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    cin => cout2,
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    b => b(3),
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    a => a(3));
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  fulladder4 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(4),
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    cout => cout4,
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    cin => cout3,
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    b => b(4),
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    a => a(4));
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  fulladder5 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(5),
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    cout => cout5,
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    cin => cout4,
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    b => b(5),
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    a => a(5));
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  fulladder6 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(6),
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    cout => cout6,
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    cin => cout5,
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    b => b(6),
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    a => a(6));
150
  fulladder7 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(7),
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    cout => cout7,
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    cin => cout6,
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    b => b(7),
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    a => a(7));
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  fulladder8 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(8),
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    cout => cout8,
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    cin => cout7,
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    b => b(8),
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    a => a(8));
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  fulladder9 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(9),
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    cout => cout9,
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    cin => cout8,
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    b => b(9),
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    a => a(9));
177
  fulladder10 : fulladder_glopg
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    PORT MAP (
179
    vss => vss,
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    vdd => vdd,
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    sout => sum(10),
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    cout => cout10,
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    cin => cout9,
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    b => b(10),
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    a => a(10));
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  fulladder11 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(11),
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    cout => cout11,
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    cin => cout10,
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    b => b(11),
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    a => a(11));
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  fulladder12 : fulladder_glopg
196
    PORT MAP (
197
    vss => vss,
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    vdd => vdd,
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    sout => sum(12),
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    cout => cout12,
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    cin => cout11,
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    b => b(12),
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    a => a(12));
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  fulladder13 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(13),
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    cout => cout13,
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    cin => cout12,
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    b => b(13),
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    a => a(13));
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  fulladder14 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(14),
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    cout => cout14,
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    cin => cout13,
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    b => b(14),
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    a => a(14));
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  fulladder15 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(15),
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    cout => cout15,
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    cin => cout14,
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    b => b(15),
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    a => a(15));
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  fulladder16 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(16),
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    cout => cout16,
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    cin => cout15,
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    b => b(16),
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    a => a(16));
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  fulladder17 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(17),
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    cout => cout17,
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    cin => cout16,
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    b => b(17),
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    a => a(17));
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  fulladder18 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(18),
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    cout => cout18,
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    cin => cout17,
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    b => b(18),
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    a => a(18));
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  fulladder19 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(19),
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    cout => cout19,
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    cin => cout18,
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    b => b(19),
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    a => a(19));
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  fulladder20 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(20),
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    cout => cout20,
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    cin => cout19,
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    b => b(20),
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    a => a(20));
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  fulladder21 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(21),
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    cout => cout21,
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    cin => cout20,
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    b => b(21),
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    a => a(21));
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  fulladder22 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(22),
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    cout => cout22,
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    cin => cout21,
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    b => b(22),
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    a => a(22));
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  fulladder23 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(23),
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    cout => cout23,
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    cin => cout22,
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    b => b(23),
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    a => a(23));
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  fulladder24 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(24),
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    cout => cout24,
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    cin => cout23,
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    b => b(24),
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    a => a(24));
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  fulladder25 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(25),
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    cout => cout25,
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    cin => cout24,
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    b => b(25),
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    a => a(25));
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  fulladder26 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(26),
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    cout => cout26,
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    cin => cout25,
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    b => b(26),
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    a => a(26));
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  fulladder27 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(27),
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    cout => cout27,
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    cin => cout26,
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    b => b(27),
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    a => a(27));
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  fulladder28 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(28),
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    cout => cout28,
345
    cin => cout27,
346
    b => b(28),
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    a => a(28));
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  fulladder29 : fulladder_glopg
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    PORT MAP (
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    vss => vss,
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    vdd => vdd,
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    sout => sum(29),
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    cout => cout29,
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    cin => cout28,
355
    b => b(29),
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    a => a(29));
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  fulladder30 : fulladder_glopg
358
    PORT MAP (
359
    vss => vss,
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    vdd => vdd,
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    sout => sum(30),
362
    cout => cout30,
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    cin => cout29,
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    b => b(30),
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    a => a(30));
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  xr1 : xr2_x1
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    PORT MAP (
368
    vss => vss,
369
    vdd => vdd,
370
    q => o_xr1,
371
    i1 => b(31),
372
    i0 => a(31));
373
  xr2 : xr2_x1
374
    PORT MAP (
375
    vss => vss,
376
    vdd => vdd,
377
    q => sum(31),
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    i1 => cout30,
379
    i0 => o_xr1);
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end VST;

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