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[/] [structural_vhdl/] [trunk/] [idea_machine/] [m32adder_glopg.vst] - Blame information for rev 4

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1 2 marta 
-- VHDL structural description generated from `m32adder_glopg`
2 
--              date : Sat Sep  8 03:51:17 2001
3 
 
4 
 
5 
-- Entity Declaration
6 
 
7 
ENTITY m32adder_glopg IS
8 
  PORT (
9 
  a : in BIT_VECTOR (31 DOWNTO 0);      -- a
10 
  b : in BIT_VECTOR (31 DOWNTO 0);      -- b
11 
  sum : out BIT_VECTOR (31 DOWNTO 0);   -- sum
12 
  vdd : in BIT; -- vdd
13 
  vss : in BIT  -- vss
14 
  );
15 
END m32adder_glopg;
16 
 
17 
-- Architecture Declaration
18 
 
19 
ARCHITECTURE VST OF m32adder_glopg IS
20 
  COMPONENT buf_x2
21 
    port (
22 
    i : in BIT; -- i
23 
    q : out BIT;        -- q
24 
    vdd : in BIT;       -- vdd
25 
    vss : in BIT        -- vss
26 
    );
27 
  END COMPONENT;
28 
 
29 
  COMPONENT o2_x2
30 
    port (
31 
    i0 : in BIT;        -- i0
32 
    i1 : in BIT;        -- i1
33 
    q : out BIT;        -- q
34 
    vdd : in BIT;       -- vdd
35 
    vss : in BIT        -- vss
36 
    );
37 
  END COMPONENT;
38 
 
39 
  COMPONENT a2_x2
40 
    port (
41 
    i0 : in BIT;        -- i0
42 
    i1 : in BIT;        -- i1
43 
    q : out BIT;        -- q
44 
    vdd : in BIT;       -- vdd
45 
    vss : in BIT        -- vss
46 
    );
47 
  END COMPONENT;
48 
 
49 
  COMPONENT ao22_x2
50 
    port (
51 
    i0 : in BIT;        -- i0
52 
    i1 : in BIT;        -- i1
53 
    i2 : in BIT;        -- i2
54 
    q : out BIT;        -- q
55 
    vdd : in BIT;       -- vdd
56 
    vss : in BIT        -- vss
57 
    );
58 
  END COMPONENT;
59 
 
60 
  COMPONENT xr2_x1
61 
    port (
62 
    i0 : in BIT;        -- i0
63 
    i1 : in BIT;        -- i1
64 
    q : out BIT;        -- q
65 
    vdd : in BIT;       -- vdd
66 
    vss : in BIT        -- vss
67 
    );
68 
  END COMPONENT;
69 
 
70 
  SIGNAL cout0 : BIT;   -- cout0
71 
  SIGNAL halfadder_netops8 : BIT;       -- halfadder.netops8
72 
  SIGNAL cout1 : BIT;   -- cout1
73 
  SIGNAL fulladder1_auxsc2 : BIT;       -- fulladder1.auxsc2
74 
  SIGNAL fulladder1_auxsc4 : BIT;       -- fulladder1.auxsc4
75 
  SIGNAL fulladder1_auxsc1 : BIT;       -- fulladder1.auxsc1
76 
  SIGNAL cout2 : BIT;   -- cout2
77 
  SIGNAL fulladder2_auxsc2 : BIT;       -- fulladder2.auxsc2
78 
  SIGNAL fulladder2_auxsc4 : BIT;       -- fulladder2.auxsc4
79 
  SIGNAL fulladder2_auxsc1 : BIT;       -- fulladder2.auxsc1
80 
  SIGNAL cout3 : BIT;   -- cout3
81 
  SIGNAL fulladder3_auxsc2 : BIT;       -- fulladder3.auxsc2
82 
  SIGNAL fulladder3_auxsc4 : BIT;       -- fulladder3.auxsc4
83 
  SIGNAL fulladder3_auxsc1 : BIT;       -- fulladder3.auxsc1
84 
  SIGNAL cout4 : BIT;   -- cout4
85 
  SIGNAL fulladder4_auxsc2 : BIT;       -- fulladder4.auxsc2
86 
  SIGNAL fulladder4_auxsc4 : BIT;       -- fulladder4.auxsc4
87 
  SIGNAL fulladder4_auxsc1 : BIT;       -- fulladder4.auxsc1
88 
  SIGNAL cout5 : BIT;   -- cout5
89 
  SIGNAL fulladder5_auxsc2 : BIT;       -- fulladder5.auxsc2
90 
  SIGNAL fulladder5_auxsc4 : BIT;       -- fulladder5.auxsc4
91 
  SIGNAL fulladder5_auxsc1 : BIT;       -- fulladder5.auxsc1
92 
  SIGNAL cout6 : BIT;   -- cout6
93 
  SIGNAL fulladder6_auxsc2 : BIT;       -- fulladder6.auxsc2
94 
  SIGNAL fulladder6_auxsc4 : BIT;       -- fulladder6.auxsc4
95 
  SIGNAL fulladder6_auxsc1 : BIT;       -- fulladder6.auxsc1
96 
  SIGNAL cout7 : BIT;   -- cout7
97 
  SIGNAL fulladder7_auxsc2 : BIT;       -- fulladder7.auxsc2
98 
  SIGNAL fulladder7_auxsc4 : BIT;       -- fulladder7.auxsc4
99 
  SIGNAL fulladder7_auxsc1 : BIT;       -- fulladder7.auxsc1
100 
  SIGNAL cout8 : BIT;   -- cout8
101 
  SIGNAL fulladder8_auxsc2 : BIT;       -- fulladder8.auxsc2
102 
  SIGNAL fulladder8_auxsc4 : BIT;       -- fulladder8.auxsc4
103 
  SIGNAL fulladder8_auxsc1 : BIT;       -- fulladder8.auxsc1
104 
  SIGNAL cout9 : BIT;   -- cout9
105 
  SIGNAL fulladder9_auxsc2 : BIT;       -- fulladder9.auxsc2
106 
  SIGNAL fulladder9_auxsc4 : BIT;       -- fulladder9.auxsc4
107 
  SIGNAL fulladder9_auxsc1 : BIT;       -- fulladder9.auxsc1
108 
  SIGNAL cout10 : BIT;  -- cout10
109 
  SIGNAL fulladder10_auxsc2 : BIT;      -- fulladder10.auxsc2
110 
  SIGNAL fulladder10_auxsc4 : BIT;      -- fulladder10.auxsc4
111 
  SIGNAL fulladder10_auxsc1 : BIT;      -- fulladder10.auxsc1
112 
  SIGNAL cout11 : BIT;  -- cout11
113 
  SIGNAL fulladder11_auxsc2 : BIT;      -- fulladder11.auxsc2
114 
  SIGNAL fulladder11_auxsc4 : BIT;      -- fulladder11.auxsc4
115 
  SIGNAL fulladder11_auxsc1 : BIT;      -- fulladder11.auxsc1
116 
  SIGNAL cout12 : BIT;  -- cout12
117 
  SIGNAL fulladder12_auxsc2 : BIT;      -- fulladder12.auxsc2
118 
  SIGNAL fulladder12_auxsc4 : BIT;      -- fulladder12.auxsc4
119 
  SIGNAL fulladder12_auxsc1 : BIT;      -- fulladder12.auxsc1
120 
  SIGNAL cout13 : BIT;  -- cout13
121 
  SIGNAL fulladder13_auxsc2 : BIT;      -- fulladder13.auxsc2
122 
  SIGNAL fulladder13_auxsc4 : BIT;      -- fulladder13.auxsc4
123 
  SIGNAL fulladder13_auxsc1 : BIT;      -- fulladder13.auxsc1
124 
  SIGNAL cout14 : BIT;  -- cout14
125 
  SIGNAL fulladder14_auxsc2 : BIT;      -- fulladder14.auxsc2
126 
  SIGNAL fulladder14_auxsc4 : BIT;      -- fulladder14.auxsc4
127 
  SIGNAL fulladder14_auxsc1 : BIT;      -- fulladder14.auxsc1
128 
  SIGNAL cout15 : BIT;  -- cout15
129 
  SIGNAL fulladder15_auxsc2 : BIT;      -- fulladder15.auxsc2
130 
  SIGNAL fulladder15_auxsc4 : BIT;      -- fulladder15.auxsc4
131 
  SIGNAL fulladder15_auxsc1 : BIT;      -- fulladder15.auxsc1
132 
  SIGNAL cout16 : BIT;  -- cout16
133 
  SIGNAL fulladder16_auxsc2 : BIT;      -- fulladder16.auxsc2
134 
  SIGNAL fulladder16_auxsc4 : BIT;      -- fulladder16.auxsc4
135 
  SIGNAL fulladder16_auxsc1 : BIT;      -- fulladder16.auxsc1
136 
  SIGNAL cout17 : BIT;  -- cout17
137 
  SIGNAL fulladder17_auxsc2 : BIT;      -- fulladder17.auxsc2
138 
  SIGNAL fulladder17_auxsc4 : BIT;      -- fulladder17.auxsc4
139 
  SIGNAL fulladder17_auxsc1 : BIT;      -- fulladder17.auxsc1
140 
  SIGNAL cout18 : BIT;  -- cout18
141 
  SIGNAL fulladder18_auxsc2 : BIT;      -- fulladder18.auxsc2
142 
  SIGNAL fulladder18_auxsc4 : BIT;      -- fulladder18.auxsc4
143 
  SIGNAL fulladder18_auxsc1 : BIT;      -- fulladder18.auxsc1
144 
  SIGNAL cout19 : BIT;  -- cout19
145 
  SIGNAL fulladder19_auxsc2 : BIT;      -- fulladder19.auxsc2
146 
  SIGNAL fulladder19_auxsc4 : BIT;      -- fulladder19.auxsc4
147 
  SIGNAL fulladder19_auxsc1 : BIT;      -- fulladder19.auxsc1
148 
  SIGNAL cout20 : BIT;  -- cout20
149 
  SIGNAL fulladder20_auxsc2 : BIT;      -- fulladder20.auxsc2
150 
  SIGNAL fulladder20_auxsc4 : BIT;      -- fulladder20.auxsc4
151 
  SIGNAL fulladder20_auxsc1 : BIT;      -- fulladder20.auxsc1
152 
  SIGNAL cout21 : BIT;  -- cout21
153 
  SIGNAL fulladder21_auxsc2 : BIT;      -- fulladder21.auxsc2
154 
  SIGNAL fulladder21_auxsc4 : BIT;      -- fulladder21.auxsc4
155 
  SIGNAL fulladder21_auxsc1 : BIT;      -- fulladder21.auxsc1
156 
  SIGNAL cout22 : BIT;  -- cout22
157 
  SIGNAL fulladder22_auxsc2 : BIT;      -- fulladder22.auxsc2
158 
  SIGNAL fulladder22_auxsc4 : BIT;      -- fulladder22.auxsc4
159 
  SIGNAL fulladder22_auxsc1 : BIT;      -- fulladder22.auxsc1
160 
  SIGNAL cout23 : BIT;  -- cout23
161 
  SIGNAL fulladder23_auxsc2 : BIT;      -- fulladder23.auxsc2
162 
  SIGNAL fulladder23_auxsc4 : BIT;      -- fulladder23.auxsc4
163 
  SIGNAL fulladder23_auxsc1 : BIT;      -- fulladder23.auxsc1
164 
  SIGNAL cout24 : BIT;  -- cout24
165 
  SIGNAL fulladder24_auxsc2 : BIT;      -- fulladder24.auxsc2
166 
  SIGNAL fulladder24_auxsc4 : BIT;      -- fulladder24.auxsc4
167 
  SIGNAL fulladder24_auxsc1 : BIT;      -- fulladder24.auxsc1
168 
  SIGNAL cout25 : BIT;  -- cout25
169 
  SIGNAL fulladder25_auxsc2 : BIT;      -- fulladder25.auxsc2
170 
  SIGNAL fulladder25_auxsc4 : BIT;      -- fulladder25.auxsc4
171 
  SIGNAL fulladder25_auxsc1 : BIT;      -- fulladder25.auxsc1
172 
  SIGNAL cout26 : BIT;  -- cout26
173 
  SIGNAL fulladder26_auxsc2 : BIT;      -- fulladder26.auxsc2
174 
  SIGNAL fulladder26_auxsc4 : BIT;      -- fulladder26.auxsc4
175 
  SIGNAL fulladder26_auxsc1 : BIT;      -- fulladder26.auxsc1
176 
  SIGNAL cout27 : BIT;  -- cout27
177 
  SIGNAL fulladder27_auxsc2 : BIT;      -- fulladder27.auxsc2
178 
  SIGNAL fulladder27_auxsc4 : BIT;      -- fulladder27.auxsc4
179 
  SIGNAL fulladder27_auxsc1 : BIT;      -- fulladder27.auxsc1
180 
  SIGNAL cout28 : BIT;  -- cout28
181 
  SIGNAL fulladder28_auxsc2 : BIT;      -- fulladder28.auxsc2
182 
  SIGNAL fulladder28_auxsc4 : BIT;      -- fulladder28.auxsc4
183 
  SIGNAL fulladder28_auxsc1 : BIT;      -- fulladder28.auxsc1
184 
  SIGNAL cout29 : BIT;  -- cout29
185 
  SIGNAL fulladder29_auxsc2 : BIT;      -- fulladder29.auxsc2
186 
  SIGNAL fulladder29_auxsc4 : BIT;      -- fulladder29.auxsc4
187 
  SIGNAL fulladder29_auxsc1 : BIT;      -- fulladder29.auxsc1
188 
  SIGNAL cout30 : BIT;  -- cout30
189 
  SIGNAL fulladder30_auxsc2 : BIT;      -- fulladder30.auxsc2
190 
  SIGNAL fulladder30_auxsc4 : BIT;      -- fulladder30.auxsc4
191 
  SIGNAL fulladder30_auxsc1 : BIT;      -- fulladder30.auxsc1
192 
  SIGNAL o_xr1 : BIT;   -- o_xr1
193 
 
194 
BEGIN
195 
 
196 
  halfadder_sout : xr2_x1
197 
    PORT MAP (
198 
    vss => vss,
199 
    vdd => vdd,
200 
    q => sum(0),
201 
    i1 => halfadder_netops8,
202 
    i0 => b(0));
203 
  halfadder_cout : a2_x2
204 
    PORT MAP (
205 
    vss => vss,
206 
    vdd => vdd,
207 
    q => cout0,
208 
    i1 => halfadder_netops8,
209 
    i0 => b(0));
210 
  halfadder_netopi8 : buf_x2
211 
    PORT MAP (
212 
    vss => vss,
213 
    vdd => vdd,
214 
    q => halfadder_netops8,
215 
    i => a(0));
216 
  fulladder1_sout : xr2_x1
217 
    PORT MAP (
218 
    vss => vss,
219 
    vdd => vdd,
220 
    q => sum(1),
221 
    i1 => fulladder1_auxsc1,
222 
    i0 => cout0);
223 
  fulladder1_cout : o2_x2
224 
    PORT MAP (
225 
    vss => vss,
226 
    vdd => vdd,
227 
    q => cout1,
228 
    i1 => fulladder1_auxsc2,
229 
    i0 => fulladder1_auxsc4);
230 
  fulladder1_auxsc2 : a2_x2
231 
    PORT MAP (
232 
    vss => vss,
233 
    vdd => vdd,
234 
    q => fulladder1_auxsc2,
235 
    i1 => a(1),
236 
    i0 => b(1));
237 
  fulladder1_auxsc4 : ao22_x2
238 
    PORT MAP (
239 
    vss => vss,
240 
    vdd => vdd,
241 
    q => fulladder1_auxsc4,
242 
    i2 => cout0,
243 
    i1 => a(1),
244 
    i0 => b(1));
245 
  fulladder1_auxsc1 : xr2_x1
246 
    PORT MAP (
247 
    vss => vss,
248 
    vdd => vdd,
249 
    q => fulladder1_auxsc1,
250 
    i1 => a(1),
251 
    i0 => b(1));
252 
  fulladder2_sout : xr2_x1
253 
    PORT MAP (
254 
    vss => vss,
255 
    vdd => vdd,
256 
    q => sum(2),
257 
    i1 => fulladder2_auxsc1,
258 
    i0 => cout1);
259 
  fulladder2_cout : o2_x2
260 
    PORT MAP (
261 
    vss => vss,
262 
    vdd => vdd,
263 
    q => cout2,
264 
    i1 => fulladder2_auxsc2,
265 
    i0 => fulladder2_auxsc4);
266 
  fulladder2_auxsc2 : a2_x2
267 
    PORT MAP (
268 
    vss => vss,
269 
    vdd => vdd,
270 
    q => fulladder2_auxsc2,
271 
    i1 => a(2),
272 
    i0 => b(2));
273 
  fulladder2_auxsc4 : ao22_x2
274 
    PORT MAP (
275 
    vss => vss,
276 
    vdd => vdd,
277 
    q => fulladder2_auxsc4,
278 
    i2 => cout1,
279 
    i1 => a(2),
280 
    i0 => b(2));
281 
  fulladder2_auxsc1 : xr2_x1
282 
    PORT MAP (
283 
    vss => vss,
284 
    vdd => vdd,
285 
    q => fulladder2_auxsc1,
286 
    i1 => a(2),
287 
    i0 => b(2));
288 
  fulladder3_sout : xr2_x1
289 
    PORT MAP (
290 
    vss => vss,
291 
    vdd => vdd,
292 
    q => sum(3),
293 
    i1 => fulladder3_auxsc1,
294 
    i0 => cout2);
295 
  fulladder3_cout : o2_x2
296 
    PORT MAP (
297 
    vss => vss,
298 
    vdd => vdd,
299 
    q => cout3,
300 
    i1 => fulladder3_auxsc2,
301 
    i0 => fulladder3_auxsc4);
302 
  fulladder3_auxsc2 : a2_x2
303 
    PORT MAP (
304 
    vss => vss,
305 
    vdd => vdd,
306 
    q => fulladder3_auxsc2,
307 
    i1 => a(3),
308 
    i0 => b(3));
309 
  fulladder3_auxsc4 : ao22_x2
310 
    PORT MAP (
311 
    vss => vss,
312 
    vdd => vdd,
313 
    q => fulladder3_auxsc4,
314 
    i2 => cout2,
315 
    i1 => a(3),
316 
    i0 => b(3));
317 
  fulladder3_auxsc1 : xr2_x1
318 
    PORT MAP (
319 
    vss => vss,
320 
    vdd => vdd,
321 
    q => fulladder3_auxsc1,
322 
    i1 => a(3),
323 
    i0 => b(3));
324 
  fulladder4_sout : xr2_x1
325 
    PORT MAP (
326 
    vss => vss,
327 
    vdd => vdd,
328 
    q => sum(4),
329 
    i1 => fulladder4_auxsc1,
330 
    i0 => cout3);
331 
  fulladder4_cout : o2_x2
332 
    PORT MAP (
333 
    vss => vss,
334 
    vdd => vdd,
335 
    q => cout4,
336 
    i1 => fulladder4_auxsc2,
337 
    i0 => fulladder4_auxsc4);
338 
  fulladder4_auxsc2 : a2_x2
339 
    PORT MAP (
340 
    vss => vss,
341 
    vdd => vdd,
342 
    q => fulladder4_auxsc2,
343 
    i1 => a(4),
344 
    i0 => b(4));
345 
  fulladder4_auxsc4 : ao22_x2
346 
    PORT MAP (
347 
    vss => vss,
348 
    vdd => vdd,
349 
    q => fulladder4_auxsc4,
350 
    i2 => cout3,
351 
    i1 => a(4),
352 
    i0 => b(4));
353 
  fulladder4_auxsc1 : xr2_x1
354 
    PORT MAP (
355 
    vss => vss,
356 
    vdd => vdd,
357 
    q => fulladder4_auxsc1,
358 
    i1 => a(4),
359 
    i0 => b(4));
360 
  fulladder5_sout : xr2_x1
361 
    PORT MAP (
362 
    vss => vss,
363 
    vdd => vdd,
364 
    q => sum(5),
365 
    i1 => fulladder5_auxsc1,
366 
    i0 => cout4);
367 
  fulladder5_cout : o2_x2
368 
    PORT MAP (
369 
    vss => vss,
370 
    vdd => vdd,
371 
    q => cout5,
372 
    i1 => fulladder5_auxsc2,
373 
    i0 => fulladder5_auxsc4);
374 
  fulladder5_auxsc2 : a2_x2
375 
    PORT MAP (
376 
    vss => vss,
377 
    vdd => vdd,
378 
    q => fulladder5_auxsc2,
379 
    i1 => a(5),
380 
    i0 => b(5));
381 
  fulladder5_auxsc4 : ao22_x2
382 
    PORT MAP (
383 
    vss => vss,
384 
    vdd => vdd,
385 
    q => fulladder5_auxsc4,
386 
    i2 => cout4,
387 
    i1 => a(5),
388 
    i0 => b(5));
389 
  fulladder5_auxsc1 : xr2_x1
390 
    PORT MAP (
391 
    vss => vss,
392 
    vdd => vdd,
393 
    q => fulladder5_auxsc1,
394 
    i1 => a(5),
395 
    i0 => b(5));
396 
  fulladder6_sout : xr2_x1
397 
    PORT MAP (
398 
    vss => vss,
399 
    vdd => vdd,
400 
    q => sum(6),
401 
    i1 => fulladder6_auxsc1,
402 
    i0 => cout5);
403 
  fulladder6_cout : o2_x2
404 
    PORT MAP (
405 
    vss => vss,
406 
    vdd => vdd,
407 
    q => cout6,
408 
    i1 => fulladder6_auxsc2,
409 
    i0 => fulladder6_auxsc4);
410 
  fulladder6_auxsc2 : a2_x2
411 
    PORT MAP (
412 
    vss => vss,
413 
    vdd => vdd,
414 
    q => fulladder6_auxsc2,
415 
    i1 => a(6),
416 
    i0 => b(6));
417 
  fulladder6_auxsc4 : ao22_x2
418 
    PORT MAP (
419 
    vss => vss,
420 
    vdd => vdd,
421 
    q => fulladder6_auxsc4,
422 
    i2 => cout5,
423 
    i1 => a(6),
424 
    i0 => b(6));
425 
  fulladder6_auxsc1 : xr2_x1
426 
    PORT MAP (
427 
    vss => vss,
428 
    vdd => vdd,
429 
    q => fulladder6_auxsc1,
430 
    i1 => a(6),
431 
    i0 => b(6));
432 
  fulladder7_sout : xr2_x1
433 
    PORT MAP (
434 
    vss => vss,
435 
    vdd => vdd,
436 
    q => sum(7),
437 
    i1 => fulladder7_auxsc1,
438 
    i0 => cout6);
439 
  fulladder7_cout : o2_x2
440 
    PORT MAP (
441 
    vss => vss,
442 
    vdd => vdd,
443 
    q => cout7,
444 
    i1 => fulladder7_auxsc2,
445 
    i0 => fulladder7_auxsc4);
446 
  fulladder7_auxsc2 : a2_x2
447 
    PORT MAP (
448 
    vss => vss,
449 
    vdd => vdd,
450 
    q => fulladder7_auxsc2,
451 
    i1 => a(7),
452 
    i0 => b(7));
453 
  fulladder7_auxsc4 : ao22_x2
454 
    PORT MAP (
455 
    vss => vss,
456 
    vdd => vdd,
457 
    q => fulladder7_auxsc4,
458 
    i2 => cout6,
459 
    i1 => a(7),
460 
    i0 => b(7));
461 
  fulladder7_auxsc1 : xr2_x1
462 
    PORT MAP (
463 
    vss => vss,
464 
    vdd => vdd,
465 
    q => fulladder7_auxsc1,
466 
    i1 => a(7),
467 
    i0 => b(7));
468 
  fulladder8_sout : xr2_x1
469 
    PORT MAP (
470 
    vss => vss,
471 
    vdd => vdd,
472 
    q => sum(8),
473 
    i1 => fulladder8_auxsc1,
474 
    i0 => cout7);
475 
  fulladder8_cout : o2_x2
476 
    PORT MAP (
477 
    vss => vss,
478 
    vdd => vdd,
479 
    q => cout8,
480 
    i1 => fulladder8_auxsc2,
481 
    i0 => fulladder8_auxsc4);
482 
  fulladder8_auxsc2 : a2_x2
483 
    PORT MAP (
484 
    vss => vss,
485 
    vdd => vdd,
486 
    q => fulladder8_auxsc2,
487 
    i1 => a(8),
488 
    i0 => b(8));
489 
  fulladder8_auxsc4 : ao22_x2
490 
    PORT MAP (
491 
    vss => vss,
492 
    vdd => vdd,
493 
    q => fulladder8_auxsc4,
494 
    i2 => cout7,
495 
    i1 => a(8),
496 
    i0 => b(8));
497 
  fulladder8_auxsc1 : xr2_x1
498 
    PORT MAP (
499 
    vss => vss,
500 
    vdd => vdd,
501 
    q => fulladder8_auxsc1,
502 
    i1 => a(8),
503 
    i0 => b(8));
504 
  fulladder9_sout : xr2_x1
505 
    PORT MAP (
506 
    vss => vss,
507 
    vdd => vdd,
508 
    q => sum(9),
509 
    i1 => fulladder9_auxsc1,
510 
    i0 => cout8);
511 
  fulladder9_cout : o2_x2
512 
    PORT MAP (
513 
    vss => vss,
514 
    vdd => vdd,
515 
    q => cout9,
516 
    i1 => fulladder9_auxsc2,
517 
    i0 => fulladder9_auxsc4);
518 
  fulladder9_auxsc2 : a2_x2
519 
    PORT MAP (
520 
    vss => vss,
521 
    vdd => vdd,
522 
    q => fulladder9_auxsc2,
523 
    i1 => a(9),
524 
    i0 => b(9));
525 
  fulladder9_auxsc4 : ao22_x2
526 
    PORT MAP (
527 
    vss => vss,
528 
    vdd => vdd,
529 
    q => fulladder9_auxsc4,
530 
    i2 => cout8,
531 
    i1 => a(9),
532 
    i0 => b(9));
533 
  fulladder9_auxsc1 : xr2_x1
534 
    PORT MAP (
535 
    vss => vss,
536 
    vdd => vdd,
537 
    q => fulladder9_auxsc1,
538 
    i1 => a(9),
539 
    i0 => b(9));
540 
  fulladder10_sout : xr2_x1
541 
    PORT MAP (
542 
    vss => vss,
543 
    vdd => vdd,
544 
    q => sum(10),
545 
    i1 => fulladder10_auxsc1,
546 
    i0 => cout9);
547 
  fulladder10_cout : o2_x2
548 
    PORT MAP (
549 
    vss => vss,
550 
    vdd => vdd,
551 
    q => cout10,
552 
    i1 => fulladder10_auxsc2,
553 
    i0 => fulladder10_auxsc4);
554 
  fulladder10_auxsc2 : a2_x2
555 
    PORT MAP (
556 
    vss => vss,
557 
    vdd => vdd,
558 
    q => fulladder10_auxsc2,
559 
    i1 => a(10),
560 
    i0 => b(10));
561 
  fulladder10_auxsc4 : ao22_x2
562 
    PORT MAP (
563 
    vss => vss,
564 
    vdd => vdd,
565 
    q => fulladder10_auxsc4,
566 
    i2 => cout9,
567 
    i1 => a(10),
568 
    i0 => b(10));
569 
  fulladder10_auxsc1 : xr2_x1
570 
    PORT MAP (
571 
    vss => vss,
572 
    vdd => vdd,
573 
    q => fulladder10_auxsc1,
574 
    i1 => a(10),
575 
    i0 => b(10));
576 
  fulladder11_sout : xr2_x1
577 
    PORT MAP (
578 
    vss => vss,
579 
    vdd => vdd,
580 
    q => sum(11),
581 
    i1 => fulladder11_auxsc1,
582 
    i0 => cout10);
583 
  fulladder11_cout : o2_x2
584 
    PORT MAP (
585 
    vss => vss,
586 
    vdd => vdd,
587 
    q => cout11,
588 
    i1 => fulladder11_auxsc2,
589 
    i0 => fulladder11_auxsc4);
590 
  fulladder11_auxsc2 : a2_x2
591 
    PORT MAP (
592 
    vss => vss,
593 
    vdd => vdd,
594 
    q => fulladder11_auxsc2,
595 
    i1 => a(11),
596 
    i0 => b(11));
597 
  fulladder11_auxsc4 : ao22_x2
598 
    PORT MAP (
599 
    vss => vss,
600 
    vdd => vdd,
601 
    q => fulladder11_auxsc4,
602 
    i2 => cout10,
603 
    i1 => a(11),
604 
    i0 => b(11));
605 
  fulladder11_auxsc1 : xr2_x1
606 
    PORT MAP (
607 
    vss => vss,
608 
    vdd => vdd,
609 
    q => fulladder11_auxsc1,
610 
    i1 => a(11),
611 
    i0 => b(11));
612 
  fulladder12_sout : xr2_x1
613 
    PORT MAP (
614 
    vss => vss,
615 
    vdd => vdd,
616 
    q => sum(12),
617 
    i1 => fulladder12_auxsc1,
618 
    i0 => cout11);
619 
  fulladder12_cout : o2_x2
620 
    PORT MAP (
621 
    vss => vss,
622 
    vdd => vdd,
623 
    q => cout12,
624 
    i1 => fulladder12_auxsc2,
625 
    i0 => fulladder12_auxsc4);
626 
  fulladder12_auxsc2 : a2_x2
627 
    PORT MAP (
628 
    vss => vss,
629 
    vdd => vdd,
630 
    q => fulladder12_auxsc2,
631 
    i1 => a(12),
632 
    i0 => b(12));
633 
  fulladder12_auxsc4 : ao22_x2
634 
    PORT MAP (
635 
    vss => vss,
636 
    vdd => vdd,
637 
    q => fulladder12_auxsc4,
638 
    i2 => cout11,
639 
    i1 => a(12),
640 
    i0 => b(12));
641 
  fulladder12_auxsc1 : xr2_x1
642 
    PORT MAP (
643 
    vss => vss,
644 
    vdd => vdd,
645 
    q => fulladder12_auxsc1,
646 
    i1 => a(12),
647 
    i0 => b(12));
648 
  fulladder13_sout : xr2_x1
649 
    PORT MAP (
650 
    vss => vss,
651 
    vdd => vdd,
652 
    q => sum(13),
653 
    i1 => fulladder13_auxsc1,
654 
    i0 => cout12);
655 
  fulladder13_cout : o2_x2
656 
    PORT MAP (
657 
    vss => vss,
658 
    vdd => vdd,
659 
    q => cout13,
660 
    i1 => fulladder13_auxsc2,
661 
    i0 => fulladder13_auxsc4);
662 
  fulladder13_auxsc2 : a2_x2
663 
    PORT MAP (
664 
    vss => vss,
665 
    vdd => vdd,
666 
    q => fulladder13_auxsc2,
667 
    i1 => a(13),
668 
    i0 => b(13));
669 
  fulladder13_auxsc4 : ao22_x2
670 
    PORT MAP (
671 
    vss => vss,
672 
    vdd => vdd,
673 
    q => fulladder13_auxsc4,
674 
    i2 => cout12,
675 
    i1 => a(13),
676 
    i0 => b(13));
677 
  fulladder13_auxsc1 : xr2_x1
678 
    PORT MAP (
679 
    vss => vss,
680 
    vdd => vdd,
681 
    q => fulladder13_auxsc1,
682 
    i1 => a(13),
683 
    i0 => b(13));
684 
  fulladder14_sout : xr2_x1
685 
    PORT MAP (
686 
    vss => vss,
687 
    vdd => vdd,
688 
    q => sum(14),
689 
    i1 => fulladder14_auxsc1,
690 
    i0 => cout13);
691 
  fulladder14_cout : o2_x2
692 
    PORT MAP (
693 
    vss => vss,
694 
    vdd => vdd,
695 
    q => cout14,
696 
    i1 => fulladder14_auxsc2,
697 
    i0 => fulladder14_auxsc4);
698 
  fulladder14_auxsc2 : a2_x2
699 
    PORT MAP (
700 
    vss => vss,
701 
    vdd => vdd,
702 
    q => fulladder14_auxsc2,
703 
    i1 => a(14),
704 
    i0 => b(14));
705 
  fulladder14_auxsc4 : ao22_x2
706 
    PORT MAP (
707 
    vss => vss,
708 
    vdd => vdd,
709 
    q => fulladder14_auxsc4,
710 
    i2 => cout13,
711 
    i1 => a(14),
712 
    i0 => b(14));
713 
  fulladder14_auxsc1 : xr2_x1
714 
    PORT MAP (
715 
    vss => vss,
716 
    vdd => vdd,
717 
    q => fulladder14_auxsc1,
718 
    i1 => a(14),
719 
    i0 => b(14));
720 
  fulladder15_sout : xr2_x1
721 
    PORT MAP (
722 
    vss => vss,
723 
    vdd => vdd,
724 
    q => sum(15),
725 
    i1 => fulladder15_auxsc1,
726 
    i0 => cout14);
727 
  fulladder15_cout : o2_x2
728 
    PORT MAP (
729 
    vss => vss,
730 
    vdd => vdd,
731 
    q => cout15,
732 
    i1 => fulladder15_auxsc2,
733 
    i0 => fulladder15_auxsc4);
734 
  fulladder15_auxsc2 : a2_x2
735 
    PORT MAP (
736 
    vss => vss,
737 
    vdd => vdd,
738 
    q => fulladder15_auxsc2,
739 
    i1 => a(15),
740 
    i0 => b(15));
741 
  fulladder15_auxsc4 : ao22_x2
742 
    PORT MAP (
743 
    vss => vss,
744 
    vdd => vdd,
745 
    q => fulladder15_auxsc4,
746 
    i2 => cout14,
747 
    i1 => a(15),
748 
    i0 => b(15));
749 
  fulladder15_auxsc1 : xr2_x1
750 
    PORT MAP (
751 
    vss => vss,
752 
    vdd => vdd,
753 
    q => fulladder15_auxsc1,
754 
    i1 => a(15),
755 
    i0 => b(15));
756 
  fulladder16_sout : xr2_x1
757 
    PORT MAP (
758 
    vss => vss,
759 
    vdd => vdd,
760 
    q => sum(16),
761 
    i1 => fulladder16_auxsc1,
762 
    i0 => cout15);
763 
  fulladder16_cout : o2_x2
764 
    PORT MAP (
765 
    vss => vss,
766 
    vdd => vdd,
767 
    q => cout16,
768 
    i1 => fulladder16_auxsc2,
769 
    i0 => fulladder16_auxsc4);
770 
  fulladder16_auxsc2 : a2_x2
771 
    PORT MAP (
772 
    vss => vss,
773 
    vdd => vdd,
774 
    q => fulladder16_auxsc2,
775 
    i1 => a(16),
776 
    i0 => b(16));
777 
  fulladder16_auxsc4 : ao22_x2
778 
    PORT MAP (
779 
    vss => vss,
780 
    vdd => vdd,
781 
    q => fulladder16_auxsc4,
782 
    i2 => cout15,
783 
    i1 => a(16),
784 
    i0 => b(16));
785 
  fulladder16_auxsc1 : xr2_x1
786 
    PORT MAP (
787 
    vss => vss,
788 
    vdd => vdd,
789 
    q => fulladder16_auxsc1,
790 
    i1 => a(16),
791 
    i0 => b(16));
792 
  fulladder17_sout : xr2_x1
793 
    PORT MAP (
794 
    vss => vss,
795 
    vdd => vdd,
796 
    q => sum(17),
797 
    i1 => fulladder17_auxsc1,
798 
    i0 => cout16);
799 
  fulladder17_cout : o2_x2
800 
    PORT MAP (
801 
    vss => vss,
802 
    vdd => vdd,
803 
    q => cout17,
804 
    i1 => fulladder17_auxsc2,
805 
    i0 => fulladder17_auxsc4);
806 
  fulladder17_auxsc2 : a2_x2
807 
    PORT MAP (
808 
    vss => vss,
809 
    vdd => vdd,
810 
    q => fulladder17_auxsc2,
811 
    i1 => a(17),
812 
    i0 => b(17));
813 
  fulladder17_auxsc4 : ao22_x2
814 
    PORT MAP (
815 
    vss => vss,
816 
    vdd => vdd,
817 
    q => fulladder17_auxsc4,
818 
    i2 => cout16,
819 
    i1 => a(17),
820 
    i0 => b(17));
821 
  fulladder17_auxsc1 : xr2_x1
822 
    PORT MAP (
823 
    vss => vss,
824 
    vdd => vdd,
825 
    q => fulladder17_auxsc1,
826 
    i1 => a(17),
827 
    i0 => b(17));
828 
  fulladder18_sout : xr2_x1
829 
    PORT MAP (
830 
    vss => vss,
831 
    vdd => vdd,
832 
    q => sum(18),
833 
    i1 => fulladder18_auxsc1,
834 
    i0 => cout17);
835 
  fulladder18_cout : o2_x2
836 
    PORT MAP (
837 
    vss => vss,
838 
    vdd => vdd,
839 
    q => cout18,
840 
    i1 => fulladder18_auxsc2,
841 
    i0 => fulladder18_auxsc4);
842 
  fulladder18_auxsc2 : a2_x2
843 
    PORT MAP (
844 
    vss => vss,
845 
    vdd => vdd,
846 
    q => fulladder18_auxsc2,
847 
    i1 => a(18),
848 
    i0 => b(18));
849 
  fulladder18_auxsc4 : ao22_x2
850 
    PORT MAP (
851 
    vss => vss,
852 
    vdd => vdd,
853 
    q => fulladder18_auxsc4,
854 
    i2 => cout17,
855 
    i1 => a(18),
856 
    i0 => b(18));
857 
  fulladder18_auxsc1 : xr2_x1
858 
    PORT MAP (
859 
    vss => vss,
860 
    vdd => vdd,
861 
    q => fulladder18_auxsc1,
862 
    i1 => a(18),
863 
    i0 => b(18));
864 
  fulladder19_sout : xr2_x1
865 
    PORT MAP (
866 
    vss => vss,
867 
    vdd => vdd,
868 
    q => sum(19),
869 
    i1 => fulladder19_auxsc1,
870 
    i0 => cout18);
871 
  fulladder19_cout : o2_x2
872 
    PORT MAP (
873 
    vss => vss,
874 
    vdd => vdd,
875 
    q => cout19,
876 
    i1 => fulladder19_auxsc2,
877 
    i0 => fulladder19_auxsc4);
878 
  fulladder19_auxsc2 : a2_x2
879 
    PORT MAP (
880 
    vss => vss,
881 
    vdd => vdd,
882 
    q => fulladder19_auxsc2,
883 
    i1 => a(19),
884 
    i0 => b(19));
885 
  fulladder19_auxsc4 : ao22_x2
886 
    PORT MAP (
887 
    vss => vss,
888 
    vdd => vdd,
889 
    q => fulladder19_auxsc4,
890 
    i2 => cout18,
891 
    i1 => a(19),
892 
    i0 => b(19));
893 
  fulladder19_auxsc1 : xr2_x1
894 
    PORT MAP (
895 
    vss => vss,
896 
    vdd => vdd,
897 
    q => fulladder19_auxsc1,
898 
    i1 => a(19),
899 
    i0 => b(19));
900 
  fulladder20_sout : xr2_x1
901 
    PORT MAP (
902 
    vss => vss,
903 
    vdd => vdd,
904 
    q => sum(20),
905 
    i1 => fulladder20_auxsc1,
906 
    i0 => cout19);
907 
  fulladder20_cout : o2_x2
908 
    PORT MAP (
909 
    vss => vss,
910 
    vdd => vdd,
911 
    q => cout20,
912 
    i1 => fulladder20_auxsc2,
913 
    i0 => fulladder20_auxsc4);
914 
  fulladder20_auxsc2 : a2_x2
915 
    PORT MAP (
916 
    vss => vss,
917 
    vdd => vdd,
918 
    q => fulladder20_auxsc2,
919 
    i1 => a(20),
920 
    i0 => b(20));
921 
  fulladder20_auxsc4 : ao22_x2
922 
    PORT MAP (
923 
    vss => vss,
924 
    vdd => vdd,
925 
    q => fulladder20_auxsc4,
926 
    i2 => cout19,
927 
    i1 => a(20),
928 
    i0 => b(20));
929 
  fulladder20_auxsc1 : xr2_x1
930 
    PORT MAP (
931 
    vss => vss,
932 
    vdd => vdd,
933 
    q => fulladder20_auxsc1,
934 
    i1 => a(20),
935 
    i0 => b(20));
936 
  fulladder21_sout : xr2_x1
937 
    PORT MAP (
938 
    vss => vss,
939 
    vdd => vdd,
940 
    q => sum(21),
941 
    i1 => fulladder21_auxsc1,
942 
    i0 => cout20);
943 
  fulladder21_cout : o2_x2
944 
    PORT MAP (
945 
    vss => vss,
946 
    vdd => vdd,
947 
    q => cout21,
948 
    i1 => fulladder21_auxsc2,
949 
    i0 => fulladder21_auxsc4);
950 
  fulladder21_auxsc2 : a2_x2
951 
    PORT MAP (
952 
    vss => vss,
953 
    vdd => vdd,
954 
    q => fulladder21_auxsc2,
955 
    i1 => a(21),
956 
    i0 => b(21));
957 
  fulladder21_auxsc4 : ao22_x2
958 
    PORT MAP (
959 
    vss => vss,
960 
    vdd => vdd,
961 
    q => fulladder21_auxsc4,
962 
    i2 => cout20,
963 
    i1 => a(21),
964 
    i0 => b(21));
965 
  fulladder21_auxsc1 : xr2_x1
966 
    PORT MAP (
967 
    vss => vss,
968 
    vdd => vdd,
969 
    q => fulladder21_auxsc1,
970 
    i1 => a(21),
971 
    i0 => b(21));
972 
  fulladder22_sout : xr2_x1
973 
    PORT MAP (
974 
    vss => vss,
975 
    vdd => vdd,
976 
    q => sum(22),
977 
    i1 => fulladder22_auxsc1,
978 
    i0 => cout21);
979 
  fulladder22_cout : o2_x2
980 
    PORT MAP (
981 
    vss => vss,
982 
    vdd => vdd,
983 
    q => cout22,
984 
    i1 => fulladder22_auxsc2,
985 
    i0 => fulladder22_auxsc4);
986 
  fulladder22_auxsc2 : a2_x2
987 
    PORT MAP (
988 
    vss => vss,
989 
    vdd => vdd,
990 
    q => fulladder22_auxsc2,
991 
    i1 => a(22),
992 
    i0 => b(22));
993 
  fulladder22_auxsc4 : ao22_x2
994 
    PORT MAP (
995 
    vss => vss,
996 
    vdd => vdd,
997 
    q => fulladder22_auxsc4,
998 
    i2 => cout21,
999 
    i1 => a(22),
1000 
    i0 => b(22));
1001 
  fulladder22_auxsc1 : xr2_x1
1002 
    PORT MAP (
1003 
    vss => vss,
1004 
    vdd => vdd,
1005 
    q => fulladder22_auxsc1,
1006 
    i1 => a(22),
1007 
    i0 => b(22));
1008 
  fulladder23_sout : xr2_x1
1009 
    PORT MAP (
1010 
    vss => vss,
1011 
    vdd => vdd,
1012 
    q => sum(23),
1013 
    i1 => fulladder23_auxsc1,
1014 
    i0 => cout22);
1015 
  fulladder23_cout : o2_x2
1016 
    PORT MAP (
1017 
    vss => vss,
1018 
    vdd => vdd,
1019 
    q => cout23,
1020 
    i1 => fulladder23_auxsc2,
1021 
    i0 => fulladder23_auxsc4);
1022 
  fulladder23_auxsc2 : a2_x2
1023 
    PORT MAP (
1024 
    vss => vss,
1025 
    vdd => vdd,
1026 
    q => fulladder23_auxsc2,
1027 
    i1 => a(23),
1028 
    i0 => b(23));
1029 
  fulladder23_auxsc4 : ao22_x2
1030 
    PORT MAP (
1031 
    vss => vss,
1032 
    vdd => vdd,
1033 
    q => fulladder23_auxsc4,
1034 
    i2 => cout22,
1035 
    i1 => a(23),
1036 
    i0 => b(23));
1037 
  fulladder23_auxsc1 : xr2_x1
1038 
    PORT MAP (
1039 
    vss => vss,
1040 
    vdd => vdd,
1041 
    q => fulladder23_auxsc1,
1042 
    i1 => a(23),
1043 
    i0 => b(23));
1044 
  fulladder24_sout : xr2_x1
1045 
    PORT MAP (
1046 
    vss => vss,
1047 
    vdd => vdd,
1048 
    q => sum(24),
1049 
    i1 => fulladder24_auxsc1,
1050 
    i0 => cout23);
1051 
  fulladder24_cout : o2_x2
1052 
    PORT MAP (
1053 
    vss => vss,
1054 
    vdd => vdd,
1055 
    q => cout24,
1056 
    i1 => fulladder24_auxsc2,
1057 
    i0 => fulladder24_auxsc4);
1058 
  fulladder24_auxsc2 : a2_x2
1059 
    PORT MAP (
1060 
    vss => vss,
1061 
    vdd => vdd,
1062 
    q => fulladder24_auxsc2,
1063 
    i1 => a(24),
1064 
    i0 => b(24));
1065 
  fulladder24_auxsc4 : ao22_x2
1066 
    PORT MAP (
1067 
    vss => vss,
1068 
    vdd => vdd,
1069 
    q => fulladder24_auxsc4,
1070 
    i2 => cout23,
1071 
    i1 => a(24),
1072 
    i0 => b(24));
1073 
  fulladder24_auxsc1 : xr2_x1
1074 
    PORT MAP (
1075 
    vss => vss,
1076 
    vdd => vdd,
1077 
    q => fulladder24_auxsc1,
1078 
    i1 => a(24),
1079 
    i0 => b(24));
1080 
  fulladder25_sout : xr2_x1
1081 
    PORT MAP (
1082 
    vss => vss,
1083 
    vdd => vdd,
1084 
    q => sum(25),
1085 
    i1 => fulladder25_auxsc1,
1086 
    i0 => cout24);
1087 
  fulladder25_cout : o2_x2
1088 
    PORT MAP (
1089 
    vss => vss,
1090 
    vdd => vdd,
1091 
    q => cout25,
1092 
    i1 => fulladder25_auxsc2,
1093 
    i0 => fulladder25_auxsc4);
1094 
  fulladder25_auxsc2 : a2_x2
1095 
    PORT MAP (
1096 
    vss => vss,
1097 
    vdd => vdd,
1098 
    q => fulladder25_auxsc2,
1099 
    i1 => a(25),
1100 
    i0 => b(25));
1101 
  fulladder25_auxsc4 : ao22_x2
1102 
    PORT MAP (
1103 
    vss => vss,
1104 
    vdd => vdd,
1105 
    q => fulladder25_auxsc4,
1106 
    i2 => cout24,
1107 
    i1 => a(25),
1108 
    i0 => b(25));
1109 
  fulladder25_auxsc1 : xr2_x1
1110 
    PORT MAP (
1111 
    vss => vss,
1112 
    vdd => vdd,
1113 
    q => fulladder25_auxsc1,
1114 
    i1 => a(25),
1115 
    i0 => b(25));
1116 
  fulladder26_sout : xr2_x1
1117 
    PORT MAP (
1118 
    vss => vss,
1119 
    vdd => vdd,
1120 
    q => sum(26),
1121 
    i1 => fulladder26_auxsc1,
1122 
    i0 => cout25);
1123 
  fulladder26_cout : o2_x2
1124 
    PORT MAP (
1125 
    vss => vss,
1126 
    vdd => vdd,
1127 
    q => cout26,
1128 
    i1 => fulladder26_auxsc2,
1129 
    i0 => fulladder26_auxsc4);
1130 
  fulladder26_auxsc2 : a2_x2
1131 
    PORT MAP (
1132 
    vss => vss,
1133 
    vdd => vdd,
1134 
    q => fulladder26_auxsc2,
1135 
    i1 => a(26),
1136 
    i0 => b(26));
1137 
  fulladder26_auxsc4 : ao22_x2
1138 
    PORT MAP (
1139 
    vss => vss,
1140 
    vdd => vdd,
1141 
    q => fulladder26_auxsc4,
1142 
    i2 => cout25,
1143 
    i1 => a(26),
1144 
    i0 => b(26));
1145 
  fulladder26_auxsc1 : xr2_x1
1146 
    PORT MAP (
1147 
    vss => vss,
1148 
    vdd => vdd,
1149 
    q => fulladder26_auxsc1,
1150 
    i1 => a(26),
1151 
    i0 => b(26));
1152 
  fulladder27_sout : xr2_x1
1153 
    PORT MAP (
1154 
    vss => vss,
1155 
    vdd => vdd,
1156 
    q => sum(27),
1157 
    i1 => fulladder27_auxsc1,
1158 
    i0 => cout26);
1159 
  fulladder27_cout : o2_x2
1160 
    PORT MAP (
1161 
    vss => vss,
1162 
    vdd => vdd,
1163 
    q => cout27,
1164 
    i1 => fulladder27_auxsc2,
1165 
    i0 => fulladder27_auxsc4);
1166 
  fulladder27_auxsc2 : a2_x2
1167 
    PORT MAP (
1168 
    vss => vss,
1169 
    vdd => vdd,
1170 
    q => fulladder27_auxsc2,
1171 
    i1 => a(27),
1172 
    i0 => b(27));
1173 
  fulladder27_auxsc4 : ao22_x2
1174 
    PORT MAP (
1175 
    vss => vss,
1176 
    vdd => vdd,
1177 
    q => fulladder27_auxsc4,
1178 
    i2 => cout26,
1179 
    i1 => a(27),
1180 
    i0 => b(27));
1181 
  fulladder27_auxsc1 : xr2_x1
1182 
    PORT MAP (
1183 
    vss => vss,
1184 
    vdd => vdd,
1185 
    q => fulladder27_auxsc1,
1186 
    i1 => a(27),
1187 
    i0 => b(27));
1188 
  fulladder28_sout : xr2_x1
1189 
    PORT MAP (
1190 
    vss => vss,
1191 
    vdd => vdd,
1192 
    q => sum(28),
1193 
    i1 => fulladder28_auxsc1,
1194 
    i0 => cout27);
1195 
  fulladder28_cout : o2_x2
1196 
    PORT MAP (
1197 
    vss => vss,
1198 
    vdd => vdd,
1199 
    q => cout28,
1200 
    i1 => fulladder28_auxsc2,
1201 
    i0 => fulladder28_auxsc4);
1202 
  fulladder28_auxsc2 : a2_x2
1203 
    PORT MAP (
1204 
    vss => vss,
1205 
    vdd => vdd,
1206 
    q => fulladder28_auxsc2,
1207 
    i1 => a(28),
1208 
    i0 => b(28));
1209 
  fulladder28_auxsc4 : ao22_x2
1210 
    PORT MAP (
1211 
    vss => vss,
1212 
    vdd => vdd,
1213 
    q => fulladder28_auxsc4,
1214 
    i2 => cout27,
1215 
    i1 => a(28),
1216 
    i0 => b(28));
1217 
  fulladder28_auxsc1 : xr2_x1
1218 
    PORT MAP (
1219 
    vss => vss,
1220 
    vdd => vdd,
1221 
    q => fulladder28_auxsc1,
1222 
    i1 => a(28),
1223 
    i0 => b(28));
1224 
  fulladder29_sout : xr2_x1
1225 
    PORT MAP (
1226 
    vss => vss,
1227 
    vdd => vdd,
1228 
    q => sum(29),
1229 
    i1 => fulladder29_auxsc1,
1230 
    i0 => cout28);
1231 
  fulladder29_cout : o2_x2
1232 
    PORT MAP (
1233 
    vss => vss,
1234 
    vdd => vdd,
1235 
    q => cout29,
1236 
    i1 => fulladder29_auxsc2,
1237 
    i0 => fulladder29_auxsc4);
1238 
  fulladder29_auxsc2 : a2_x2
1239 
    PORT MAP (
1240 
    vss => vss,
1241 
    vdd => vdd,
1242 
    q => fulladder29_auxsc2,
1243 
    i1 => a(29),
1244 
    i0 => b(29));
1245 
  fulladder29_auxsc4 : ao22_x2
1246 
    PORT MAP (
1247 
    vss => vss,
1248 
    vdd => vdd,
1249 
    q => fulladder29_auxsc4,
1250 
    i2 => cout28,
1251 
    i1 => a(29),
1252 
    i0 => b(29));
1253 
  fulladder29_auxsc1 : xr2_x1
1254 
    PORT MAP (
1255 
    vss => vss,
1256 
    vdd => vdd,
1257 
    q => fulladder29_auxsc1,
1258 
    i1 => a(29),
1259 
    i0 => b(29));
1260 
  fulladder30_sout : xr2_x1
1261 
    PORT MAP (
1262 
    vss => vss,
1263 
    vdd => vdd,
1264 
    q => sum(30),
1265 
    i1 => fulladder30_auxsc1,
1266 
    i0 => cout29);
1267 
  fulladder30_cout : o2_x2
1268 
    PORT MAP (
1269 
    vss => vss,
1270 
    vdd => vdd,
1271 
    q => cout30,
1272 
    i1 => fulladder30_auxsc2,
1273 
    i0 => fulladder30_auxsc4);
1274 
  fulladder30_auxsc2 : a2_x2
1275 
    PORT MAP (
1276 
    vss => vss,
1277 
    vdd => vdd,
1278 
    q => fulladder30_auxsc2,
1279 
    i1 => a(30),
1280 
    i0 => b(30));
1281 
  fulladder30_auxsc4 : ao22_x2
1282 
    PORT MAP (
1283 
    vss => vss,
1284 
    vdd => vdd,
1285 
    q => fulladder30_auxsc4,
1286 
    i2 => cout29,
1287 
    i1 => a(30),
1288 
    i0 => b(30));
1289 
  fulladder30_auxsc1 : xr2_x1
1290 
    PORT MAP (
1291 
    vss => vss,
1292 
    vdd => vdd,
1293 
    q => fulladder30_auxsc1,
1294 
    i1 => a(30),
1295 
    i0 => b(30));
1296 
  xr1 : xr2_x1
1297 
    PORT MAP (
1298 
    vss => vss,
1299 
    vdd => vdd,
1300 
    q => o_xr1,
1301 
    i1 => b(31),
1302 
    i0 => a(31));
1303 
  xr2 : xr2_x1
1304 
    PORT MAP (
1305 
    vss => vss,
1306 
    vdd => vdd,
1307 
    q => sum(31),
1308 
    i1 => cout30,
1309 
    i0 => o_xr1);
1310 
 
1311 
end VST;

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