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[/] [structural_vhdl/] [trunk/] [key_regulator/] [dec16to288_latch.vst] - Blame information for rev 4

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1 2 marta 
-- VHDL structural description generated from `dec16to288_latch`
2 
--              date : Mon Jul 30 01:37:17 2001
3 
 
4 
 
5 
-- Entity Declaration
6 
 
7 
ENTITY dec16to288_latch IS
8 
  PORT (
9 
  a : in BIT_VECTOR (15 DOWNTO 0);      -- a
10 
  en : in BIT;  -- en
11 
  clr : in BIT; -- clr
12 
  sel : in BIT_VECTOR (4 DOWNTO 0);     -- sel
13 
  cke : in BIT; -- cke
14 
  o1 : inout BIT_VECTOR (15 DOWNTO 0);  -- o1
15 
  o2 : inout BIT_VECTOR (15 DOWNTO 0);  -- o2
16 
  o3 : inout BIT_VECTOR (15 DOWNTO 0);  -- o3
17 
  o4 : inout BIT_VECTOR (15 DOWNTO 0);  -- o4
18 
  o5 : inout BIT_VECTOR (15 DOWNTO 0);  -- o5
19 
  o6 : inout BIT_VECTOR (15 DOWNTO 0);  -- o6
20 
  o7 : inout BIT_VECTOR (15 DOWNTO 0);  -- o7
21 
  o8 : inout BIT_VECTOR (15 DOWNTO 0);  -- o8
22 
  o9 : inout BIT_VECTOR (15 DOWNTO 0);  -- o9
23 
  o10 : inout BIT_VECTOR (15 DOWNTO 0); -- o10
24 
  o11 : inout BIT_VECTOR (15 DOWNTO 0); -- o11
25 
  o12 : inout BIT_VECTOR (15 DOWNTO 0); -- o12
26 
  o13 : inout BIT_VECTOR (15 DOWNTO 0); -- o13
27 
  o14 : inout BIT_VECTOR (15 DOWNTO 0); -- o14
28 
  o15 : inout BIT_VECTOR (15 DOWNTO 0); -- o15
29 
  o16 : inout BIT_VECTOR (15 DOWNTO 0); -- o16
30 
  o17 : inout BIT_VECTOR (15 DOWNTO 0); -- o17
31 
  o18 : inout BIT_VECTOR (15 DOWNTO 0); -- o18
32 
  vdd : in BIT; -- vdd
33 
  vss : in BIT  -- vss
34 
  );
35 
END dec16to288_latch;
36 
 
37 
-- Architecture Declaration
38 
 
39 
ARCHITECTURE VST OF dec16to288_latch IS
40 
  COMPONENT dec16to288
41 
    port (
42 
    a : in BIT_VECTOR(15 DOWNTO 0);     -- a
43 
    clr : in BIT;       -- clr
44 
    en : in BIT;        -- en
45 
    sel : in BIT_VECTOR(4 DOWNTO 0);    -- sel
46 
    o1 : out BIT_VECTOR(15 DOWNTO 0);   -- o1
47 
    o2 : out BIT_VECTOR(15 DOWNTO 0);   -- o2
48 
    o3 : out BIT_VECTOR(15 DOWNTO 0);   -- o3
49 
    o4 : out BIT_VECTOR(15 DOWNTO 0);   -- o4
50 
    o5 : out BIT_VECTOR(15 DOWNTO 0);   -- o5
51 
    o6 : out BIT_VECTOR(15 DOWNTO 0);   -- o6
52 
    o7 : out BIT_VECTOR(15 DOWNTO 0);   -- o7
53 
    o8 : out BIT_VECTOR(15 DOWNTO 0);   -- o8
54 
    o9 : out BIT_VECTOR(15 DOWNTO 0);   -- o9
55 
    o10 : out BIT_VECTOR(15 DOWNTO 0);  -- o10
56 
    o11 : out BIT_VECTOR(15 DOWNTO 0);  -- o11
57 
    o12 : out BIT_VECTOR(15 DOWNTO 0);  -- o12
58 
    o13 : out BIT_VECTOR(15 DOWNTO 0);  -- o13
59 
    o14 : out BIT_VECTOR(15 DOWNTO 0);  -- o14
60 
    o15 : out BIT_VECTOR(15 DOWNTO 0);  -- o15
61 
    o16 : out BIT_VECTOR(15 DOWNTO 0);  -- o16
62 
    o17 : out BIT_VECTOR(15 DOWNTO 0);  -- o17
63 
    o18 : out BIT_VECTOR(15 DOWNTO 0);  -- o18
64 
    vdd : in BIT;       -- vdd
65 
    vss : in BIT        -- vss
66 
    );
67 
  END COMPONENT;
68 
 
69 
  COMPONENT latch
70 
    port (
71 
    a : in BIT; -- a
72 
    en : in BIT;        -- en
73 
    b : inout BIT;      -- b
74 
    vdd : in BIT;       -- vdd
75 
    vss : in BIT        -- vss
76 
    );
77 
  END COMPONENT;
78 
 
79 
  SIGNAL x_0 : BIT;     -- x 0
80 
  SIGNAL x_1 : BIT;     -- x 1
81 
  SIGNAL x_2 : BIT;     -- x 2
82 
  SIGNAL x_3 : BIT;     -- x 3
83 
  SIGNAL x_4 : BIT;     -- x 4
84 
  SIGNAL x_5 : BIT;     -- x 5
85 
  SIGNAL x_6 : BIT;     -- x 6
86 
  SIGNAL x_7 : BIT;     -- x 7
87 
  SIGNAL x_8 : BIT;     -- x 8
88 
  SIGNAL x_9 : BIT;     -- x 9
89 
  SIGNAL x_10 : BIT;    -- x 10
90 
  SIGNAL x_11 : BIT;    -- x 11
91 
  SIGNAL x_12 : BIT;    -- x 12
92 
  SIGNAL x_13 : BIT;    -- x 13
93 
  SIGNAL x_14 : BIT;    -- x 14
94 
  SIGNAL x_15 : BIT;    -- x 15
95 
  SIGNAL x1_0 : BIT;    -- x1 0
96 
  SIGNAL x1_1 : BIT;    -- x1 1
97 
  SIGNAL x1_2 : BIT;    -- x1 2
98 
  SIGNAL x1_3 : BIT;    -- x1 3
99 
  SIGNAL x1_4 : BIT;    -- x1 4
100 
  SIGNAL x1_5 : BIT;    -- x1 5
101 
  SIGNAL x1_6 : BIT;    -- x1 6
102 
  SIGNAL x1_7 : BIT;    -- x1 7
103 
  SIGNAL x1_8 : BIT;    -- x1 8
104 
  SIGNAL x1_9 : BIT;    -- x1 9
105 
  SIGNAL x1_10 : BIT;   -- x1 10
106 
  SIGNAL x1_11 : BIT;   -- x1 11
107 
  SIGNAL x1_12 : BIT;   -- x1 12
108 
  SIGNAL x1_13 : BIT;   -- x1 13
109 
  SIGNAL x1_14 : BIT;   -- x1 14
110 
  SIGNAL x1_15 : BIT;   -- x1 15
111 
  SIGNAL x10_0 : BIT;   -- x10 0
112 
  SIGNAL x10_1 : BIT;   -- x10 1
113 
  SIGNAL x10_2 : BIT;   -- x10 2
114 
  SIGNAL x10_3 : BIT;   -- x10 3
115 
  SIGNAL x10_4 : BIT;   -- x10 4
116 
  SIGNAL x10_5 : BIT;   -- x10 5
117 
  SIGNAL x10_6 : BIT;   -- x10 6
118 
  SIGNAL x10_7 : BIT;   -- x10 7
119 
  SIGNAL x10_8 : BIT;   -- x10 8
120 
  SIGNAL x10_9 : BIT;   -- x10 9
121 
  SIGNAL x10_10 : BIT;  -- x10 10
122 
  SIGNAL x10_11 : BIT;  -- x10 11
123 
  SIGNAL x10_12 : BIT;  -- x10 12
124 
  SIGNAL x10_13 : BIT;  -- x10 13
125 
  SIGNAL x10_14 : BIT;  -- x10 14
126 
  SIGNAL x10_15 : BIT;  -- x10 15
127 
  SIGNAL x11_0 : BIT;   -- x11 0
128 
  SIGNAL x11_1 : BIT;   -- x11 1
129 
  SIGNAL x11_2 : BIT;   -- x11 2
130 
  SIGNAL x11_3 : BIT;   -- x11 3
131 
  SIGNAL x11_4 : BIT;   -- x11 4
132 
  SIGNAL x11_5 : BIT;   -- x11 5
133 
  SIGNAL x11_6 : BIT;   -- x11 6
134 
  SIGNAL x11_7 : BIT;   -- x11 7
135 
  SIGNAL x11_8 : BIT;   -- x11 8
136 
  SIGNAL x11_9 : BIT;   -- x11 9
137 
  SIGNAL x11_10 : BIT;  -- x11 10
138 
  SIGNAL x11_11 : BIT;  -- x11 11
139 
  SIGNAL x11_12 : BIT;  -- x11 12
140 
  SIGNAL x11_13 : BIT;  -- x11 13
141 
  SIGNAL x11_14 : BIT;  -- x11 14
142 
  SIGNAL x11_15 : BIT;  -- x11 15
143 
  SIGNAL x12_0 : BIT;   -- x12 0
144 
  SIGNAL x12_1 : BIT;   -- x12 1
145 
  SIGNAL x12_2 : BIT;   -- x12 2
146 
  SIGNAL x12_3 : BIT;   -- x12 3
147 
  SIGNAL x12_4 : BIT;   -- x12 4
148 
  SIGNAL x12_5 : BIT;   -- x12 5
149 
  SIGNAL x12_6 : BIT;   -- x12 6
150 
  SIGNAL x12_7 : BIT;   -- x12 7
151 
  SIGNAL x12_8 : BIT;   -- x12 8
152 
  SIGNAL x12_9 : BIT;   -- x12 9
153 
  SIGNAL x12_10 : BIT;  -- x12 10
154 
  SIGNAL x12_11 : BIT;  -- x12 11
155 
  SIGNAL x12_12 : BIT;  -- x12 12
156 
  SIGNAL x12_13 : BIT;  -- x12 13
157 
  SIGNAL x12_14 : BIT;  -- x12 14
158 
  SIGNAL x12_15 : BIT;  -- x12 15
159 
  SIGNAL x13_0 : BIT;   -- x13 0
160 
  SIGNAL x13_1 : BIT;   -- x13 1
161 
  SIGNAL x13_2 : BIT;   -- x13 2
162 
  SIGNAL x13_3 : BIT;   -- x13 3
163 
  SIGNAL x13_4 : BIT;   -- x13 4
164 
  SIGNAL x13_5 : BIT;   -- x13 5
165 
  SIGNAL x13_6 : BIT;   -- x13 6
166 
  SIGNAL x13_7 : BIT;   -- x13 7
167 
  SIGNAL x13_8 : BIT;   -- x13 8
168 
  SIGNAL x13_9 : BIT;   -- x13 9
169 
  SIGNAL x13_10 : BIT;  -- x13 10
170 
  SIGNAL x13_11 : BIT;  -- x13 11
171 
  SIGNAL x13_12 : BIT;  -- x13 12
172 
  SIGNAL x13_13 : BIT;  -- x13 13
173 
  SIGNAL x13_14 : BIT;  -- x13 14
174 
  SIGNAL x13_15 : BIT;  -- x13 15
175 
  SIGNAL x14_0 : BIT;   -- x14 0
176 
  SIGNAL x14_1 : BIT;   -- x14 1
177 
  SIGNAL x14_2 : BIT;   -- x14 2
178 
  SIGNAL x14_3 : BIT;   -- x14 3
179 
  SIGNAL x14_4 : BIT;   -- x14 4
180 
  SIGNAL x14_5 : BIT;   -- x14 5
181 
  SIGNAL x14_6 : BIT;   -- x14 6
182 
  SIGNAL x14_7 : BIT;   -- x14 7
183 
  SIGNAL x14_8 : BIT;   -- x14 8
184 
  SIGNAL x14_9 : BIT;   -- x14 9
185 
  SIGNAL x14_10 : BIT;  -- x14 10
186 
  SIGNAL x14_11 : BIT;  -- x14 11
187 
  SIGNAL x14_12 : BIT;  -- x14 12
188 
  SIGNAL x14_13 : BIT;  -- x14 13
189 
  SIGNAL x14_14 : BIT;  -- x14 14
190 
  SIGNAL x14_15 : BIT;  -- x14 15
191 
  SIGNAL x15_0 : BIT;   -- x15 0
192 
  SIGNAL x15_1 : BIT;   -- x15 1
193 
  SIGNAL x15_2 : BIT;   -- x15 2
194 
  SIGNAL x15_3 : BIT;   -- x15 3
195 
  SIGNAL x15_4 : BIT;   -- x15 4
196 
  SIGNAL x15_5 : BIT;   -- x15 5
197 
  SIGNAL x15_6 : BIT;   -- x15 6
198 
  SIGNAL x15_7 : BIT;   -- x15 7
199 
  SIGNAL x15_8 : BIT;   -- x15 8
200 
  SIGNAL x15_9 : BIT;   -- x15 9
201 
  SIGNAL x15_10 : BIT;  -- x15 10
202 
  SIGNAL x15_11 : BIT;  -- x15 11
203 
  SIGNAL x15_12 : BIT;  -- x15 12
204 
  SIGNAL x15_13 : BIT;  -- x15 13
205 
  SIGNAL x15_14 : BIT;  -- x15 14
206 
  SIGNAL x15_15 : BIT;  -- x15 15
207 
  SIGNAL x16_0 : BIT;   -- x16 0
208 
  SIGNAL x16_1 : BIT;   -- x16 1
209 
  SIGNAL x16_2 : BIT;   -- x16 2
210 
  SIGNAL x16_3 : BIT;   -- x16 3
211 
  SIGNAL x16_4 : BIT;   -- x16 4
212 
  SIGNAL x16_5 : BIT;   -- x16 5
213 
  SIGNAL x16_6 : BIT;   -- x16 6
214 
  SIGNAL x16_7 : BIT;   -- x16 7
215 
  SIGNAL x16_8 : BIT;   -- x16 8
216 
  SIGNAL x16_9 : BIT;   -- x16 9
217 
  SIGNAL x16_10 : BIT;  -- x16 10
218 
  SIGNAL x16_11 : BIT;  -- x16 11
219 
  SIGNAL x16_12 : BIT;  -- x16 12
220 
  SIGNAL x16_13 : BIT;  -- x16 13
221 
  SIGNAL x16_14 : BIT;  -- x16 14
222 
  SIGNAL x16_15 : BIT;  -- x16 15
223 
  SIGNAL x17_0 : BIT;   -- x17 0
224 
  SIGNAL x17_1 : BIT;   -- x17 1
225 
  SIGNAL x17_2 : BIT;   -- x17 2
226 
  SIGNAL x17_3 : BIT;   -- x17 3
227 
  SIGNAL x17_4 : BIT;   -- x17 4
228 
  SIGNAL x17_5 : BIT;   -- x17 5
229 
  SIGNAL x17_6 : BIT;   -- x17 6
230 
  SIGNAL x17_7 : BIT;   -- x17 7
231 
  SIGNAL x17_8 : BIT;   -- x17 8
232 
  SIGNAL x17_9 : BIT;   -- x17 9
233 
  SIGNAL x17_10 : BIT;  -- x17 10
234 
  SIGNAL x17_11 : BIT;  -- x17 11
235 
  SIGNAL x17_12 : BIT;  -- x17 12
236 
  SIGNAL x17_13 : BIT;  -- x17 13
237 
  SIGNAL x17_14 : BIT;  -- x17 14
238 
  SIGNAL x17_15 : BIT;  -- x17 15
239 
  SIGNAL x18_0 : BIT;   -- x18 0
240 
  SIGNAL x18_1 : BIT;   -- x18 1
241 
  SIGNAL x18_2 : BIT;   -- x18 2
242 
  SIGNAL x18_3 : BIT;   -- x18 3
243 
  SIGNAL x18_4 : BIT;   -- x18 4
244 
  SIGNAL x18_5 : BIT;   -- x18 5
245 
  SIGNAL x18_6 : BIT;   -- x18 6
246 
  SIGNAL x18_7 : BIT;   -- x18 7
247 
  SIGNAL x18_8 : BIT;   -- x18 8
248 
  SIGNAL x18_9 : BIT;   -- x18 9
249 
  SIGNAL x18_10 : BIT;  -- x18 10
250 
  SIGNAL x18_11 : BIT;  -- x18 11
251 
  SIGNAL x18_12 : BIT;  -- x18 12
252 
  SIGNAL x18_13 : BIT;  -- x18 13
253 
  SIGNAL x18_14 : BIT;  -- x18 14
254 
  SIGNAL x18_15 : BIT;  -- x18 15
255 
  SIGNAL x2_0 : BIT;    -- x2 0
256 
  SIGNAL x2_1 : BIT;    -- x2 1
257 
  SIGNAL x2_2 : BIT;    -- x2 2
258 
  SIGNAL x2_3 : BIT;    -- x2 3
259 
  SIGNAL x2_4 : BIT;    -- x2 4
260 
  SIGNAL x2_5 : BIT;    -- x2 5
261 
  SIGNAL x2_6 : BIT;    -- x2 6
262 
  SIGNAL x2_7 : BIT;    -- x2 7
263 
  SIGNAL x2_8 : BIT;    -- x2 8
264 
  SIGNAL x2_9 : BIT;    -- x2 9
265 
  SIGNAL x2_10 : BIT;   -- x2 10
266 
  SIGNAL x2_11 : BIT;   -- x2 11
267 
  SIGNAL x2_12 : BIT;   -- x2 12
268 
  SIGNAL x2_13 : BIT;   -- x2 13
269 
  SIGNAL x2_14 : BIT;   -- x2 14
270 
  SIGNAL x2_15 : BIT;   -- x2 15
271 
  SIGNAL x3_0 : BIT;    -- x3 0
272 
  SIGNAL x3_1 : BIT;    -- x3 1
273 
  SIGNAL x3_2 : BIT;    -- x3 2
274 
  SIGNAL x3_3 : BIT;    -- x3 3
275 
  SIGNAL x3_4 : BIT;    -- x3 4
276 
  SIGNAL x3_5 : BIT;    -- x3 5
277 
  SIGNAL x3_6 : BIT;    -- x3 6
278 
  SIGNAL x3_7 : BIT;    -- x3 7
279 
  SIGNAL x3_8 : BIT;    -- x3 8
280 
  SIGNAL x3_9 : BIT;    -- x3 9
281 
  SIGNAL x3_10 : BIT;   -- x3 10
282 
  SIGNAL x3_11 : BIT;   -- x3 11
283 
  SIGNAL x3_12 : BIT;   -- x3 12
284 
  SIGNAL x3_13 : BIT;   -- x3 13
285 
  SIGNAL x3_14 : BIT;   -- x3 14
286 
  SIGNAL x3_15 : BIT;   -- x3 15
287 
  SIGNAL x4_0 : BIT;    -- x4 0
288 
  SIGNAL x4_1 : BIT;    -- x4 1
289 
  SIGNAL x4_2 : BIT;    -- x4 2
290 
  SIGNAL x4_3 : BIT;    -- x4 3
291 
  SIGNAL x4_4 : BIT;    -- x4 4
292 
  SIGNAL x4_5 : BIT;    -- x4 5
293 
  SIGNAL x4_6 : BIT;    -- x4 6
294 
  SIGNAL x4_7 : BIT;    -- x4 7
295 
  SIGNAL x4_8 : BIT;    -- x4 8
296 
  SIGNAL x4_9 : BIT;    -- x4 9
297 
  SIGNAL x4_10 : BIT;   -- x4 10
298 
  SIGNAL x4_11 : BIT;   -- x4 11
299 
  SIGNAL x4_12 : BIT;   -- x4 12
300 
  SIGNAL x4_13 : BIT;   -- x4 13
301 
  SIGNAL x4_14 : BIT;   -- x4 14
302 
  SIGNAL x4_15 : BIT;   -- x4 15
303 
  SIGNAL x5_0 : BIT;    -- x5 0
304 
  SIGNAL x5_1 : BIT;    -- x5 1
305 
  SIGNAL x5_2 : BIT;    -- x5 2
306 
  SIGNAL x5_3 : BIT;    -- x5 3
307 
  SIGNAL x5_4 : BIT;    -- x5 4
308 
  SIGNAL x5_5 : BIT;    -- x5 5
309 
  SIGNAL x5_6 : BIT;    -- x5 6
310 
  SIGNAL x5_7 : BIT;    -- x5 7
311 
  SIGNAL x5_8 : BIT;    -- x5 8
312 
  SIGNAL x5_9 : BIT;    -- x5 9
313 
  SIGNAL x5_10 : BIT;   -- x5 10
314 
  SIGNAL x5_11 : BIT;   -- x5 11
315 
  SIGNAL x5_12 : BIT;   -- x5 12
316 
  SIGNAL x5_13 : BIT;   -- x5 13
317 
  SIGNAL x5_14 : BIT;   -- x5 14
318 
  SIGNAL x5_15 : BIT;   -- x5 15
319 
  SIGNAL x6_0 : BIT;    -- x6 0
320 
  SIGNAL x6_1 : BIT;    -- x6 1
321 
  SIGNAL x6_2 : BIT;    -- x6 2
322 
  SIGNAL x6_3 : BIT;    -- x6 3
323 
  SIGNAL x6_4 : BIT;    -- x6 4
324 
  SIGNAL x6_5 : BIT;    -- x6 5
325 
  SIGNAL x6_6 : BIT;    -- x6 6
326 
  SIGNAL x6_7 : BIT;    -- x6 7
327 
  SIGNAL x6_8 : BIT;    -- x6 8
328 
  SIGNAL x6_9 : BIT;    -- x6 9
329 
  SIGNAL x6_10 : BIT;   -- x6 10
330 
  SIGNAL x6_11 : BIT;   -- x6 11
331 
  SIGNAL x6_12 : BIT;   -- x6 12
332 
  SIGNAL x6_13 : BIT;   -- x6 13
333 
  SIGNAL x6_14 : BIT;   -- x6 14
334 
  SIGNAL x6_15 : BIT;   -- x6 15
335 
  SIGNAL x7_0 : BIT;    -- x7 0
336 
  SIGNAL x7_1 : BIT;    -- x7 1
337 
  SIGNAL x7_2 : BIT;    -- x7 2
338 
  SIGNAL x7_3 : BIT;    -- x7 3
339 
  SIGNAL x7_4 : BIT;    -- x7 4
340 
  SIGNAL x7_5 : BIT;    -- x7 5
341 
  SIGNAL x7_6 : BIT;    -- x7 6
342 
  SIGNAL x7_7 : BIT;    -- x7 7
343 
  SIGNAL x7_8 : BIT;    -- x7 8
344 
  SIGNAL x7_9 : BIT;    -- x7 9
345 
  SIGNAL x7_10 : BIT;   -- x7 10
346 
  SIGNAL x7_11 : BIT;   -- x7 11
347 
  SIGNAL x7_12 : BIT;   -- x7 12
348 
  SIGNAL x7_13 : BIT;   -- x7 13
349 
  SIGNAL x7_14 : BIT;   -- x7 14
350 
  SIGNAL x7_15 : BIT;   -- x7 15
351 
  SIGNAL x8_0 : BIT;    -- x8 0
352 
  SIGNAL x8_1 : BIT;    -- x8 1
353 
  SIGNAL x8_2 : BIT;    -- x8 2
354 
  SIGNAL x8_3 : BIT;    -- x8 3
355 
  SIGNAL x8_4 : BIT;    -- x8 4
356 
  SIGNAL x8_5 : BIT;    -- x8 5
357 
  SIGNAL x8_6 : BIT;    -- x8 6
358 
  SIGNAL x8_7 : BIT;    -- x8 7
359 
  SIGNAL x8_8 : BIT;    -- x8 8
360 
  SIGNAL x8_9 : BIT;    -- x8 9
361 
  SIGNAL x8_10 : BIT;   -- x8 10
362 
  SIGNAL x8_11 : BIT;   -- x8 11
363 
  SIGNAL x8_12 : BIT;   -- x8 12
364 
  SIGNAL x8_13 : BIT;   -- x8 13
365 
  SIGNAL x8_14 : BIT;   -- x8 14
366 
  SIGNAL x8_15 : BIT;   -- x8 15
367 
  SIGNAL x9_0 : BIT;    -- x9 0
368 
  SIGNAL x9_1 : BIT;    -- x9 1
369 
  SIGNAL x9_2 : BIT;    -- x9 2
370 
  SIGNAL x9_3 : BIT;    -- x9 3
371 
  SIGNAL x9_4 : BIT;    -- x9 4
372 
  SIGNAL x9_5 : BIT;    -- x9 5
373 
  SIGNAL x9_6 : BIT;    -- x9 6
374 
  SIGNAL x9_7 : BIT;    -- x9 7
375 
  SIGNAL x9_8 : BIT;    -- x9 8
376 
  SIGNAL x9_9 : BIT;    -- x9 9
377 
  SIGNAL x9_10 : BIT;   -- x9 10
378 
  SIGNAL x9_11 : BIT;   -- x9 11
379 
  SIGNAL x9_12 : BIT;   -- x9 12
380 
  SIGNAL x9_13 : BIT;   -- x9 13
381 
  SIGNAL x9_14 : BIT;   -- x9 14
382 
  SIGNAL x9_15 : BIT;   -- x9 15
383 
 
384 
BEGIN
385 
 
386 
  dec1 : dec16to288
387 
    PORT MAP (
388 
    vss => vss,
389 
    vdd => vdd,
390 
    o18 => x18_15& x18_14& x18_13& x18_12& x18_11& x18_10& x18_9& x18_8& x18_7& x18_6& x18_5& x18_4& x18_3& x18_2& x18_1& x18_0,
391 
    o17 => x17_15& x17_14& x17_13& x17_12& x17_11& x17_10& x17_9& x17_8& x17_7& x17_6& x17_5& x17_4& x17_3& x17_2& x17_1& x17_0,
392 
    o16 => x16_15& x16_14& x16_13& x16_12& x16_11& x16_10& x16_9& x16_8& x16_7& x16_6& x16_5& x16_4& x16_3& x16_2& x16_1& x16_0,
393 
    o15 => x15_15& x15_14& x15_13& x15_12& x15_11& x15_10& x15_9& x15_8& x15_7& x15_6& x15_5& x15_4& x15_3& x15_2& x15_1& x15_0,
394 
    o14 => x14_15& x14_14& x14_13& x14_12& x14_11& x14_10& x14_9& x14_8& x14_7& x14_6& x14_5& x14_4& x14_3& x14_2& x14_1& x14_0,
395 
    o13 => x13_15& x13_14& x13_13& x13_12& x13_11& x13_10& x13_9& x13_8& x13_7& x13_6& x13_5& x13_4& x13_3& x13_2& x13_1& x13_0,
396 
    o12 => x12_15& x12_14& x12_13& x12_12& x12_11& x12_10& x12_9& x12_8& x12_7& x12_6& x12_5& x12_4& x12_3& x12_2& x12_1& x12_0,
397 
    o11 => x11_15& x11_14& x11_13& x11_12& x11_11& x11_10& x11_9& x11_8& x11_7& x11_6& x11_5& x11_4& x11_3& x11_2& x11_1& x11_0,
398 
    o10 => x10_15& x10_14& x10_13& x10_12& x10_11& x10_10& x10_9& x10_8& x10_7& x10_6& x10_5& x10_4& x10_3& x10_2& x10_1& x10_0,
399 
    o9 => x9_15& x9_14& x9_13& x9_12& x9_11& x9_10& x9_9& x9_8& x9_7& x9_6& x9_5& x9_4& x9_3& x9_2& x9_1& x9_0,
400 
    o8 => x8_15& x8_14& x8_13& x8_12& x8_11& x8_10& x8_9& x8_8& x8_7& x8_6& x8_5& x8_4& x8_3& x8_2& x8_1& x8_0,
401 
    o7 => x7_15& x7_14& x7_13& x7_12& x7_11& x7_10& x7_9& x7_8& x7_7& x7_6& x7_5& x7_4& x7_3& x7_2& x7_1& x7_0,
402 
    o6 => x6_15& x6_14& x6_13& x6_12& x6_11& x6_10& x6_9& x6_8& x6_7& x6_6& x6_5& x6_4& x6_3& x6_2& x6_1& x6_0,
403 
    o5 => x5_15& x5_14& x5_13& x5_12& x5_11& x5_10& x5_9& x5_8& x5_7& x5_6& x5_5& x5_4& x5_3& x5_2& x5_1& x5_0,
404 
    o4 => x_15& x_14& x_13& x_12& x_11& x_10& x_9& x_8& x_7& x_6& x_5& x_4& x_3& x_2& x_1& x_0,
405 
    o3 => x3_15& x3_14& x3_13& x3_12& x3_11& x3_10& x3_9& x3_8& x3_7& x3_6& x3_5& x3_4& x3_3& x3_2& x3_1& x3_0,
406 
    o2 => x2_15& x2_14& x2_13& x2_12& x2_11& x2_10& x2_9& x2_8& x2_7& x2_6& x2_5& x2_4& x2_3& x2_2& x2_1& x2_0,
407 
    o1 => x1_15& x1_14& x1_13& x1_12& x1_11& x1_10& x1_9& x1_8& x1_7& x1_6& x1_5& x1_4& x1_3& x1_2& x1_1& x1_0,
408 
    sel => sel(4)& sel(3)& sel(2)& sel(1)& sel(0),
409 
    en => clr,
410 
    clr => en,
411 
    a => a(15)& a(14)& a(13)& a(12)& a(11)& a(10)& a(9)& a(8)& a(7)& a(6)& a(5)& a(4)& a(3)& a(2)& a(1)& a(0));
412 
  latch0 : latch
413 
    PORT MAP (
414 
    vss => vss,
415 
    vdd => vdd,
416 
    b => o1(0),
417 
    en => cke,
418 
    a => x1_0);
419 
  latch16 : latch
420 
    PORT MAP (
421 
    vss => vss,
422 
    vdd => vdd,
423 
    b => o2(0),
424 
    en => cke,
425 
    a => x2_0);
426 
  latch32 : latch
427 
    PORT MAP (
428 
    vss => vss,
429 
    vdd => vdd,
430 
    b => o3(0),
431 
    en => cke,
432 
    a => x3_0);
433 
  latch48 : latch
434 
    PORT MAP (
435 
    vss => vss,
436 
    vdd => vdd,
437 
    b => o4(0),
438 
    en => cke,
439 
    a => x4_0);
440 
  latch64 : latch
441 
    PORT MAP (
442 
    vss => vss,
443 
    vdd => vdd,
444 
    b => o5(0),
445 
    en => cke,
446 
    a => x5_0);
447 
  latch80 : latch
448 
    PORT MAP (
449 
    vss => vss,
450 
    vdd => vdd,
451 
    b => o6(0),
452 
    en => cke,
453 
    a => x6_0);
454 
  latch96 : latch
455 
    PORT MAP (
456 
    vss => vss,
457 
    vdd => vdd,
458 
    b => o1(0),
459 
    en => cke,
460 
    a => x7_0);
461 
  latch112 : latch
462 
    PORT MAP (
463 
    vss => vss,
464 
    vdd => vdd,
465 
    b => o2(0),
466 
    en => cke,
467 
    a => x8_0);
468 
  latch128 : latch
469 
    PORT MAP (
470 
    vss => vss,
471 
    vdd => vdd,
472 
    b => o3(0),
473 
    en => cke,
474 
    a => x9_0);
475 
  latch144 : latch
476 
    PORT MAP (
477 
    vss => vss,
478 
    vdd => vdd,
479 
    b => o4(0),
480 
    en => cke,
481 
    a => x10_0);
482 
  latch160 : latch
483 
    PORT MAP (
484 
    vss => vss,
485 
    vdd => vdd,
486 
    b => o5(0),
487 
    en => cke,
488 
    a => x11_0);
489 
  latch176 : latch
490 
    PORT MAP (
491 
    vss => vss,
492 
    vdd => vdd,
493 
    b => o6(0),
494 
    en => cke,
495 
    a => x12_0);
496 
  latch192 : latch
497 
    PORT MAP (
498 
    vss => vss,
499 
    vdd => vdd,
500 
    b => o1(0),
501 
    en => cke,
502 
    a => x13_0);
503 
  latch208 : latch
504 
    PORT MAP (
505 
    vss => vss,
506 
    vdd => vdd,
507 
    b => o2(0),
508 
    en => cke,
509 
    a => x14_0);
510 
  latch224 : latch
511 
    PORT MAP (
512 
    vss => vss,
513 
    vdd => vdd,
514 
    b => o3(0),
515 
    en => cke,
516 
    a => x15_0);
517 
  latch240 : latch
518 
    PORT MAP (
519 
    vss => vss,
520 
    vdd => vdd,
521 
    b => o4(0),
522 
    en => cke,
523 
    a => x16_0);
524 
  latch256 : latch
525 
    PORT MAP (
526 
    vss => vss,
527 
    vdd => vdd,
528 
    b => o5(0),
529 
    en => cke,
530 
    a => x17_0);
531 
  latch272 : latch
532 
    PORT MAP (
533 
    vss => vss,
534 
    vdd => vdd,
535 
    b => o6(0),
536 
    en => cke,
537 
    a => x18_0);
538 
  latch1 : latch
539 
    PORT MAP (
540 
    vss => vss,
541 
    vdd => vdd,
542 
    b => o1(1),
543 
    en => cke,
544 
    a => x1_1);
545 
  latch17 : latch
546 
    PORT MAP (
547 
    vss => vss,
548 
    vdd => vdd,
549 
    b => o2(1),
550 
    en => cke,
551 
    a => x2_1);
552 
  latch33 : latch
553 
    PORT MAP (
554 
    vss => vss,
555 
    vdd => vdd,
556 
    b => o3(1),
557 
    en => cke,
558 
    a => x3_1);
559 
  latch49 : latch
560 
    PORT MAP (
561 
    vss => vss,
562 
    vdd => vdd,
563 
    b => o4(1),
564 
    en => cke,
565 
    a => x4_1);
566 
  latch65 : latch
567 
    PORT MAP (
568 
    vss => vss,
569 
    vdd => vdd,
570 
    b => o5(1),
571 
    en => cke,
572 
    a => x5_1);
573 
  latch81 : latch
574 
    PORT MAP (
575 
    vss => vss,
576 
    vdd => vdd,
577 
    b => o6(1),
578 
    en => cke,
579 
    a => x6_1);
580 
  latch97 : latch
581 
    PORT MAP (
582 
    vss => vss,
583 
    vdd => vdd,
584 
    b => o1(1),
585 
    en => cke,
586 
    a => x7_1);
587 
  latch113 : latch
588 
    PORT MAP (
589 
    vss => vss,
590 
    vdd => vdd,
591 
    b => o2(1),
592 
    en => cke,
593 
    a => x8_1);
594 
  latch129 : latch
595 
    PORT MAP (
596 
    vss => vss,
597 
    vdd => vdd,
598 
    b => o3(1),
599 
    en => cke,
600 
    a => x9_1);
601 
  latch145 : latch
602 
    PORT MAP (
603 
    vss => vss,
604 
    vdd => vdd,
605 
    b => o4(1),
606 
    en => cke,
607 
    a => x10_1);
608 
  latch161 : latch
609 
    PORT MAP (
610 
    vss => vss,
611 
    vdd => vdd,
612 
    b => o5(1),
613 
    en => cke,
614 
    a => x11_1);
615 
  latch177 : latch
616 
    PORT MAP (
617 
    vss => vss,
618 
    vdd => vdd,
619 
    b => o6(1),
620 
    en => cke,
621 
    a => x12_1);
622 
  latch193 : latch
623 
    PORT MAP (
624 
    vss => vss,
625 
    vdd => vdd,
626 
    b => o1(1),
627 
    en => cke,
628 
    a => x13_1);
629 
  latch209 : latch
630 
    PORT MAP (
631 
    vss => vss,
632 
    vdd => vdd,
633 
    b => o2(1),
634 
    en => cke,
635 
    a => x14_1);
636 
  latch225 : latch
637 
    PORT MAP (
638 
    vss => vss,
639 
    vdd => vdd,
640 
    b => o3(1),
641 
    en => cke,
642 
    a => x15_1);
643 
  latch241 : latch
644 
    PORT MAP (
645 
    vss => vss,
646 
    vdd => vdd,
647 
    b => o4(1),
648 
    en => cke,
649 
    a => x16_1);
650 
  latch257 : latch
651 
    PORT MAP (
652 
    vss => vss,
653 
    vdd => vdd,
654 
    b => o5(1),
655 
    en => cke,
656 
    a => x17_1);
657 
  latch273 : latch
658 
    PORT MAP (
659 
    vss => vss,
660 
    vdd => vdd,
661 
    b => o6(1),
662 
    en => cke,
663 
    a => x18_1);
664 
  latch2 : latch
665 
    PORT MAP (
666 
    vss => vss,
667 
    vdd => vdd,
668 
    b => o1(2),
669 
    en => cke,
670 
    a => x1_2);
671 
  latch18 : latch
672 
    PORT MAP (
673 
    vss => vss,
674 
    vdd => vdd,
675 
    b => o2(2),
676 
    en => cke,
677 
    a => x2_2);
678 
  latch34 : latch
679 
    PORT MAP (
680 
    vss => vss,
681 
    vdd => vdd,
682 
    b => o3(2),
683 
    en => cke,
684 
    a => x3_2);
685 
  latch50 : latch
686 
    PORT MAP (
687 
    vss => vss,
688 
    vdd => vdd,
689 
    b => o4(2),
690 
    en => cke,
691 
    a => x4_2);
692 
  latch66 : latch
693 
    PORT MAP (
694 
    vss => vss,
695 
    vdd => vdd,
696 
    b => o5(2),
697 
    en => cke,
698 
    a => x5_2);
699 
  latch82 : latch
700 
    PORT MAP (
701 
    vss => vss,
702 
    vdd => vdd,
703 
    b => o6(2),
704 
    en => cke,
705 
    a => x6_2);
706 
  latch98 : latch
707 
    PORT MAP (
708 
    vss => vss,
709 
    vdd => vdd,
710 
    b => o1(2),
711 
    en => cke,
712 
    a => x7_2);
713 
  latch114 : latch
714 
    PORT MAP (
715 
    vss => vss,
716 
    vdd => vdd,
717 
    b => o2(2),
718 
    en => cke,
719 
    a => x8_2);
720 
  latch130 : latch
721 
    PORT MAP (
722 
    vss => vss,
723 
    vdd => vdd,
724 
    b => o3(2),
725 
    en => cke,
726 
    a => x9_2);
727 
  latch146 : latch
728 
    PORT MAP (
729 
    vss => vss,
730 
    vdd => vdd,
731 
    b => o4(2),
732 
    en => cke,
733 
    a => x10_2);
734 
  latch162 : latch
735 
    PORT MAP (
736 
    vss => vss,
737 
    vdd => vdd,
738 
    b => o5(2),
739 
    en => cke,
740 
    a => x11_2);
741 
  latch178 : latch
742 
    PORT MAP (
743 
    vss => vss,
744 
    vdd => vdd,
745 
    b => o6(2),
746 
    en => cke,
747 
    a => x12_2);
748 
  latch194 : latch
749 
    PORT MAP (
750 
    vss => vss,
751 
    vdd => vdd,
752 
    b => o1(2),
753 
    en => cke,
754 
    a => x13_2);
755 
  latch210 : latch
756 
    PORT MAP (
757 
    vss => vss,
758 
    vdd => vdd,
759 
    b => o2(2),
760 
    en => cke,
761 
    a => x14_2);
762 
  latch226 : latch
763 
    PORT MAP (
764 
    vss => vss,
765 
    vdd => vdd,
766 
    b => o3(2),
767 
    en => cke,
768 
    a => x15_2);
769 
  latch242 : latch
770 
    PORT MAP (
771 
    vss => vss,
772 
    vdd => vdd,
773 
    b => o4(2),
774 
    en => cke,
775 
    a => x16_2);
776 
  latch258 : latch
777 
    PORT MAP (
778 
    vss => vss,
779 
    vdd => vdd,
780 
    b => o5(2),
781 
    en => cke,
782 
    a => x17_2);
783 
  latch274 : latch
784 
    PORT MAP (
785 
    vss => vss,
786 
    vdd => vdd,
787 
    b => o6(2),
788 
    en => cke,
789 
    a => x18_2);
790 
  latch3 : latch
791 
    PORT MAP (
792 
    vss => vss,
793 
    vdd => vdd,
794 
    b => o1(3),
795 
    en => cke,
796 
    a => x1_3);
797 
  latch19 : latch
798 
    PORT MAP (
799 
    vss => vss,
800 
    vdd => vdd,
801 
    b => o2(3),
802 
    en => cke,
803 
    a => x2_3);
804 
  latch35 : latch
805 
    PORT MAP (
806 
    vss => vss,
807 
    vdd => vdd,
808 
    b => o3(3),
809 
    en => cke,
810 
    a => x3_3);
811 
  latch51 : latch
812 
    PORT MAP (
813 
    vss => vss,
814 
    vdd => vdd,
815 
    b => o4(3),
816 
    en => cke,
817 
    a => x4_3);
818 
  latch67 : latch
819 
    PORT MAP (
820 
    vss => vss,
821 
    vdd => vdd,
822 
    b => o5(3),
823 
    en => cke,
824 
    a => x5_3);
825 
  latch83 : latch
826 
    PORT MAP (
827 
    vss => vss,
828 
    vdd => vdd,
829 
    b => o6(3),
830 
    en => cke,
831 
    a => x6_3);
832 
  latch99 : latch
833 
    PORT MAP (
834 
    vss => vss,
835 
    vdd => vdd,
836 
    b => o1(3),
837 
    en => cke,
838 
    a => x7_3);
839 
  latch115 : latch
840 
    PORT MAP (
841 
    vss => vss,
842 
    vdd => vdd,
843 
    b => o2(3),
844 
    en => cke,
845 
    a => x8_3);
846 
  latch131 : latch
847 
    PORT MAP (
848 
    vss => vss,
849 
    vdd => vdd,
850 
    b => o3(3),
851 
    en => cke,
852 
    a => x9_3);
853 
  latch147 : latch
854 
    PORT MAP (
855 
    vss => vss,
856 
    vdd => vdd,
857 
    b => o4(3),
858 
    en => cke,
859 
    a => x10_3);
860 
  latch163 : latch
861 
    PORT MAP (
862 
    vss => vss,
863 
    vdd => vdd,
864 
    b => o5(3),
865 
    en => cke,
866 
    a => x11_3);
867 
  latch179 : latch
868 
    PORT MAP (
869 
    vss => vss,
870 
    vdd => vdd,
871 
    b => o6(3),
872 
    en => cke,
873 
    a => x12_3);
874 
  latch195 : latch
875 
    PORT MAP (
876 
    vss => vss,
877 
    vdd => vdd,
878 
    b => o1(3),
879 
    en => cke,
880 
    a => x13_3);
881 
  latch211 : latch
882 
    PORT MAP (
883 
    vss => vss,
884 
    vdd => vdd,
885 
    b => o2(3),
886 
    en => cke,
887 
    a => x14_3);
888 
  latch227 : latch
889 
    PORT MAP (
890 
    vss => vss,
891 
    vdd => vdd,
892 
    b => o3(3),
893 
    en => cke,
894 
    a => x15_3);
895 
  latch243 : latch
896 
    PORT MAP (
897 
    vss => vss,
898 
    vdd => vdd,
899 
    b => o4(3),
900 
    en => cke,
901 
    a => x16_3);
902 
  latch259 : latch
903 
    PORT MAP (
904 
    vss => vss,
905 
    vdd => vdd,
906 
    b => o5(3),
907 
    en => cke,
908 
    a => x17_3);
909 
  latch275 : latch
910 
    PORT MAP (
911 
    vss => vss,
912 
    vdd => vdd,
913 
    b => o6(3),
914 
    en => cke,
915 
    a => x18_3);
916 
  latch4 : latch
917 
    PORT MAP (
918 
    vss => vss,
919 
    vdd => vdd,
920 
    b => o1(4),
921 
    en => cke,
922 
    a => x1_4);
923 
  latch20 : latch
924 
    PORT MAP (
925 
    vss => vss,
926 
    vdd => vdd,
927 
    b => o2(4),
928 
    en => cke,
929 
    a => x2_4);
930 
  latch36 : latch
931 
    PORT MAP (
932 
    vss => vss,
933 
    vdd => vdd,
934 
    b => o3(4),
935 
    en => cke,
936 
    a => x3_4);
937 
  latch52 : latch
938 
    PORT MAP (
939 
    vss => vss,
940 
    vdd => vdd,
941 
    b => o4(4),
942 
    en => cke,
943 
    a => x4_4);
944 
  latch68 : latch
945 
    PORT MAP (
946 
    vss => vss,
947 
    vdd => vdd,
948 
    b => o5(4),
949 
    en => cke,
950 
    a => x5_4);
951 
  latch84 : latch
952 
    PORT MAP (
953 
    vss => vss,
954 
    vdd => vdd,
955 
    b => o6(4),
956 
    en => cke,
957 
    a => x6_4);
958 
  latch100 : latch
959 
    PORT MAP (
960 
    vss => vss,
961 
    vdd => vdd,
962 
    b => o1(4),
963 
    en => cke,
964 
    a => x7_4);
965 
  latch116 : latch
966 
    PORT MAP (
967 
    vss => vss,
968 
    vdd => vdd,
969 
    b => o2(4),
970 
    en => cke,
971 
    a => x8_4);
972 
  latch132 : latch
973 
    PORT MAP (
974 
    vss => vss,
975 
    vdd => vdd,
976 
    b => o3(4),
977 
    en => cke,
978 
    a => x9_4);
979 
  latch148 : latch
980 
    PORT MAP (
981 
    vss => vss,
982 
    vdd => vdd,
983 
    b => o4(4),
984 
    en => cke,
985 
    a => x10_4);
986 
  latch164 : latch
987 
    PORT MAP (
988 
    vss => vss,
989 
    vdd => vdd,
990 
    b => o5(4),
991 
    en => cke,
992 
    a => x11_4);
993 
  latch180 : latch
994 
    PORT MAP (
995 
    vss => vss,
996 
    vdd => vdd,
997 
    b => o6(4),
998 
    en => cke,
999 
    a => x12_4);
1000 
  latch196 : latch
1001 
    PORT MAP (
1002 
    vss => vss,
1003 
    vdd => vdd,
1004 
    b => o1(4),
1005 
    en => cke,
1006 
    a => x13_4);
1007 
  latch212 : latch
1008 
    PORT MAP (
1009 
    vss => vss,
1010 
    vdd => vdd,
1011 
    b => o2(4),
1012 
    en => cke,
1013 
    a => x14_4);
1014 
  latch228 : latch
1015 
    PORT MAP (
1016 
    vss => vss,
1017 
    vdd => vdd,
1018 
    b => o3(4),
1019 
    en => cke,
1020 
    a => x15_4);
1021 
  latch244 : latch
1022 
    PORT MAP (
1023 
    vss => vss,
1024 
    vdd => vdd,
1025 
    b => o4(4),
1026 
    en => cke,
1027 
    a => x16_4);
1028 
  latch260 : latch
1029 
    PORT MAP (
1030 
    vss => vss,
1031 
    vdd => vdd,
1032 
    b => o5(4),
1033 
    en => cke,
1034 
    a => x17_4);
1035 
  latch276 : latch
1036 
    PORT MAP (
1037 
    vss => vss,
1038 
    vdd => vdd,
1039 
    b => o6(4),
1040 
    en => cke,
1041 
    a => x18_4);
1042 
  latch5 : latch
1043 
    PORT MAP (
1044 
    vss => vss,
1045 
    vdd => vdd,
1046 
    b => o1(5),
1047 
    en => cke,
1048 
    a => x1_5);
1049 
  latch21 : latch
1050 
    PORT MAP (
1051 
    vss => vss,
1052 
    vdd => vdd,
1053 
    b => o2(5),
1054 
    en => cke,
1055 
    a => x2_5);
1056 
  latch37 : latch
1057 
    PORT MAP (
1058 
    vss => vss,
1059 
    vdd => vdd,
1060 
    b => o3(5),
1061 
    en => cke,
1062 
    a => x3_5);
1063 
  latch53 : latch
1064 
    PORT MAP (
1065 
    vss => vss,
1066 
    vdd => vdd,
1067 
    b => o4(5),
1068 
    en => cke,
1069 
    a => x4_5);
1070 
  latch69 : latch
1071 
    PORT MAP (
1072 
    vss => vss,
1073 
    vdd => vdd,
1074 
    b => o5(5),
1075 
    en => cke,
1076 
    a => x5_5);
1077 
  latch85 : latch
1078 
    PORT MAP (
1079 
    vss => vss,
1080 
    vdd => vdd,
1081 
    b => o6(5),
1082 
    en => cke,
1083 
    a => x6_5);
1084 
  latch101 : latch
1085 
    PORT MAP (
1086 
    vss => vss,
1087 
    vdd => vdd,
1088 
    b => o1(5),
1089 
    en => cke,
1090 
    a => x7_5);
1091 
  latch117 : latch
1092 
    PORT MAP (
1093 
    vss => vss,
1094 
    vdd => vdd,
1095 
    b => o2(5),
1096 
    en => cke,
1097 
    a => x8_5);
1098 
  latch133 : latch
1099 
    PORT MAP (
1100 
    vss => vss,
1101 
    vdd => vdd,
1102 
    b => o3(5),
1103 
    en => cke,
1104 
    a => x9_5);
1105 
  latch149 : latch
1106 
    PORT MAP (
1107 
    vss => vss,
1108 
    vdd => vdd,
1109 
    b => o4(5),
1110 
    en => cke,
1111 
    a => x10_5);
1112 
  latch165 : latch
1113 
    PORT MAP (
1114 
    vss => vss,
1115 
    vdd => vdd,
1116 
    b => o5(5),
1117 
    en => cke,
1118 
    a => x11_5);
1119 
  latch181 : latch
1120 
    PORT MAP (
1121 
    vss => vss,
1122 
    vdd => vdd,
1123 
    b => o6(5),
1124 
    en => cke,
1125 
    a => x12_5);
1126 
  latch197 : latch
1127 
    PORT MAP (
1128 
    vss => vss,
1129 
    vdd => vdd,
1130 
    b => o1(5),
1131 
    en => cke,
1132 
    a => x13_5);
1133 
  latch213 : latch
1134 
    PORT MAP (
1135 
    vss => vss,
1136 
    vdd => vdd,
1137 
    b => o2(5),
1138 
    en => cke,
1139 
    a => x14_5);
1140 
  latch229 : latch
1141 
    PORT MAP (
1142 
    vss => vss,
1143 
    vdd => vdd,
1144 
    b => o3(5),
1145 
    en => cke,
1146 
    a => x15_5);
1147 
  latch245 : latch
1148 
    PORT MAP (
1149 
    vss => vss,
1150 
    vdd => vdd,
1151 
    b => o4(5),
1152 
    en => cke,
1153 
    a => x16_5);
1154 
  latch261 : latch
1155 
    PORT MAP (
1156 
    vss => vss,
1157 
    vdd => vdd,
1158 
    b => o5(5),
1159 
    en => cke,
1160 
    a => x17_5);
1161 
  latch277 : latch
1162 
    PORT MAP (
1163 
    vss => vss,
1164 
    vdd => vdd,
1165 
    b => o6(5),
1166 
    en => cke,
1167 
    a => x18_5);
1168 
  latch6 : latch
1169 
    PORT MAP (
1170 
    vss => vss,
1171 
    vdd => vdd,
1172 
    b => o1(6),
1173 
    en => cke,
1174 
    a => x1_6);
1175 
  latch22 : latch
1176 
    PORT MAP (
1177 
    vss => vss,
1178 
    vdd => vdd,
1179 
    b => o2(6),
1180 
    en => cke,
1181 
    a => x2_6);
1182 
  latch38 : latch
1183 
    PORT MAP (
1184 
    vss => vss,
1185 
    vdd => vdd,
1186 
    b => o3(6),
1187 
    en => cke,
1188 
    a => x3_6);
1189 
  latch54 : latch
1190 
    PORT MAP (
1191 
    vss => vss,
1192 
    vdd => vdd,
1193 
    b => o4(6),
1194 
    en => cke,
1195 
    a => x4_6);
1196 
  latch70 : latch
1197 
    PORT MAP (
1198 
    vss => vss,
1199 
    vdd => vdd,
1200 
    b => o5(6),
1201 
    en => cke,
1202 
    a => x5_6);
1203 
  latch86 : latch
1204 
    PORT MAP (
1205 
    vss => vss,
1206 
    vdd => vdd,
1207 
    b => o6(6),
1208 
    en => cke,
1209 
    a => x6_6);
1210 
  latch102 : latch
1211 
    PORT MAP (
1212 
    vss => vss,
1213 
    vdd => vdd,
1214 
    b => o1(6),
1215 
    en => cke,
1216 
    a => x7_6);
1217 
  latch118 : latch
1218 
    PORT MAP (
1219 
    vss => vss,
1220 
    vdd => vdd,
1221 
    b => o2(6),
1222 
    en => cke,
1223 
    a => x8_6);
1224 
  latch134 : latch
1225 
    PORT MAP (
1226 
    vss => vss,
1227 
    vdd => vdd,
1228 
    b => o3(6),
1229 
    en => cke,
1230 
    a => x9_6);
1231 
  latch150 : latch
1232 
    PORT MAP (
1233 
    vss => vss,
1234 
    vdd => vdd,
1235 
    b => o4(6),
1236 
    en => cke,
1237 
    a => x10_6);
1238 
  latch166 : latch
1239 
    PORT MAP (
1240 
    vss => vss,
1241 
    vdd => vdd,
1242 
    b => o5(6),
1243 
    en => cke,
1244 
    a => x11_6);
1245 
  latch182 : latch
1246 
    PORT MAP (
1247 
    vss => vss,
1248 
    vdd => vdd,
1249 
    b => o6(6),
1250 
    en => cke,
1251 
    a => x12_6);
1252 
  latch198 : latch
1253 
    PORT MAP (
1254 
    vss => vss,
1255 
    vdd => vdd,
1256 
    b => o1(6),
1257 
    en => cke,
1258 
    a => x13_6);
1259 
  latch214 : latch
1260 
    PORT MAP (
1261 
    vss => vss,
1262 
    vdd => vdd,
1263 
    b => o2(6),
1264 
    en => cke,
1265 
    a => x14_6);
1266 
  latch230 : latch
1267 
    PORT MAP (
1268 
    vss => vss,
1269 
    vdd => vdd,
1270 
    b => o3(6),
1271 
    en => cke,
1272 
    a => x15_6);
1273 
  latch246 : latch
1274 
    PORT MAP (
1275 
    vss => vss,
1276 
    vdd => vdd,
1277 
    b => o4(6),
1278 
    en => cke,
1279 
    a => x16_6);
1280 
  latch262 : latch
1281 
    PORT MAP (
1282 
    vss => vss,
1283 
    vdd => vdd,
1284 
    b => o5(6),
1285 
    en => cke,
1286 
    a => x17_6);
1287 
  latch278 : latch
1288 
    PORT MAP (
1289 
    vss => vss,
1290 
    vdd => vdd,
1291 
    b => o6(6),
1292 
    en => cke,
1293 
    a => x18_6);
1294 
  latch7 : latch
1295 
    PORT MAP (
1296 
    vss => vss,
1297 
    vdd => vdd,
1298 
    b => o1(7),
1299 
    en => cke,
1300 
    a => x1_7);
1301 
  latch23 : latch
1302 
    PORT MAP (
1303 
    vss => vss,
1304 
    vdd => vdd,
1305 
    b => o2(7),
1306 
    en => cke,
1307 
    a => x2_7);
1308 
  latch39 : latch
1309 
    PORT MAP (
1310 
    vss => vss,
1311 
    vdd => vdd,
1312 
    b => o3(7),
1313 
    en => cke,
1314 
    a => x3_7);
1315 
  latch55 : latch
1316 
    PORT MAP (
1317 
    vss => vss,
1318 
    vdd => vdd,
1319 
    b => o4(7),
1320 
    en => cke,
1321 
    a => x4_7);
1322 
  latch71 : latch
1323 
    PORT MAP (
1324 
    vss => vss,
1325 
    vdd => vdd,
1326 
    b => o5(7),
1327 
    en => cke,
1328 
    a => x5_7);
1329 
  latch87 : latch
1330 
    PORT MAP (
1331 
    vss => vss,
1332 
    vdd => vdd,
1333 
    b => o6(7),
1334 
    en => cke,
1335 
    a => x6_7);
1336 
  latch103 : latch
1337 
    PORT MAP (
1338 
    vss => vss,
1339 
    vdd => vdd,
1340 
    b => o1(7),
1341 
    en => cke,
1342 
    a => x7_7);
1343 
  latch119 : latch
1344 
    PORT MAP (
1345 
    vss => vss,
1346 
    vdd => vdd,
1347 
    b => o2(7),
1348 
    en => cke,
1349 
    a => x8_7);
1350 
  latch135 : latch
1351 
    PORT MAP (
1352 
    vss => vss,
1353 
    vdd => vdd,
1354 
    b => o3(7),
1355 
    en => cke,
1356 
    a => x9_7);
1357 
  latch151 : latch
1358 
    PORT MAP (
1359 
    vss => vss,
1360 
    vdd => vdd,
1361 
    b => o4(7),
1362 
    en => cke,
1363 
    a => x10_7);
1364 
  latch167 : latch
1365 
    PORT MAP (
1366 
    vss => vss,
1367 
    vdd => vdd,
1368 
    b => o5(7),
1369 
    en => cke,
1370 
    a => x11_7);
1371 
  latch183 : latch
1372 
    PORT MAP (
1373 
    vss => vss,
1374 
    vdd => vdd,
1375 
    b => o6(7),
1376 
    en => cke,
1377 
    a => x12_7);
1378 
  latch199 : latch
1379 
    PORT MAP (
1380 
    vss => vss,
1381 
    vdd => vdd,
1382 
    b => o1(7),
1383 
    en => cke,
1384 
    a => x13_7);
1385 
  latch215 : latch
1386 
    PORT MAP (
1387 
    vss => vss,
1388 
    vdd => vdd,
1389 
    b => o2(7),
1390 
    en => cke,
1391 
    a => x14_7);
1392 
  latch231 : latch
1393 
    PORT MAP (
1394 
    vss => vss,
1395 
    vdd => vdd,
1396 
    b => o3(7),
1397 
    en => cke,
1398 
    a => x15_7);
1399 
  latch247 : latch
1400 
    PORT MAP (
1401 
    vss => vss,
1402 
    vdd => vdd,
1403 
    b => o4(7),
1404 
    en => cke,
1405 
    a => x16_7);
1406 
  latch263 : latch
1407 
    PORT MAP (
1408 
    vss => vss,
1409 
    vdd => vdd,
1410 
    b => o5(7),
1411 
    en => cke,
1412 
    a => x17_7);
1413 
  latch279 : latch
1414 
    PORT MAP (
1415 
    vss => vss,
1416 
    vdd => vdd,
1417 
    b => o6(7),
1418 
    en => cke,
1419 
    a => x18_7);
1420 
  latch8 : latch
1421 
    PORT MAP (
1422 
    vss => vss,
1423 
    vdd => vdd,
1424 
    b => o1(8),
1425 
    en => cke,
1426 
    a => x1_8);
1427 
  latch24 : latch
1428 
    PORT MAP (
1429 
    vss => vss,
1430 
    vdd => vdd,
1431 
    b => o2(8),
1432 
    en => cke,
1433 
    a => x2_8);
1434 
  latch40 : latch
1435 
    PORT MAP (
1436 
    vss => vss,
1437 
    vdd => vdd,
1438 
    b => o3(8),
1439 
    en => cke,
1440 
    a => x3_8);
1441 
  latch56 : latch
1442 
    PORT MAP (
1443 
    vss => vss,
1444 
    vdd => vdd,
1445 
    b => o4(8),
1446 
    en => cke,
1447 
    a => x4_8);
1448 
  latch72 : latch
1449 
    PORT MAP (
1450 
    vss => vss,
1451 
    vdd => vdd,
1452 
    b => o5(8),
1453 
    en => cke,
1454 
    a => x5_8);
1455 
  latch88 : latch
1456 
    PORT MAP (
1457 
    vss => vss,
1458 
    vdd => vdd,
1459 
    b => o6(8),
1460 
    en => cke,
1461 
    a => x6_8);
1462 
  latch104 : latch
1463 
    PORT MAP (
1464 
    vss => vss,
1465 
    vdd => vdd,
1466 
    b => o1(8),
1467 
    en => cke,
1468 
    a => x7_8);
1469 
  latch120 : latch
1470 
    PORT MAP (
1471 
    vss => vss,
1472 
    vdd => vdd,
1473 
    b => o2(8),
1474 
    en => cke,
1475 
    a => x8_8);
1476 
  latch136 : latch
1477 
    PORT MAP (
1478 
    vss => vss,
1479 
    vdd => vdd,
1480 
    b => o3(8),
1481 
    en => cke,
1482 
    a => x9_8);
1483 
  latch152 : latch
1484 
    PORT MAP (
1485 
    vss => vss,
1486 
    vdd => vdd,
1487 
    b => o4(8),
1488 
    en => cke,
1489 
    a => x10_8);
1490 
  latch168 : latch
1491 
    PORT MAP (
1492 
    vss => vss,
1493 
    vdd => vdd,
1494 
    b => o5(8),
1495 
    en => cke,
1496 
    a => x11_8);
1497 
  latch184 : latch
1498 
    PORT MAP (
1499 
    vss => vss,
1500 
    vdd => vdd,
1501 
    b => o6(8),
1502 
    en => cke,
1503 
    a => x12_8);
1504 
  latch200 : latch
1505 
    PORT MAP (
1506 
    vss => vss,
1507 
    vdd => vdd,
1508 
    b => o1(8),
1509 
    en => cke,
1510 
    a => x13_8);
1511 
  latch216 : latch
1512 
    PORT MAP (
1513 
    vss => vss,
1514 
    vdd => vdd,
1515 
    b => o2(8),
1516 
    en => cke,
1517 
    a => x14_8);
1518 
  latch232 : latch
1519 
    PORT MAP (
1520 
    vss => vss,
1521 
    vdd => vdd,
1522 
    b => o3(8),
1523 
    en => cke,
1524 
    a => x15_8);
1525 
  latch248 : latch
1526 
    PORT MAP (
1527 
    vss => vss,
1528 
    vdd => vdd,
1529 
    b => o4(8),
1530 
    en => cke,
1531 
    a => x16_8);
1532 
  latch264 : latch
1533 
    PORT MAP (
1534 
    vss => vss,
1535 
    vdd => vdd,
1536 
    b => o5(8),
1537 
    en => cke,
1538 
    a => x17_8);
1539 
  latch280 : latch
1540 
    PORT MAP (
1541 
    vss => vss,
1542 
    vdd => vdd,
1543 
    b => o6(8),
1544 
    en => cke,
1545 
    a => x18_8);
1546 
  latch9 : latch
1547 
    PORT MAP (
1548 
    vss => vss,
1549 
    vdd => vdd,
1550 
    b => o1(9),
1551 
    en => cke,
1552 
    a => x1_9);
1553 
  latch25 : latch
1554 
    PORT MAP (
1555 
    vss => vss,
1556 
    vdd => vdd,
1557 
    b => o2(9),
1558 
    en => cke,
1559 
    a => x2_9);
1560 
  latch41 : latch
1561 
    PORT MAP (
1562 
    vss => vss,
1563 
    vdd => vdd,
1564 
    b => o3(9),
1565 
    en => cke,
1566 
    a => x3_9);
1567 
  latch57 : latch
1568 
    PORT MAP (
1569 
    vss => vss,
1570 
    vdd => vdd,
1571 
    b => o4(9),
1572 
    en => cke,
1573 
    a => x4_9);
1574 
  latch73 : latch
1575 
    PORT MAP (
1576 
    vss => vss,
1577 
    vdd => vdd,
1578 
    b => o5(9),
1579 
    en => cke,
1580 
    a => x5_9);
1581 
  latch89 : latch
1582 
    PORT MAP (
1583 
    vss => vss,
1584 
    vdd => vdd,
1585 
    b => o6(9),
1586 
    en => cke,
1587 
    a => x6_9);
1588 
  latch105 : latch
1589 
    PORT MAP (
1590 
    vss => vss,
1591 
    vdd => vdd,
1592 
    b => o1(9),
1593 
    en => cke,
1594 
    a => x7_9);
1595 
  latch121 : latch
1596 
    PORT MAP (
1597 
    vss => vss,
1598 
    vdd => vdd,
1599 
    b => o2(9),
1600 
    en => cke,
1601 
    a => x8_9);
1602 
  latch137 : latch
1603 
    PORT MAP (
1604 
    vss => vss,
1605 
    vdd => vdd,
1606 
    b => o3(9),
1607 
    en => cke,
1608 
    a => x9_9);
1609 
  latch153 : latch
1610 
    PORT MAP (
1611 
    vss => vss,
1612 
    vdd => vdd,
1613 
    b => o4(9),
1614 
    en => cke,
1615 
    a => x10_9);
1616 
  latch169 : latch
1617 
    PORT MAP (
1618 
    vss => vss,
1619 
    vdd => vdd,
1620 
    b => o5(9),
1621 
    en => cke,
1622 
    a => x11_9);
1623 
  latch185 : latch
1624 
    PORT MAP (
1625 
    vss => vss,
1626 
    vdd => vdd,
1627 
    b => o6(9),
1628 
    en => cke,
1629 
    a => x12_9);
1630 
  latch201 : latch
1631 
    PORT MAP (
1632 
    vss => vss,
1633 
    vdd => vdd,
1634 
    b => o1(9),
1635 
    en => cke,
1636 
    a => x13_9);
1637 
  latch217 : latch
1638 
    PORT MAP (
1639 
    vss => vss,
1640 
    vdd => vdd,
1641 
    b => o2(9),
1642 
    en => cke,
1643 
    a => x14_9);
1644 
  latch233 : latch
1645 
    PORT MAP (
1646 
    vss => vss,
1647 
    vdd => vdd,
1648 
    b => o3(9),
1649 
    en => cke,
1650 
    a => x15_9);
1651 
  latch249 : latch
1652 
    PORT MAP (
1653 
    vss => vss,
1654 
    vdd => vdd,
1655 
    b => o4(9),
1656 
    en => cke,
1657 
    a => x16_9);
1658 
  latch265 : latch
1659 
    PORT MAP (
1660 
    vss => vss,
1661 
    vdd => vdd,
1662 
    b => o5(9),
1663 
    en => cke,
1664 
    a => x17_9);
1665 
  latch281 : latch
1666 
    PORT MAP (
1667 
    vss => vss,
1668 
    vdd => vdd,
1669 
    b => o6(9),
1670 
    en => cke,
1671 
    a => x18_9);
1672 
  latch10 : latch
1673 
    PORT MAP (
1674 
    vss => vss,
1675 
    vdd => vdd,
1676 
    b => o1(10),
1677 
    en => cke,
1678 
    a => x1_10);
1679 
  latch26 : latch
1680 
    PORT MAP (
1681 
    vss => vss,
1682 
    vdd => vdd,
1683 
    b => o2(10),
1684 
    en => cke,
1685 
    a => x2_10);
1686 
  latch42 : latch
1687 
    PORT MAP (
1688 
    vss => vss,
1689 
    vdd => vdd,
1690 
    b => o3(10),
1691 
    en => cke,
1692 
    a => x3_10);
1693 
  latch58 : latch
1694 
    PORT MAP (
1695 
    vss => vss,
1696 
    vdd => vdd,
1697 
    b => o4(10),
1698 
    en => cke,
1699 
    a => x4_10);
1700 
  latch74 : latch
1701 
    PORT MAP (
1702 
    vss => vss,
1703 
    vdd => vdd,
1704 
    b => o5(10),
1705 
    en => cke,
1706 
    a => x5_10);
1707 
  latch90 : latch
1708 
    PORT MAP (
1709 
    vss => vss,
1710 
    vdd => vdd,
1711 
    b => o6(10),
1712 
    en => cke,
1713 
    a => x6_10);
1714 
  latch106 : latch
1715 
    PORT MAP (
1716 
    vss => vss,
1717 
    vdd => vdd,
1718 
    b => o1(10),
1719 
    en => cke,
1720 
    a => x7_10);
1721 
  latch122 : latch
1722 
    PORT MAP (
1723 
    vss => vss,
1724 
    vdd => vdd,
1725 
    b => o2(10),
1726 
    en => cke,
1727 
    a => x8_10);
1728 
  latch138 : latch
1729 
    PORT MAP (
1730 
    vss => vss,
1731 
    vdd => vdd,
1732 
    b => o3(10),
1733 
    en => cke,
1734 
    a => x9_10);
1735 
  latch154 : latch
1736 
    PORT MAP (
1737 
    vss => vss,
1738 
    vdd => vdd,
1739 
    b => o4(10),
1740 
    en => cke,
1741 
    a => x10_10);
1742 
  latch170 : latch
1743 
    PORT MAP (
1744 
    vss => vss,
1745 
    vdd => vdd,
1746 
    b => o5(10),
1747 
    en => cke,
1748 
    a => x11_10);
1749 
  latch186 : latch
1750 
    PORT MAP (
1751 
    vss => vss,
1752 
    vdd => vdd,
1753 
    b => o6(10),
1754 
    en => cke,
1755 
    a => x12_10);
1756 
  latch202 : latch
1757 
    PORT MAP (
1758 
    vss => vss,
1759 
    vdd => vdd,
1760 
    b => o1(10),
1761 
    en => cke,
1762 
    a => x13_10);
1763 
  latch218 : latch
1764 
    PORT MAP (
1765 
    vss => vss,
1766 
    vdd => vdd,
1767 
    b => o2(10),
1768 
    en => cke,
1769 
    a => x14_10);
1770 
  latch234 : latch
1771 
    PORT MAP (
1772 
    vss => vss,
1773 
    vdd => vdd,
1774 
    b => o3(10),
1775 
    en => cke,
1776 
    a => x15_10);
1777 
  latch250 : latch
1778 
    PORT MAP (
1779 
    vss => vss,
1780 
    vdd => vdd,
1781 
    b => o4(10),
1782 
    en => cke,
1783 
    a => x16_10);
1784 
  latch266 : latch
1785 
    PORT MAP (
1786 
    vss => vss,
1787 
    vdd => vdd,
1788 
    b => o5(10),
1789 
    en => cke,
1790 
    a => x17_10);
1791 
  latch282 : latch
1792 
    PORT MAP (
1793 
    vss => vss,
1794 
    vdd => vdd,
1795 
    b => o6(10),
1796 
    en => cke,
1797 
    a => x18_10);
1798 
  latch11 : latch
1799 
    PORT MAP (
1800 
    vss => vss,
1801 
    vdd => vdd,
1802 
    b => o1(11),
1803 
    en => cke,
1804 
    a => x1_11);
1805 
  latch27 : latch
1806 
    PORT MAP (
1807 
    vss => vss,
1808 
    vdd => vdd,
1809 
    b => o2(11),
1810 
    en => cke,
1811 
    a => x2_11);
1812 
  latch43 : latch
1813 
    PORT MAP (
1814 
    vss => vss,
1815 
    vdd => vdd,
1816 
    b => o3(11),
1817 
    en => cke,
1818 
    a => x3_11);
1819 
  latch59 : latch
1820 
    PORT MAP (
1821 
    vss => vss,
1822 
    vdd => vdd,
1823 
    b => o4(11),
1824 
    en => cke,
1825 
    a => x4_11);
1826 
  latch75 : latch
1827 
    PORT MAP (
1828 
    vss => vss,
1829 
    vdd => vdd,
1830 
    b => o5(11),
1831 
    en => cke,
1832 
    a => x5_11);
1833 
  latch91 : latch
1834 
    PORT MAP (
1835 
    vss => vss,
1836 
    vdd => vdd,
1837 
    b => o6(11),
1838 
    en => cke,
1839 
    a => x6_11);
1840 
  latch107 : latch
1841 
    PORT MAP (
1842 
    vss => vss,
1843 
    vdd => vdd,
1844 
    b => o1(11),
1845 
    en => cke,
1846 
    a => x7_11);
1847 
  latch123 : latch
1848 
    PORT MAP (
1849 
    vss => vss,
1850 
    vdd => vdd,
1851 
    b => o2(11),
1852 
    en => cke,
1853 
    a => x8_11);
1854 
  latch139 : latch
1855 
    PORT MAP (
1856 
    vss => vss,
1857 
    vdd => vdd,
1858 
    b => o3(11),
1859 
    en => cke,
1860 
    a => x9_11);
1861 
  latch155 : latch
1862 
    PORT MAP (
1863 
    vss => vss,
1864 
    vdd => vdd,
1865 
    b => o4(11),
1866 
    en => cke,
1867 
    a => x10_11);
1868 
  latch171 : latch
1869 
    PORT MAP (
1870 
    vss => vss,
1871 
    vdd => vdd,
1872 
    b => o5(11),
1873 
    en => cke,
1874 
    a => x11_11);
1875 
  latch187 : latch
1876 
    PORT MAP (
1877 
    vss => vss,
1878 
    vdd => vdd,
1879 
    b => o6(11),
1880 
    en => cke,
1881 
    a => x12_11);
1882 
  latch203 : latch
1883 
    PORT MAP (
1884 
    vss => vss,
1885 
    vdd => vdd,
1886 
    b => o1(11),
1887 
    en => cke,
1888 
    a => x13_11);
1889 
  latch219 : latch
1890 
    PORT MAP (
1891 
    vss => vss,
1892 
    vdd => vdd,
1893 
    b => o2(11),
1894 
    en => cke,
1895 
    a => x14_11);
1896 
  latch235 : latch
1897 
    PORT MAP (
1898 
    vss => vss,
1899 
    vdd => vdd,
1900 
    b => o3(11),
1901 
    en => cke,
1902 
    a => x15_11);
1903 
  latch251 : latch
1904 
    PORT MAP (
1905 
    vss => vss,
1906 
    vdd => vdd,
1907 
    b => o4(11),
1908 
    en => cke,
1909 
    a => x16_11);
1910 
  latch267 : latch
1911 
    PORT MAP (
1912 
    vss => vss,
1913 
    vdd => vdd,
1914 
    b => o5(11),
1915 
    en => cke,
1916 
    a => x17_11);
1917 
  latch283 : latch
1918 
    PORT MAP (
1919 
    vss => vss,
1920 
    vdd => vdd,
1921 
    b => o6(11),
1922 
    en => cke,
1923 
    a => x18_11);
1924 
  latch12 : latch
1925 
    PORT MAP (
1926 
    vss => vss,
1927 
    vdd => vdd,
1928 
    b => o1(12),
1929 
    en => cke,
1930 
    a => x1_12);
1931 
  latch28 : latch
1932 
    PORT MAP (
1933 
    vss => vss,
1934 
    vdd => vdd,
1935 
    b => o2(12),
1936 
    en => cke,
1937 
    a => x2_12);
1938 
  latch44 : latch
1939 
    PORT MAP (
1940 
    vss => vss,
1941 
    vdd => vdd,
1942 
    b => o3(12),
1943 
    en => cke,
1944 
    a => x3_12);
1945 
  latch60 : latch
1946 
    PORT MAP (
1947 
    vss => vss,
1948 
    vdd => vdd,
1949 
    b => o4(12),
1950 
    en => cke,
1951 
    a => x4_12);
1952 
  latch76 : latch
1953 
    PORT MAP (
1954 
    vss => vss,
1955 
    vdd => vdd,
1956 
    b => o5(12),
1957 
    en => cke,
1958 
    a => x5_12);
1959 
  latch92 : latch
1960 
    PORT MAP (
1961 
    vss => vss,
1962 
    vdd => vdd,
1963 
    b => o6(12),
1964 
    en => cke,
1965 
    a => x6_12);
1966 
  latch108 : latch
1967 
    PORT MAP (
1968 
    vss => vss,
1969 
    vdd => vdd,
1970 
    b => o1(12),
1971 
    en => cke,
1972 
    a => x7_12);
1973 
  latch124 : latch
1974 
    PORT MAP (
1975 
    vss => vss,
1976 
    vdd => vdd,
1977 
    b => o2(12),
1978 
    en => cke,
1979 
    a => x8_12);
1980 
  latch140 : latch
1981 
    PORT MAP (
1982 
    vss => vss,
1983 
    vdd => vdd,
1984 
    b => o3(12),
1985 
    en => cke,
1986 
    a => x9_12);
1987 
  latch156 : latch
1988 
    PORT MAP (
1989 
    vss => vss,
1990 
    vdd => vdd,
1991 
    b => o4(12),
1992 
    en => cke,
1993 
    a => x10_12);
1994 
  latch172 : latch
1995 
    PORT MAP (
1996 
    vss => vss,
1997 
    vdd => vdd,
1998 
    b => o5(12),
1999 
    en => cke,
2000 
    a => x11_12);
2001 
  latch188 : latch
2002 
    PORT MAP (
2003 
    vss => vss,
2004 
    vdd => vdd,
2005 
    b => o6(12),
2006 
    en => cke,
2007 
    a => x12_12);
2008 
  latch204 : latch
2009 
    PORT MAP (
2010 
    vss => vss,
2011 
    vdd => vdd,
2012 
    b => o1(12),
2013 
    en => cke,
2014 
    a => x13_12);
2015 
  latch220 : latch
2016 
    PORT MAP (
2017 
    vss => vss,
2018 
    vdd => vdd,
2019 
    b => o2(12),
2020 
    en => cke,
2021 
    a => x14_12);
2022 
  latch236 : latch
2023 
    PORT MAP (
2024 
    vss => vss,
2025 
    vdd => vdd,
2026 
    b => o3(12),
2027 
    en => cke,
2028 
    a => x15_12);
2029 
  latch252 : latch
2030 
    PORT MAP (
2031 
    vss => vss,
2032 
    vdd => vdd,
2033 
    b => o4(12),
2034 
    en => cke,
2035 
    a => x16_12);
2036 
  latch268 : latch
2037 
    PORT MAP (
2038 
    vss => vss,
2039 
    vdd => vdd,
2040 
    b => o5(12),
2041 
    en => cke,
2042 
    a => x17_12);
2043 
  latch284 : latch
2044 
    PORT MAP (
2045 
    vss => vss,
2046 
    vdd => vdd,
2047 
    b => o6(12),
2048 
    en => cke,
2049 
    a => x18_12);
2050 
  latch13 : latch
2051 
    PORT MAP (
2052 
    vss => vss,
2053 
    vdd => vdd,
2054 
    b => o1(13),
2055 
    en => cke,
2056 
    a => x1_13);
2057 
  latch29 : latch
2058 
    PORT MAP (
2059 
    vss => vss,
2060 
    vdd => vdd,
2061 
    b => o2(13),
2062 
    en => cke,
2063 
    a => x2_13);
2064 
  latch45 : latch
2065 
    PORT MAP (
2066 
    vss => vss,
2067 
    vdd => vdd,
2068 
    b => o3(13),
2069 
    en => cke,
2070 
    a => x3_13);
2071 
  latch61 : latch
2072 
    PORT MAP (
2073 
    vss => vss,
2074 
    vdd => vdd,
2075 
    b => o4(13),
2076 
    en => cke,
2077 
    a => x4_13);
2078 
  latch77 : latch
2079 
    PORT MAP (
2080 
    vss => vss,
2081 
    vdd => vdd,
2082 
    b => o5(13),
2083 
    en => cke,
2084 
    a => x5_13);
2085 
  latch93 : latch
2086 
    PORT MAP (
2087 
    vss => vss,
2088 
    vdd => vdd,
2089 
    b => o6(13),
2090 
    en => cke,
2091 
    a => x6_13);
2092 
  latch109 : latch
2093 
    PORT MAP (
2094 
    vss => vss,
2095 
    vdd => vdd,
2096 
    b => o1(13),
2097 
    en => cke,
2098 
    a => x7_13);
2099 
  latch125 : latch
2100 
    PORT MAP (
2101 
    vss => vss,
2102 
    vdd => vdd,
2103 
    b => o2(13),
2104 
    en => cke,
2105 
    a => x8_13);
2106 
  latch141 : latch
2107 
    PORT MAP (
2108 
    vss => vss,
2109 
    vdd => vdd,
2110 
    b => o3(13),
2111 
    en => cke,
2112 
    a => x9_13);
2113 
  latch157 : latch
2114 
    PORT MAP (
2115 
    vss => vss,
2116 
    vdd => vdd,
2117 
    b => o4(13),
2118 
    en => cke,
2119 
    a => x10_13);
2120 
  latch173 : latch
2121 
    PORT MAP (
2122 
    vss => vss,
2123 
    vdd => vdd,
2124 
    b => o5(13),
2125 
    en => cke,
2126 
    a => x11_13);
2127 
  latch189 : latch
2128 
    PORT MAP (
2129 
    vss => vss,
2130 
    vdd => vdd,
2131 
    b => o6(13),
2132 
    en => cke,
2133 
    a => x12_13);
2134 
  latch205 : latch
2135 
    PORT MAP (
2136 
    vss => vss,
2137 
    vdd => vdd,
2138 
    b => o1(13),
2139 
    en => cke,
2140 
    a => x13_13);
2141 
  latch221 : latch
2142 
    PORT MAP (
2143 
    vss => vss,
2144 
    vdd => vdd,
2145 
    b => o2(13),
2146 
    en => cke,
2147 
    a => x14_13);
2148 
  latch237 : latch
2149 
    PORT MAP (
2150 
    vss => vss,
2151 
    vdd => vdd,
2152 
    b => o3(13),
2153 
    en => cke,
2154 
    a => x15_13);
2155 
  latch253 : latch
2156 
    PORT MAP (
2157 
    vss => vss,
2158 
    vdd => vdd,
2159 
    b => o4(13),
2160 
    en => cke,
2161 
    a => x16_13);
2162 
  latch269 : latch
2163 
    PORT MAP (
2164 
    vss => vss,
2165 
    vdd => vdd,
2166 
    b => o5(13),
2167 
    en => cke,
2168 
    a => x17_13);
2169 
  latch285 : latch
2170 
    PORT MAP (
2171 
    vss => vss,
2172 
    vdd => vdd,
2173 
    b => o6(13),
2174 
    en => cke,
2175 
    a => x18_13);
2176 
  latch14 : latch
2177 
    PORT MAP (
2178 
    vss => vss,
2179 
    vdd => vdd,
2180 
    b => o1(14),
2181 
    en => cke,
2182 
    a => x1_14);
2183 
  latch30 : latch
2184 
    PORT MAP (
2185 
    vss => vss,
2186 
    vdd => vdd,
2187 
    b => o2(14),
2188 
    en => cke,
2189 
    a => x2_14);
2190 
  latch46 : latch
2191 
    PORT MAP (
2192 
    vss => vss,
2193 
    vdd => vdd,
2194 
    b => o3(14),
2195 
    en => cke,
2196 
    a => x3_14);
2197 
  latch62 : latch
2198 
    PORT MAP (
2199 
    vss => vss,
2200 
    vdd => vdd,
2201 
    b => o4(14),
2202 
    en => cke,
2203 
    a => x4_14);
2204 
  latch78 : latch
2205 
    PORT MAP (
2206 
    vss => vss,
2207 
    vdd => vdd,
2208 
    b => o5(14),
2209 
    en => cke,
2210 
    a => x5_14);
2211 
  latch94 : latch
2212 
    PORT MAP (
2213 
    vss => vss,
2214 
    vdd => vdd,
2215 
    b => o6(14),
2216 
    en => cke,
2217 
    a => x6_14);
2218 
  latch110 : latch
2219 
    PORT MAP (
2220 
    vss => vss,
2221 
    vdd => vdd,
2222 
    b => o1(14),
2223 
    en => cke,
2224 
    a => x7_14);
2225 
  latch126 : latch
2226 
    PORT MAP (
2227 
    vss => vss,
2228 
    vdd => vdd,
2229 
    b => o2(14),
2230 
    en => cke,
2231 
    a => x8_14);
2232 
  latch142 : latch
2233 
    PORT MAP (
2234 
    vss => vss,
2235 
    vdd => vdd,
2236 
    b => o3(14),
2237 
    en => cke,
2238 
    a => x9_14);
2239 
  latch158 : latch
2240 
    PORT MAP (
2241 
    vss => vss,
2242 
    vdd => vdd,
2243 
    b => o4(14),
2244 
    en => cke,
2245 
    a => x10_14);
2246 
  latch174 : latch
2247 
    PORT MAP (
2248 
    vss => vss,
2249 
    vdd => vdd,
2250 
    b => o5(14),
2251 
    en => cke,
2252 
    a => x11_14);
2253 
  latch190 : latch
2254 
    PORT MAP (
2255 
    vss => vss,
2256 
    vdd => vdd,
2257 
    b => o6(14),
2258 
    en => cke,
2259 
    a => x12_14);
2260 
  latch206 : latch
2261 
    PORT MAP (
2262 
    vss => vss,
2263 
    vdd => vdd,
2264 
    b => o1(14),
2265 
    en => cke,
2266 
    a => x13_14);
2267 
  latch222 : latch
2268 
    PORT MAP (
2269 
    vss => vss,
2270 
    vdd => vdd,
2271 
    b => o2(14),
2272 
    en => cke,
2273 
    a => x14_14);
2274 
  latch238 : latch
2275 
    PORT MAP (
2276 
    vss => vss,
2277 
    vdd => vdd,
2278 
    b => o3(14),
2279 
    en => cke,
2280 
    a => x15_14);
2281 
  latch254 : latch
2282 
    PORT MAP (
2283 
    vss => vss,
2284 
    vdd => vdd,
2285 
    b => o4(14),
2286 
    en => cke,
2287 
    a => x16_14);
2288 
  latch270 : latch
2289 
    PORT MAP (
2290 
    vss => vss,
2291 
    vdd => vdd,
2292 
    b => o5(14),
2293 
    en => cke,
2294 
    a => x17_14);
2295 
  latch286 : latch
2296 
    PORT MAP (
2297 
    vss => vss,
2298 
    vdd => vdd,
2299 
    b => o6(14),
2300 
    en => cke,
2301 
    a => x18_14);
2302 
  latch15 : latch
2303 
    PORT MAP (
2304 
    vss => vss,
2305 
    vdd => vdd,
2306 
    b => o1(15),
2307 
    en => cke,
2308 
    a => x1_15);
2309 
  latch31 : latch
2310 
    PORT MAP (
2311 
    vss => vss,
2312 
    vdd => vdd,
2313 
    b => o2(15),
2314 
    en => cke,
2315 
    a => x2_15);
2316 
  latch47 : latch
2317 
    PORT MAP (
2318 
    vss => vss,
2319 
    vdd => vdd,
2320 
    b => o3(15),
2321 
    en => cke,
2322 
    a => x3_15);
2323 
  latch63 : latch
2324 
    PORT MAP (
2325 
    vss => vss,
2326 
    vdd => vdd,
2327 
    b => o4(15),
2328 
    en => cke,
2329 
    a => x4_15);
2330 
  latch79 : latch
2331 
    PORT MAP (
2332 
    vss => vss,
2333 
    vdd => vdd,
2334 
    b => o5(15),
2335 
    en => cke,
2336 
    a => x5_15);
2337 
  latch95 : latch
2338 
    PORT MAP (
2339 
    vss => vss,
2340 
    vdd => vdd,
2341 
    b => o6(15),
2342 
    en => cke,
2343 
    a => x6_15);
2344 
  latch111 : latch
2345 
    PORT MAP (
2346 
    vss => vss,
2347 
    vdd => vdd,
2348 
    b => o1(15),
2349 
    en => cke,
2350 
    a => x7_15);
2351 
  latch127 : latch
2352 
    PORT MAP (
2353 
    vss => vss,
2354 
    vdd => vdd,
2355 
    b => o2(15),
2356 
    en => cke,
2357 
    a => x8_15);
2358 
  latch143 : latch
2359 
    PORT MAP (
2360 
    vss => vss,
2361 
    vdd => vdd,
2362 
    b => o3(15),
2363 
    en => cke,
2364 
    a => x9_15);
2365 
  latch159 : latch
2366 
    PORT MAP (
2367 
    vss => vss,
2368 
    vdd => vdd,
2369 
    b => o4(15),
2370 
    en => cke,
2371 
    a => x10_15);
2372 
  latch175 : latch
2373 
    PORT MAP (
2374 
    vss => vss,
2375 
    vdd => vdd,
2376 
    b => o5(15),
2377 
    en => cke,
2378 
    a => x11_15);
2379 
  latch191 : latch
2380 
    PORT MAP (
2381 
    vss => vss,
2382 
    vdd => vdd,
2383 
    b => o6(15),
2384 
    en => cke,
2385 
    a => x12_15);
2386 
  latch207 : latch
2387 
    PORT MAP (
2388 
    vss => vss,
2389 
    vdd => vdd,
2390 
    b => o1(15),
2391 
    en => cke,
2392 
    a => x13_15);
2393 
  latch223 : latch
2394 
    PORT MAP (
2395 
    vss => vss,
2396 
    vdd => vdd,
2397 
    b => o2(15),
2398 
    en => cke,
2399 
    a => x14_15);
2400 
  latch239 : latch
2401 
    PORT MAP (
2402 
    vss => vss,
2403 
    vdd => vdd,
2404 
    b => o3(15),
2405 
    en => cke,
2406 
    a => x15_15);
2407 
  latch255 : latch
2408 
    PORT MAP (
2409 
    vss => vss,
2410 
    vdd => vdd,
2411 
    b => o4(15),
2412 
    en => cke,
2413 
    a => x16_15);
2414 
  latch271 : latch
2415 
    PORT MAP (
2416 
    vss => vss,
2417 
    vdd => vdd,
2418 
    b => o5(15),
2419 
    en => cke,
2420 
    a => x17_15);
2421 
  latch287 : latch
2422 
    PORT MAP (
2423 
    vss => vss,
2424 
    vdd => vdd,
2425 
    b => o6(15),
2426 
    en => cke,
2427 
    a => x18_15);
2428 
 
2429 
end VST;

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