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[/] [sudoku/] [trunk/] [rtl/] [minPiece.v] - Blame information for rev 7

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Line No. Rev Author Line
1 2 dsheffie
module minPiece(/*AUTOARG*/
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   // Outputs
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   minPoss, minIdx,
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   // Inputs
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   clk, rst, inGrid
6
   );
7
 
8
   input clk;
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   input rst;
10
 
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   input [728:0] inGrid;
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   output [3:0]  minPoss;
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   output [6:0]  minIdx;
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   reg [3:0]      r_minPoss;
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   reg [6:0]      r_minIdx;
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   assign minPoss = r_minPoss;
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   assign minIdx = r_minIdx;
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   wire [8:0]     grid2d [80:0];
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   wire [6:0]     gridIndices [80:0];
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   wire [3:0]     gridPoss [80:0];
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   genvar        i;
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   /* unflatten */
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   generate
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      for(i=0;i<81;i=i+1)
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        begin: unflatten
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           assign grid2d[i] = inGrid[(9*(i+1))-1:9*i];
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           assign gridIndices[i] = i;
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           countPoss cP (.clk(clk), .rst(rst), .in(grid2d[i]), .out(gridPoss[i]));
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        end
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   endgenerate
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   wire [6:0]     stage1_gridIndices [39:0];
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   wire [3:0]     stage1_gridPoss [39:0];
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   generate
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      for(i=0;i<40;i=i+1)
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        begin: stage1
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           cmpPiece cP_stage1
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            (
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             .outPoss(stage1_gridPoss[i]),
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             .outIdx(stage1_gridIndices[i]),
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             .inPoss_0(gridPoss[2*i]),
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             .inIdx_0(gridIndices[2*i]),
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             .inPoss_1(gridPoss[2*i+1]),
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             .inIdx_1(gridIndices[2*i+1])
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             );
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        end
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   endgenerate
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   wire [6:0]     stage2_gridIndices [19:0];
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   wire [3:0]     stage2_gridPoss [19:0];
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   generate
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      for(i=0;i<20;i=i+1)
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        begin: stage2
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           cmpPiece cP_stage2
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            (
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             .outPoss(stage2_gridPoss[i]),
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             .outIdx(stage2_gridIndices[i]),
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             .inPoss_0(stage1_gridPoss[2*i]),
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             .inIdx_0(stage1_gridIndices[2*i]),
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             .inPoss_1(stage1_gridPoss[2*i+1]),
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             .inIdx_1(stage1_gridIndices[2*i+1])
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             );
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        end
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   endgenerate
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   wire [6:0]     stage3_gridIndices [9:0];
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   wire [3:0]     stage3_gridPoss [9:0];
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   generate
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      for(i=0;i<10;i=i+1)
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        begin: stage3
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           cmpPiece cP_stage3
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            (
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             .outPoss(stage3_gridPoss[i]),
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             .outIdx(stage3_gridIndices[i]),
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             .inPoss_0(stage2_gridPoss[2*i]),
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             .inIdx_0(stage2_gridIndices[2*i]),
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             .inPoss_1(stage2_gridPoss[2*i+1]),
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             .inIdx_1(stage2_gridIndices[2*i+1])
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             );
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        end
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   endgenerate
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   wire [6:0]     stage4_gridIndices [4:0];
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   wire [3:0]     stage4_gridPoss [4:0];
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   generate
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      for(i=0;i<5;i=i+1)
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        begin: stage4
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           cmpPiece cP_stage4
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            (
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             .outPoss(stage4_gridPoss[i]),
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             .outIdx(stage4_gridIndices[i]),
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             .inPoss_0(stage3_gridPoss[2*i]),
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             .inIdx_0(stage3_gridIndices[2*i]),
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             .inPoss_1(stage3_gridPoss[2*i+1]),
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             .inIdx_1(stage3_gridIndices[2*i+1])
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             );
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        end
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   endgenerate
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   wire [6:0]     stage5_gridIndices [1:0];
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   wire [3:0]     stage5_gridPoss [1:0];
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   generate
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      for(i=0;i<2;i=i+1)
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        begin: stage5
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           cmpPiece cP_stage5
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            (
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             .outPoss(stage5_gridPoss[i]),
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             .outIdx(stage5_gridIndices[i]),
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             .inPoss_0(stage4_gridPoss[2*i]),
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             .inIdx_0(stage4_gridIndices[2*i]),
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             .inPoss_1(stage4_gridPoss[2*i+1]),
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             .inIdx_1(stage4_gridIndices[2*i+1])
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             );
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        end
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   endgenerate
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   wire [6:0] stage6_gridIndices_A;
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   wire [3:0] stage6_gridPoss_A;
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   cmpPiece cP_stage6_A
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     (
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      .outPoss(stage6_gridPoss_A),
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      .outIdx(stage6_gridIndices_A),
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      .inPoss_0(stage5_gridPoss[0]),
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      .inIdx_0(stage5_gridIndices[0]),
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      .inPoss_1(stage5_gridPoss[1]),
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      .inIdx_1(stage5_gridIndices[1])
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      );
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145
   wire [6:0] stage6_gridIndices_B;
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   wire [3:0] stage6_gridPoss_B;
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   cmpPiece cP_stage6_B
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     (
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      .outPoss(stage6_gridPoss_B),
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      .outIdx(stage6_gridIndices_B),
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      .inPoss_0(stage4_gridPoss[4]),
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      .inIdx_0(stage4_gridIndices[4]),
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      .inPoss_1(gridPoss[80]),
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      .inIdx_1(gridIndices[80])
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      );
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   wire [6:0] stage7_gridIndices;
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   wire [3:0] stage7_gridPoss;
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   cmpPiece cP_stage7
162
     (
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      .outPoss(stage7_gridPoss),
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      .outIdx(stage7_gridIndices),
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      .inPoss_0(stage6_gridPoss_A),
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      .inIdx_0(stage6_gridIndices_A),
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      .inPoss_1(stage6_gridPoss_B),
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      .inIdx_1(stage6_gridIndices_B)
169
      );
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   always@(posedge clk)
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     begin
173
        if(rst)
174
          begin
175
             r_minIdx <= 7'd0;
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             r_minPoss <= 4'hf;
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          end
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        else
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          begin
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             r_minIdx <= stage7_gridIndices;
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             r_minPoss <= stage7_gridPoss;
182
          end
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     end // always@ (posedge clk)
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185
endmodule
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187
module cmpPiece(/*AUTOARG*/
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   // Outputs
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   outPoss, outIdx,
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   // Inputs
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   inPoss_0, inIdx_0, inPoss_1, inIdx_1
192
   );
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   input [3:0] inPoss_0;
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   input [6:0] inIdx_0;
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196
   input [3:0] inPoss_1;
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   input [6:0] inIdx_1;
198
 
199
   output [3:0] outPoss;
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   output [6:0] outIdx;
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202
   wire         w_cmp = (inPoss_0 < inPoss_1);
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204
   assign outPoss = w_cmp ? inPoss_0 : inPoss_1;
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   assign outIdx = w_cmp ? inIdx_0 : inIdx_1;
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207
endmodule // cmpPiece
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209
module countPoss(clk,rst,in,out);
210
   input [8:0] in;
211
   input       clk;
212
   input       rst;
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214
   output [3:0] out;
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   reg [3:0]     r_out;
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   assign out = r_out;
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218
   wire [3:0]    w_cnt;
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220
   one_count9 c0(in, w_cnt);
221
   wire [3:0] w_out = (w_cnt == 4'd1) ? 4'd15 : w_cnt;
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223
   always@(posedge clk)
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     begin
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        r_out <= rst ? 4'd15 : w_out;
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     end
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endmodule

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