URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] [t400/] [tags/] [rel_1_1/] [sw/] [verif/] [include/] [Makefile.core] - Blame information for rev 2

Go to most recent revision | Details | Compare with Previous | View Log


 
SIM_DIR   = $(PROJECT_DIR)/sim/rtl_sim
VERIF_DIR = $(PROJECT_DIR)/sw/verif
 
# determine allowed targets
TARGETS = $(wildcard t4*)
 
.PHONY: all
all: $(TARGETS)
 
.PHONY: t41x
t41x: $(SIM_DIR)/rom_41x.hex
 
.PHONY: t42x
t42x:
 
$(SIM_DIR)/rom_41x.hex: $(MODULE)_41x.p
        p2hex $< $@
 
$(SIM_DIR)/rom_42x.hex: $(MODULE)_42x.p
        p2hex $< $@
 
$(MODULE)_41x.p: $(MODULE).asm
        asl -i $(VERIF_DIR)/include -cpu COP410 -L \
            -o $(MODULE)_41x.p -olist $(MODULE)_41x.lst $<
 
$(MODULE)_42x.p: $(MODULE).asm
        asl -i $(VERIF_DIR)/include -cpu COP420 -L \
            -o $(MODULE)_42x.p -olist $(MODULE)_42x.lst $<
 
.PHONY: clean
clean:
        rm -f *.p *~ *.lst

Line No.	Rev	Author	Line
1	2	arniml
2			`SIM_DIR = $(PROJECT_DIR)/sim/rtl_sim`
3			`VERIF_DIR = $(PROJECT_DIR)/sw/verif`
4
5			`# determine allowed targets`
6			`TARGETS = $(wildcard t4*)`
7
8			`.PHONY: all`
9			`all: $(TARGETS)`
10
11			`.PHONY: t41x`
12			`t41x: $(SIM_DIR)/rom_41x.hex`
13
14			`.PHONY: t42x`
15			`t42x:`
16
17			`$(SIM_DIR)/rom_41x.hex: $(MODULE)_41x.p`
18			`p2hex $< $@`
19
20			`$(SIM_DIR)/rom_42x.hex: $(MODULE)_42x.p`
21			`p2hex $< $@`
22
23			`$(MODULE)_41x.p: $(MODULE).asm`
24			`asl -i $(VERIF_DIR)/include -cpu COP410 -L \`
25			`-o $(MODULE)_41x.p -olist $(MODULE)_41x.lst $<`
26
27			`$(MODULE)_42x.p: $(MODULE).asm`
28			`asl -i $(VERIF_DIR)/include -cpu COP420 -L \`
29			`-o $(MODULE)_42x.p -olist $(MODULE)_42x.lst $<`
30
31			`.PHONY: clean`
32			`clean:`
33			`rm -f .p ~ *.lst`

Browse

Tools

Subversion Repositories t400

[/] [t400/] [tags/] [rel_1_1/] [sw/] [verif/] [include/] [Makefile.core] - Blame information for rev 2