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[/] [t400/] [trunk/] [rtl/] [vhdl/] [system/] [t410_notri.vhd] - Blame information for rev 178

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1 2 arniml
-------------------------------------------------------------------------------
2
--
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-- T410/411 controller toplevel without tri-states.
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--
5 173 arniml
-- $Id: t410_notri.vhd,v 1.4 2008-08-23 11:19:20 arniml Exp $
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-- $Name: not supported by cvs2svn $
7 2 arniml
--
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-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
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--
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-- All rights reserved
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--
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-- Redistribution and use in source and synthezised forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--
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-- Redistributions of source code must retain the above copyright notice,
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-- this list of conditions and the following disclaimer.
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--
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-- Redistributions in synthesized form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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--
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-- Neither the name of the author nor the names of other contributors may
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-- be used to endorse or promote products derived from this software without
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-- specific prior written permission.
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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-- Please report bugs to the author, but before you do so, please
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-- make sure that this is not a derivative work and that
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-- you have the latest version of this file.
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--
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-- The latest version of this file can be found at:
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--      http://www.opencores.org/cvsweb.shtml/t400/
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--
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-------------------------------------------------------------------------------
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47
library ieee;
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use ieee.std_logic_1164.all;
49
 
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use work.t400_opt_pack.all;
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52
entity t410_notri is
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  generic (
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    opt_ck_div_g         : integer := t400_opt_ck_div_16_c;
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    opt_cko_g            : integer := t400_opt_cko_crystal_c;
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    opt_l_out_type_7_g   : integer := t400_opt_out_type_std_c;
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    opt_l_out_type_6_g   : integer := t400_opt_out_type_std_c;
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    opt_l_out_type_5_g   : integer := t400_opt_out_type_std_c;
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    opt_l_out_type_4_g   : integer := t400_opt_out_type_std_c;
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    opt_l_out_type_3_g   : integer := t400_opt_out_type_std_c;
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    opt_l_out_type_2_g   : integer := t400_opt_out_type_std_c;
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    opt_l_out_type_1_g   : integer := t400_opt_out_type_std_c;
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    opt_l_out_type_0_g   : integer := t400_opt_out_type_std_c;
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    opt_d_out_type_3_g   : integer := t400_opt_out_type_std_c;
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    opt_d_out_type_2_g   : integer := t400_opt_out_type_std_c;
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    opt_d_out_type_1_g   : integer := t400_opt_out_type_std_c;
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    opt_d_out_type_0_g   : integer := t400_opt_out_type_std_c;
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    opt_g_out_type_3_g   : integer := t400_opt_out_type_std_c;
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    opt_g_out_type_2_g   : integer := t400_opt_out_type_std_c;
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    opt_g_out_type_1_g   : integer := t400_opt_out_type_std_c;
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    opt_g_out_type_0_g   : integer := t400_opt_out_type_std_c;
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    opt_so_output_type_g : integer := t400_opt_out_type_std_c;
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    opt_sk_output_type_g : integer := t400_opt_out_type_std_c
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  );
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  port (
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    ck_i      : in  std_logic;
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    ck_en_i   : in  std_logic;
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    reset_n_i : in  std_logic;
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    cko_i     : in  std_logic;
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    io_l_i    : in  std_logic_vector(7 downto 0);
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    io_l_o    : out std_logic_vector(7 downto 0);
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    io_l_en_o : out std_logic_vector(7 downto 0);
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    io_d_o    : out std_logic_vector(3 downto 0);
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    io_d_en_o : out std_logic_vector(3 downto 0);
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    io_g_i    : in  std_logic_vector(3 downto 0);
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    io_g_o    : out std_logic_vector(3 downto 0);
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    io_g_en_o : out std_logic_vector(3 downto 0);
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    si_i      : in  std_logic;
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    so_o      : out std_logic;
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    so_en_o   : out std_logic;
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    sk_o      : out std_logic;
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    sk_en_o   : out std_logic
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  );
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end t410_notri;
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98
 
99
use work.t400_core_comp_pack.t400_core;
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use work.t400_tech_comp_pack.t400_por;
101 108 arniml
use work.t400_tech_comp_pack.generic_ram_ena;
102 2 arniml
 
103
architecture struct of t410_notri is
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  component t410_rom
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    port (
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      ck_i   : in  std_logic;
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      addr_i : in  std_logic_vector(8 downto 0);
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      data_o : out std_logic_vector(7 downto 0)
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    );
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  end component;
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  signal por_n_s             : std_logic;
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  signal pm_addr_s           : std_logic_vector(9 downto 0);
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  signal pm_data_s           : std_logic_vector(7 downto 0);
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  signal dm_addr_s           : std_logic_vector(5 downto 0);
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  signal dm_we_s             : std_logic;
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  signal dm_data_to_core_s,
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         dm_data_from_core_s : std_logic_vector(3 downto 0);
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  signal gnd4_s              : std_logic_vector(3 downto 0);
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125
begin
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  gnd4_s <= (others => '0');
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  -----------------------------------------------------------------------------
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  -- T400 core
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  -----------------------------------------------------------------------------
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  core_b : t400_core
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    generic map (
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      opt_type_g           => t400_opt_type_410_c,
135 13 arniml
      opt_ck_div_g         => opt_ck_div_g,
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      opt_cko_g            => opt_cko_g,
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      opt_l_out_type_7_g   => opt_l_out_type_7_g,
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      opt_l_out_type_6_g   => opt_l_out_type_6_g,
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      opt_l_out_type_5_g   => opt_l_out_type_5_g,
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      opt_l_out_type_4_g   => opt_l_out_type_4_g,
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      opt_l_out_type_3_g   => opt_l_out_type_3_g,
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      opt_l_out_type_2_g   => opt_l_out_type_2_g,
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      opt_l_out_type_1_g   => opt_l_out_type_1_g,
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      opt_l_out_type_0_g   => opt_l_out_type_0_g,
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      opt_microbus_g       => t400_opt_no_microbus_c,
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      opt_d_out_type_3_g   => opt_d_out_type_3_g,
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      opt_d_out_type_2_g   => opt_d_out_type_2_g,
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      opt_d_out_type_1_g   => opt_d_out_type_1_g,
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      opt_d_out_type_0_g   => opt_d_out_type_0_g,
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      opt_g_out_type_3_g   => opt_g_out_type_3_g,
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      opt_g_out_type_2_g   => opt_g_out_type_2_g,
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      opt_g_out_type_1_g   => opt_g_out_type_1_g,
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      opt_g_out_type_0_g   => opt_g_out_type_0_g,
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      opt_so_output_type_g => opt_so_output_type_g,
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      opt_sk_output_type_g => opt_sk_output_type_g
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    )
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    port map (
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      ck_i      => ck_i,
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      ck_en_i   => ck_en_i,
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      por_n_i   => por_n_s,
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      reset_n_i => reset_n_i,
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      cko_i     => cko_i,
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      pm_addr_o => pm_addr_s,
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      pm_data_i => pm_data_s,
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      dm_addr_o => dm_addr_s,
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      dm_we_o   => dm_we_s,
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      dm_data_o => dm_data_from_core_s,
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      dm_data_i => dm_data_to_core_s,
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      io_l_i    => io_l_i,
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      io_l_o    => io_l_o,
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      io_l_en_o => io_l_en_o,
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      io_d_o    => io_d_o,
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      io_d_en_o => io_d_en_o,
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      io_g_i    => io_g_i,
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      io_g_o    => io_g_o,
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      io_g_en_o => io_g_en_o,
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      io_in_i   => gnd4_s,
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      si_i      => si_i,
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      so_o      => so_o,
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      so_en_o   => so_en_o,
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      sk_o      => sk_o,
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      sk_en_o   => sk_en_o
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    );
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  -----------------------------------------------------------------------------
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  -- Program memory
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  -----------------------------------------------------------------------------
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  pmem_b : t410_rom
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    port map (
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      ck_i   => ck_i,
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      addr_i => pm_addr_s(8 downto 0),
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      data_o => pm_data_s
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    );
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  -----------------------------------------------------------------------------
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  -- Data memory
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  -----------------------------------------------------------------------------
200 108 arniml
  dmem_b : generic_ram_ena
201 2 arniml
    generic map (
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      addr_width_g => 5,
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      data_width_g => 4
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    )
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    port map (
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      clk_i => ck_i,
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      a_i   => dm_addr_s(4 downto 0),
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      we_i  => dm_we_s,
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      ena_i => ck_en_i,
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      d_i   => dm_data_from_core_s,
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      d_o   => dm_data_to_core_s
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    );
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  -----------------------------------------------------------------------------
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  -- Power-on reset circuit
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  -----------------------------------------------------------------------------
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  por_b : t400_por
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    generic map (
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      delay_g     => 4,
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      cnt_width_g => 2
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    )
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    port map (
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      clk_i   => ck_i,
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      por_n_o => por_n_s
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    );
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228
end struct;
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-------------------------------------------------------------------------------
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-- File History:
233
--
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-- $Log: not supported by cvs2svn $
235 173 arniml
-- Revision 1.3  2006/06/05 20:03:11  arniml
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-- include generic_ram_ena
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--
238 108 arniml
-- Revision 1.2  2006/05/08 02:36:38  arniml
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-- hand-down clock divider option
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--
241 13 arniml
-- Revision 1.1.1.1  2006/05/06 01:56:45  arniml
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-- import from local CVS repository, LOC_CVS_0_1
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--
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-------------------------------------------------------------------------------

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