OpenCores
URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] [t400/] [trunk/] [rtl/] [vhdl/] [system/] [t420.vhd] - Blame information for rev 55

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 15 arniml
-------------------------------------------------------------------------------
2
--
3
-- T420 system toplevel.
4
--
5 55 arniml
-- $Id: t420.vhd,v 1.4 2006-05-23 01:16:05 arniml Exp $
6 15 arniml
--
7
-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
8
--
9
-- All rights reserved
10
--
11
-- Redistribution and use in source and synthezised forms, with or without
12
-- modification, are permitted provided that the following conditions are met:
13
--
14
-- Redistributions of source code must retain the above copyright notice,
15
-- this list of conditions and the following disclaimer.
16
--
17
-- Redistributions in synthesized form must reproduce the above copyright
18
-- notice, this list of conditions and the following disclaimer in the
19
-- documentation and/or other materials provided with the distribution.
20
--
21
-- Neither the name of the author nor the names of other contributors may
22
-- be used to endorse or promote products derived from this software without
23
-- specific prior written permission.
24
--
25
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26
-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27
-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28
-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
29
-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30
-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31
-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32
-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33
-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34
-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35
-- POSSIBILITY OF SUCH DAMAGE.
36
--
37
-- Please report bugs to the author, but before you do so, please
38
-- make sure that this is not a derivative work and that
39
-- you have the latest version of this file.
40
--
41
-- The latest version of this file can be found at:
42
--      http://www.opencores.org/cvsweb.shtml/t400/
43
--
44
-------------------------------------------------------------------------------
45
 
46
library ieee;
47
use ieee.std_logic_1164.all;
48
 
49
use work.t400_opt_pack.all;
50
 
51
entity t420 is
52
 
53
  generic (
54 39 arniml
    opt_ck_div_g         : integer := t400_opt_ck_div_8_c;
55 55 arniml
    opt_cko_g            : integer := t400_opt_cko_crystal_c;
56 15 arniml
    opt_l_out_type_7_g   : integer := t400_opt_out_type_std_c;
57
    opt_l_out_type_6_g   : integer := t400_opt_out_type_std_c;
58
    opt_l_out_type_5_g   : integer := t400_opt_out_type_std_c;
59
    opt_l_out_type_4_g   : integer := t400_opt_out_type_std_c;
60
    opt_l_out_type_3_g   : integer := t400_opt_out_type_std_c;
61
    opt_l_out_type_2_g   : integer := t400_opt_out_type_std_c;
62
    opt_l_out_type_1_g   : integer := t400_opt_out_type_std_c;
63
    opt_l_out_type_0_g   : integer := t400_opt_out_type_std_c;
64
    opt_d_out_type_1_g   : integer := t400_opt_out_type_std_c;
65
    opt_d_out_type_0_g   : integer := t400_opt_out_type_std_c;
66
    opt_g_out_type_2_g   : integer := t400_opt_out_type_std_c;
67
    opt_g_out_type_1_g   : integer := t400_opt_out_type_std_c;
68
    opt_g_out_type_0_g   : integer := t400_opt_out_type_std_c;
69
    opt_so_output_type_g : integer := t400_opt_out_type_std_c;
70
    opt_sk_output_type_g : integer := t400_opt_out_type_std_c
71
  );
72
  port (
73
    ck_i      : in    std_logic;
74
    ck_en_i   : in    std_logic;
75
    reset_n_i : in    std_logic;
76 55 arniml
    cko_i     : in    std_logic;
77 15 arniml
    io_l_b    : inout std_logic_vector(7 downto 0);
78
    io_d_o    : out   std_logic_vector(3 downto 0);
79
    io_g_b    : inout std_logic_vector(3 downto 0);
80
    io_in_i   : in    std_logic_vector(3 downto 0);
81
    si_i      : in    std_logic;
82
    so_o      : out   std_logic;
83
    sk_o      : out   std_logic
84
  );
85
 
86
end t420;
87
 
88
 
89
use work.t400_system_comp_pack.t420_notri;
90
 
91
architecture struct of t420 is
92
 
93
  signal io_l_from_t420_s,
94
         io_l_en_s         : std_logic_vector(7 downto 0);
95
  signal io_d_from_t420_s,
96
         io_d_en_s         : std_logic_vector(3 downto 0);
97 27 arniml
  signal io_g_from_t420_s,
98 15 arniml
         io_g_en_s         : std_logic_vector(3 downto 0);
99
 
100
  signal so_s,
101
         so_en_s           : std_logic;
102
  signal sk_s,
103
         sk_en_s           : std_logic;
104
 
105
begin
106
 
107
  -----------------------------------------------------------------------------
108
  -- T420 without tri-states
109
  -----------------------------------------------------------------------------
110
  t420_notri_b : t420_notri
111
    generic map (
112
      opt_ck_div_g         => opt_ck_div_g,
113 55 arniml
      opt_cko_g            => opt_cko_g,
114 15 arniml
      opt_l_out_type_7_g   => opt_l_out_type_7_g,
115
      opt_l_out_type_6_g   => opt_l_out_type_6_g,
116
      opt_l_out_type_5_g   => opt_l_out_type_5_g,
117
      opt_l_out_type_4_g   => opt_l_out_type_4_g,
118
      opt_l_out_type_3_g   => opt_l_out_type_3_g,
119
      opt_l_out_type_2_g   => opt_l_out_type_2_g,
120
      opt_l_out_type_1_g   => opt_l_out_type_1_g,
121
      opt_l_out_type_0_g   => opt_l_out_type_0_g,
122
      opt_d_out_type_3_g   => t400_opt_out_type_std_c,
123
      opt_d_out_type_2_g   => t400_opt_out_type_std_c,
124
      opt_d_out_type_1_g   => opt_d_out_type_1_g,
125
      opt_d_out_type_0_g   => opt_d_out_type_0_g,
126
      opt_g_out_type_3_g   => t400_opt_out_type_std_c,
127
      opt_g_out_type_2_g   => opt_g_out_type_2_g,
128
      opt_g_out_type_1_g   => opt_g_out_type_1_g,
129
      opt_g_out_type_0_g   => opt_g_out_type_0_g,
130
      opt_so_output_type_g => opt_so_output_type_g,
131
      opt_sk_output_type_g => opt_sk_output_type_g
132
    )
133
    port map (
134
      ck_i      => ck_i,
135
      ck_en_i   => ck_en_i,
136
      reset_n_i => reset_n_i,
137 55 arniml
      cko_i     => cko_i,
138 15 arniml
      io_l_i    => io_l_b,
139
      io_l_o    => io_l_from_t420_s,
140
      io_l_en_o => io_l_en_s,
141
      io_d_o    => io_d_from_t420_s,
142
      io_d_en_o => io_d_en_s,
143 27 arniml
      io_g_i    => io_g_b,
144 15 arniml
      io_g_o    => io_g_from_t420_s,
145
      io_g_en_o => io_g_en_s,
146
      io_in_i   => io_in_i,
147
      si_i      => si_i,
148
      so_o      => so_s,
149
      so_en_o   => so_en_s,
150
      sk_o      => sk_s,
151
      sk_en_o   => sk_en_s
152
    );
153
 
154
 
155
  -----------------------------------------------------------------------------
156
  -- Tri-states for output drivers
157
  -----------------------------------------------------------------------------
158
  io_l_tri: for idx in 7 downto 0 generate
159
    io_l_b(idx)  <=   io_l_from_t420_s(idx)
160
                    when io_l_en_s(idx) = '1' else
161
                      'Z';
162
  end generate;
163
  --
164
  io_d_tri: for idx in 3 downto 0 generate
165
    io_d_o(idx)  <=   io_d_from_t420_s(idx)
166
                    when io_d_en_s(idx) = '1' else
167
                      'Z';
168
  end generate;
169
  --
170
  io_g_tri: for idx in 3 downto 0 generate
171
    io_g_b(idx)  <=   io_g_from_t420_s(idx)
172
                    when io_g_en_s(idx) = '1' else
173
                      'Z';
174
  end generate;
175
  --
176
  so_o           <=   so_s
177
                    when so_en_s = '1' else
178
                      'Z';
179
  --
180
  sk_o           <=   sk_s
181
                    when sk_en_s = '1' else
182
                      'Z';
183
 
184
end struct;
185
 
186
 
187
-------------------------------------------------------------------------------
188
-- File History:
189
--
190
-- $Log: not supported by cvs2svn $
191 55 arniml
-- Revision 1.3  2006/05/20 02:49:04  arniml
192
-- select CK divide by 8
193
--
194 39 arniml
-- Revision 1.2  2006/05/17 00:38:31  arniml
195
-- connect missing input direction for IO G
196
--
197 27 arniml
-- Revision 1.1  2006/05/14 22:29:01  arniml
198
-- initial check-in
199
--
200 15 arniml
-------------------------------------------------------------------------------

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.