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[/] [t400/] [trunk/] [syn/] [t421/] [ep1c12/] [t421.qsf] - Blame information for rev 176

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Line No. Rev Author Line
1 156 arniml
set_global_assignment -name TOP_LEVEL_ENTITY t421
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# Copyright (C) 1991-2005 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors.  Please refer to the
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# applicable agreement for further details.
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# The default values for assignments are stored in the file
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#               t421_assignment_defaults.qdf
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# If this file doesn't exist, and for assignments not listed, see file
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#               assignment_defaults.qdf
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# Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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# Project-Wide Assignments
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# ========================
29 158 arniml
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.0 SP1"
30 156 arniml
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:20:14  April 27, 2008"
31 158 arniml
set_global_assignment -name LAST_QUARTUS_VERSION 7.0
32 156 arniml
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_opt_pack-p.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_clkgen.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_reset.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_pack-p.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_pmem_ctrl.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_dmem_ctrl.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_comp_pack-p.vhd
39 166 arniml
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_mnemonic_pack-p.vhd
40 156 arniml
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_decoder.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_skip.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_alu.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_stack.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_io_pack-p.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_io_l.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_io_d.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_io_g.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_io_in.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_sio.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_timer.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_core.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/tech/generic/generic_ram_ena.vhd
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set_global_assignment -name VHDL_FILE rom_t42x.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/system/t420_rom-e.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/system/t420_rom-struct-a.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/tech/cyclone/t400_por.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t400_core_comp_pack-p.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/tech/t400_tech_comp_pack-p.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/system/t420_notri.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/system/t400_system_comp_pack-p.vhd
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set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/system/t421.vhd
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# Analysis & Synthesis Assignments
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# ================================
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set_global_assignment -name VHDL_INPUT_VERSION VHDL87
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set_global_assignment -name FAMILY Cyclone
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set_global_assignment -name DEVICE EP1C12Q240C8
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH WEAK PULL-UP"
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set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
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set_global_assignment -name FMAX_REQUIREMENT "4 MHz" -section_id ck_i
72 166 arniml
set_instance_assignment -name CLOCK_SETTINGS ck_i -to ck_i
73 156 arniml
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
75 159 arniml
 
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set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE AREA

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