OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_1_beta/] [bench/] [vhdl/] [tb-c.vhd] - Blame information for rev 345

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 8 arniml
-------------------------------------------------------------------------------
2
--
3
-- The testbench for t48_core.
4
--
5 80 arniml
-- $Id: tb-c.vhd,v 1.2 2004-04-25 16:23:21 arniml Exp $
6 8 arniml
--
7
-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
8
--
9
-- All rights reserved
10
--
11
-------------------------------------------------------------------------------
12
 
13
configuration tb_behav_c0 of tb is
14
 
15
  for behav
16
 
17
    for rom_4k : syn_rom
18
      use configuration work.syn_rom_lpm_c0;
19
    end for;
20
 
21
    for ram_256 : syn_ram
22
      use configuration work.syn_ram_lpm_c0;
23
    end for;
24
 
25
    for ext_ram_b : syn_ram
26
      use configuration work.syn_ram_lpm_c0;
27
    end for;
28
 
29
    for t48_core_b : t48_core
30
      use configuration work.t48_core_struct_c0;
31
    end for;
32
 
33 80 arniml
    for if_timing_b : if_timing
34
      use configuration work.if_timing_behav_c0;
35
    end for;
36
 
37 8 arniml
  end for;
38
 
39
end tb_behav_c0;
40
 
41
 
42
-------------------------------------------------------------------------------
43
-- File History:
44
--
45
-- $Log: not supported by cvs2svn $
46 80 arniml
-- Revision 1.1  2004/03/24 21:42:10  arniml
47
-- initial check-in
48
--
49 8 arniml
-------------------------------------------------------------------------------

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.