OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_2_beta/] [sw/] [verif/] [black_box/] [mov/] [mov_rr_a/] [data_num/] [test.asm] - Blame information for rev 12

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 12 arniml 
        ;; *******************************************************************
2 
        ;; $Id: test.asm,v 1.1.1.1 2004-03-25 22:29:16 arniml Exp $
3 
        ;;
4 
        ;; Test MOV Rr, A for RB0 with 2*r.
5 
        ;; *******************************************************************
6 
 
7 
        INCLUDE "cpu.inc"
8 
        INCLUDE "pass_fail.inc"
9 
 
10 
        ORG     0
11 
 
12 
        ;; Start of test
13 
        mov     a, #0xfe
14 
        mov     r0, a
15 
        mov     a, #0xfd
16 
        mov     r1, a
17 
        mov     a, #0xfb
18 
        mov     r2, a
19 
        mov     a, #0xf7
20 
        mov     r3, a
21 
        mov     a, #0xef
22 
        mov     r4, a
23 
        mov     a, #0xdf
24 
        mov     r5, a
25 
        mov     a, #0xbf
26 
        mov     r6, a
27 
        mov     a, #0x7f
28 
        mov     r7, a
29 
 
30 
        mov     a, #0x00
31 
 
32 
        mov     a, r0
33 
        jz      fail
34 
        jb0     fail
35 
 
36 
        mov     a, r1
37 
        jb1     fail
38 
 
39 
        mov     a, r2
40 
        jb2     fail
41 
 
42 
        mov     a, r3
43 
        jb3     fail
44 
 
45 
        mov     a, r4
46 
        jb4     fail
47 
 
48 
        mov     a, r5
49 
        jb5     fail
50 
 
51 
        mov     a, r6
52 
        jb6     fail
53 
 
54 
        mov     a, r7
55 
        jb7     fail
56 
 
57 
pass:   PASS
58 
 
59 
fail:   FAIL

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.