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[/] [t48/] [tags/] [rel_0_3_beta/] [sw/] [verif/] [white_box/] [p1_port_reg_conflict/] [test.asm] - Blame information for rev 292

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1 99 arniml
        ;; *******************************************************************
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        ;; $Id: test.asm,v 1.1 2004-05-17 14:34:41 arniml Exp $
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        ;;
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        ;; Test P1 conflict for reading port or output register.
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        ;; *******************************************************************
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        INCLUDE "cpu.inc"
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        INCLUDE "pass_fail.inc"
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        ORG     0
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        ;; Start of test
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        ;; access testbench peripherals
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        mov     r0, #0FFH
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        mov     a, #002H
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        movx    @r0, a
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        ;; check functionality of P1 testbench peripheral
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        in      a, p1
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        inc     a
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        jnz     fail
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        mov     r0, #000H
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        ;; extern write 00H to P1
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        clr     a
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        movx    @r0, a
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        in      a, p1
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        jnz     fail
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        ;; extern write 0AAH to P1
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        mov     a, #0AAH
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        movx    @r0, a
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        clr     a
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        in      a, p1
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        add     a, #056H
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        jnz     fail
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        ;; extern write 055H to P1
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        mov     a, #055H
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        movx    @r0, a
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        clr     a
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        in      a, p1
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        add     a, #0ABH
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        jnz     fail
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        ;; reset extern P1 to 0FFH
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        dec     a
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        movx    @r0, a
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        ;;
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        ;; Start of real test
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        ;;
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        ;; Test ORL
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        ;; set internal P1 to 0AAH
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        mov     a, #0AAH
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        outl    p1, a
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        in      a, p1
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        add     a, #056H
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        jnz     fail
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        ;; extern write 055H to P1
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        mov     a, #055H
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        movx    @r0, a
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        in      a, p1
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        jnz     fail
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        ;; set internal P1 to 0ABH, setting P1[0] to 1
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        orl     P1, #001H
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        in      a, p1
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        dec     a
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        jnz     fail
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        ;; reset extern P1 to 0FFH
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        dec     a
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        movx    @r0, a
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        ;; compare P1 vs. 0ABH
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        in      a, p1
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        cpl     a
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        add     a, #0ABH
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        cpl     a
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        jnz     fail
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        ;; reset intern P1 to 0FFH
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        dec     a
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        outl    p1, a
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        ;; set internal P1 to 055H
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        mov     a, #055H
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        outl    p1, a
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        clr     a
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        in      a, p1
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        add     a, #0ABH
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        jnz     fail
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        ;; external write 0AAH to P1
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        mov     a, #0AAH
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        movx    @r0, a
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        ;; set internal P1 to 054H
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        anl     P1, #0FEH
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        ;; reset extern P1 to 0FFH
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        mov     a, #0FFH
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        movx    @r0, a
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        ;; compare P1 vs. 054H
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        in      a, p1
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        cpl     a
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        add     a, #054H
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        cpl     a
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        jnz     fail
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pass:   PASS
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fail:   FAIL

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