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7 |
arniml |
--------------------------------------------------------------------------
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-- This VHDL file was developed by Altera Corporation. It may be
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-- freely copied and/or distributed at no cost. Any persons using this
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-- file for any purpose do so at their own risk, and are responsible for
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-- the results of such use. Altera Corporation does not guarantee that
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-- this file is complete, correct, or fit for any particular purpose.
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-- NO WARRANTY OF ANY KIND IS EXPRESSED OR IMPLIED. This notice must
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-- accompany any copy of this file.
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--
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--------------------------------------------------------------------------
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-- LPM Synthesizable Models (Support string type generic)
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--------------------------------------------------------------------------
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-- Version 2.0 (lpm 220) Date 01/04/00
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--
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-- 1. Fixed LPM_RAM_DQ, LPM_RAM_DP, LPM_RAM_IO and LPM_ROM to correctly
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-- read in values from LPM_FILE (*.hex) when the DATA width is greater
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-- than 16 bits.
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-- 2. Explicit sign conversions are added to standard logic vector
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-- comparisons in LPM_RAM_DQ, LPM_RAM_DP, LPM_RAM_IO, LPM_ROM, and
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-- LPM_COMPARE.
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-- 3. LPM_FIFO_DC is rewritten to have correct outputs.
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-- 4. LPM_FIFO outputs zeros when nothing has been read from it, and
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-- outputs LPM_NUMWORDS mod exp(2, LPM_WIDTHU) when it is full.
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-- 5. Fixed LPM_DIVIDE to divide correctly.
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--------------------------------------------------------------------------
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-- Version 1.9 (lpm 220) Date 11/30/99
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--
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-- 1. Fixed UNUSED file not found problem and initialization problem
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-- with LPM_RAM_DP, LPM_RAM_DQ, and LPM_RAM_IO.
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-- 2. Fixed LPM_MULT when SUM port is not used.
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-- 3. Fixed LPM_FIFO_DC to enable read when rdclock and wrclock rise
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-- at the same time.
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-- 4. Fixed LPM_COUNTER comparison problem when signed library is loaded
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-- and counter is incrementing.
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-- 5. Got rid of "Illegal Character" error message at time = 0 ns when
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-- simulating LPM_COUNTER.
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--------------------------------------------------------------------------
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-- Version 1.8 (lpm 220) Date 10/25/99
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--
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-- 1. Some LPM_PVALUE implementations were missing, and now implemented.
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-- 2. Fixed LPM_COUNTER to count correctly without conversion overflow,
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-- that is, when LPM_MODULUS = 2 ** LPM_WIDTH.
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-- 3. Fixed LPM_RAM_DP sync process sensitivity list to detect wraddress
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-- changes.
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--------------------------------------------------------------------------
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-- Version 1.7 (lpm 220) Date 07/13/99
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--
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-- Changed LPM_RAM_IO so that it can be used to simulate both MP2 and
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-- Quartus behaviour and LPM220-compliant behaviour.
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--------------------------------------------------------------------------
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-- Version 1.6 (lpm 220) Date 06/15/99
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--
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-- 1. Fixed LPM_ADD_SUB sign extension problem and subtraction bug.
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-- 2. Fixed LPM_COUNTER to use LPM_MODULUS value.
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-- 3. Added CIN and COUT port, and discarded EQ port in LPM_COUNTER to
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-- comply with the specfication.
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-- 4. Included LPM_RAM_DP, LPM_RAM_DQ, LPM_RAM_IO, LPM_ROM, LPM_FIFO, and
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-- LPM_FIFO_DC; they are all initialized to 0's.
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--------------------------------------------------------------------------
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-- Version 1.5 (lpm 220) Date 05/10/99
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--
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-- Changed LPM_MODULUS from string type to integer.
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--------------------------------------------------------------------------
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-- Version 1.4 (lpm 220) Date 02/05/99
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--
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-- 1. Added LPM_DIVIDE module.
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-- 2. Added CLKEN port to LPM_MUX, LPM_DECODE, LPM_ADD_SUB, LPM_MULT
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-- and LPM_COMPARE
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-- 3. Replaced the constants holding string with the actual string.
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--------------------------------------------------------------------------
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-- Version 1.3 Date 07/30/96
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--
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-- Modification History
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--
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| 75 |
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-- 1. Changed the DEFAULT value to "UNUSED" for LPM_SVALUE, LPM_AVALUE,
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-- LPM_MODULUS, and LPM_NUMWORDS, LPM_HINT,LPM_STRENGTH, LPM_DIRECTION,
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-- and LPM_PVALUE
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--
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-- 2. Added the two dimentional port components (AND, OR, XOR, and MUX).
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--------------------------------------------------------------------------
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-- Excluded Functions:
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--
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-- LPM_FSM and LPM_TTABLE
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--
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--------------------------------------------------------------------------
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-- Assumptions:
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--
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-- 1. All ports and signal types are std_logic or std_logic_vector
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-- from IEEE 1164 package.
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-- 2. Synopsys std_logic_arith, std_logic_unsigned, and std_logic_signed
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-- package are assumed to be accessible from IEEE library.
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-- 3. lpm_component_package must be accessible from library work.
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-- 4. The default value of LPM_SVALUE, LPM_AVALUE, LPM_MODULUS, LPM_HINT,
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-- LPM_NUMWORDS, LPM_STRENGTH, LPM_DIRECTION, and LPM_PVALUE is
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-- string "UNUSED".
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--------------------------------------------------------------------------
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.std_logic_arith.all;
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use IEEE.std_logic_unsigned.all;
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--use work.LPM_COMPONENTS.all;
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use std.textio.all;
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entity LPM_ROM is
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generic (LPM_WIDTH : positive;
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LPM_WIDTHAD : positive;
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LPM_NUMWORDS : natural := 0;
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LPM_ADDRESS_CONTROL : string := "REGISTERED";
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LPM_OUTDATA : string := "REGISTERED";
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LPM_FILE : string;
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LPM_TYPE : string := "LPM_ROM";
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LPM_HINT : string := "UNUSED");
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port (ADDRESS : in STD_LOGIC_VECTOR(LPM_WIDTHAD-1 downto 0);
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| 115 |
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INCLOCK : in STD_LOGIC := '0';
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| 116 |
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OUTCLOCK : in STD_LOGIC := '0';
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| 117 |
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MEMENAB : in STD_LOGIC := '1';
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| 118 |
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Q : out STD_LOGIC_VECTOR(LPM_WIDTH-1 downto 0));
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| 119 |
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|
| 120 |
|
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function int_to_str( value : integer ) return string is
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| 121 |
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variable ivalue,index : integer;
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| 122 |
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variable digit : integer;
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| 123 |
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variable line_no: string(8 downto 1) := " ";
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| 124 |
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begin
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| 125 |
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ivalue := value;
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| 126 |
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index := 1;
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| 127 |
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while (ivalue > 0 ) loop
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| 128 |
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digit := ivalue MOD 10;
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| 129 |
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ivalue := ivalue/10;
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| 130 |
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case digit is
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| 131 |
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when 0 =>
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| 132 |
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line_no(index) := '0';
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| 133 |
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when 1 =>
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| 134 |
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line_no(index) := '1';
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| 135 |
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when 2 =>
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| 136 |
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line_no(index) := '2';
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| 137 |
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when 3 =>
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| 138 |
|
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line_no(index) := '3';
|
| 139 |
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when 4 =>
|
| 140 |
|
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line_no(index) := '4';
|
| 141 |
|
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when 5 =>
|
| 142 |
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line_no(index) := '5';
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| 143 |
|
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when 6 =>
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| 144 |
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line_no(index) := '6';
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| 145 |
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when 7 =>
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| 146 |
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line_no(index) := '7';
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| 147 |
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when 8 =>
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| 148 |
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line_no(index) := '8';
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| 149 |
|
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when 9 =>
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| 150 |
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line_no(index) := '9';
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| 151 |
|
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when others =>
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| 152 |
|
|
ASSERT FALSE
|
| 153 |
|
|
REPORT "Illegal number!"
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| 154 |
|
|
SEVERITY ERROR;
|
| 155 |
|
|
end case;
|
| 156 |
|
|
index := index + 1;
|
| 157 |
|
|
end loop;
|
| 158 |
|
|
return line_no;
|
| 159 |
|
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end;
|
| 160 |
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|
| 161 |
|
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function hex_str_to_int( str : string ) return integer is
|
| 162 |
|
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variable len : integer := str'length;
|
| 163 |
|
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variable ivalue : integer := 0;
|
| 164 |
|
|
variable digit : integer;
|
| 165 |
|
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begin
|
| 166 |
|
|
for i in len downto 1 loop
|
| 167 |
|
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case str(i) is
|
| 168 |
|
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when '0' =>
|
| 169 |
|
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digit := 0;
|
| 170 |
|
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when '1' =>
|
| 171 |
|
|
digit := 1;
|
| 172 |
|
|
when '2' =>
|
| 173 |
|
|
digit := 2;
|
| 174 |
|
|
when '3' =>
|
| 175 |
|
|
digit := 3;
|
| 176 |
|
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when '4' =>
|
| 177 |
|
|
digit := 4;
|
| 178 |
|
|
when '5' =>
|
| 179 |
|
|
digit := 5;
|
| 180 |
|
|
when '6' =>
|
| 181 |
|
|
digit := 6;
|
| 182 |
|
|
when '7' =>
|
| 183 |
|
|
digit := 7;
|
| 184 |
|
|
when '8' =>
|
| 185 |
|
|
digit := 8;
|
| 186 |
|
|
when '9' =>
|
| 187 |
|
|
digit := 9;
|
| 188 |
|
|
when 'A' =>
|
| 189 |
|
|
digit := 10;
|
| 190 |
|
|
when 'a' =>
|
| 191 |
|
|
digit := 10;
|
| 192 |
|
|
when 'B' =>
|
| 193 |
|
|
digit := 11;
|
| 194 |
|
|
when 'b' =>
|
| 195 |
|
|
digit := 11;
|
| 196 |
|
|
when 'C' =>
|
| 197 |
|
|
digit := 12;
|
| 198 |
|
|
when 'c' =>
|
| 199 |
|
|
digit := 12;
|
| 200 |
|
|
when 'D' =>
|
| 201 |
|
|
digit := 13;
|
| 202 |
|
|
when 'd' =>
|
| 203 |
|
|
digit := 13;
|
| 204 |
|
|
when 'E' =>
|
| 205 |
|
|
digit := 14;
|
| 206 |
|
|
when 'e' =>
|
| 207 |
|
|
digit := 14;
|
| 208 |
|
|
when 'F' =>
|
| 209 |
|
|
digit := 15;
|
| 210 |
|
|
when 'f' =>
|
| 211 |
|
|
digit := 15;
|
| 212 |
|
|
when others =>
|
| 213 |
|
|
ASSERT FALSE
|
| 214 |
|
|
REPORT "Illegal character "& str(i) & "in Intel Hex File! "
|
| 215 |
|
|
SEVERITY ERROR;
|
| 216 |
|
|
end case;
|
| 217 |
|
|
ivalue := ivalue * 16 + digit;
|
| 218 |
|
|
end loop;
|
| 219 |
|
|
return ivalue;
|
| 220 |
|
|
end;
|
| 221 |
|
|
|
| 222 |
|
|
procedure Shrink_line(L : inout LINE; pos : in integer) is
|
| 223 |
|
|
subtype nstring is string(1 to pos);
|
| 224 |
|
|
variable stmp : nstring;
|
| 225 |
|
|
begin
|
| 226 |
|
|
if pos >= 1 then
|
| 227 |
|
|
read(l, stmp);
|
| 228 |
|
|
end if;
|
| 229 |
|
|
end;
|
| 230 |
|
|
|
| 231 |
|
|
end LPM_ROM;
|
| 232 |
|
|
|
| 233 |
|
|
architecture LPM_SYN of lpm_rom is
|
| 234 |
|
|
|
| 235 |
|
|
--type lpm_memory is array(lpm_numwords-1 downto 0) of std_logic_vector(lpm_width-1 downto 0);
|
| 236 |
|
|
type lpm_memory is array((2**lpm_widthad)-1 downto 0) of std_logic_vector(lpm_width-1 downto 0);
|
| 237 |
|
|
|
| 238 |
|
|
signal q2, q_tmp, q_reg : std_logic_vector(lpm_width-1 downto 0);
|
| 239 |
|
|
signal address_tmp, address_reg : std_logic_vector(lpm_widthad-1 downto 0);
|
| 240 |
|
|
|
| 241 |
|
|
begin
|
| 242 |
|
|
|
| 243 |
|
|
enable_mem: process(memenab, q2)
|
| 244 |
|
|
begin
|
| 245 |
|
|
if (memenab = '1') then
|
| 246 |
|
|
q <= q2;
|
| 247 |
|
|
else
|
| 248 |
|
|
q <= (OTHERS => 'Z');
|
| 249 |
|
|
end if;
|
| 250 |
|
|
end process;
|
| 251 |
|
|
|
| 252 |
|
|
sync: process(address, address_reg, q_tmp, q_reg)
|
| 253 |
|
|
begin
|
| 254 |
|
|
if (lpm_address_control = "REGISTERED") then
|
| 255 |
|
|
address_tmp <= address_reg;
|
| 256 |
|
|
else
|
| 257 |
|
|
address_tmp <= address;
|
| 258 |
|
|
end if;
|
| 259 |
|
|
if (lpm_outdata = "REGISTERED") then
|
| 260 |
|
|
q2 <= q_reg;
|
| 261 |
|
|
else
|
| 262 |
|
|
q2 <= q_tmp;
|
| 263 |
|
|
end if;
|
| 264 |
|
|
end process;
|
| 265 |
|
|
|
| 266 |
|
|
input_reg: process (inclock)
|
| 267 |
|
|
begin
|
| 268 |
|
|
if inclock'event and inclock = '1' then
|
| 269 |
|
|
address_reg <= address;
|
| 270 |
|
|
end if;
|
| 271 |
|
|
end process;
|
| 272 |
|
|
|
| 273 |
|
|
output_reg: process (outclock)
|
| 274 |
|
|
begin
|
| 275 |
|
|
if outclock'event and outclock = '1' then
|
| 276 |
|
|
q_reg <= q_tmp;
|
| 277 |
|
|
end if;
|
| 278 |
|
|
end process;
|
| 279 |
|
|
|
| 280 |
|
|
memory: process(memenab, address_tmp)
|
| 281 |
|
|
variable mem_data : lpm_memory;
|
| 282 |
|
|
variable mem_data_tmp : integer := 0;
|
| 283 |
|
|
variable mem_init: boolean := false;
|
| 284 |
|
|
variable i, j, k, lineno : integer := 0;
|
| 285 |
|
|
variable buf: line ;
|
| 286 |
|
|
variable booval: boolean ;
|
| 287 |
|
|
FILE mem_data_file: TEXT IS IN LPM_FILE;
|
| 288 |
|
|
variable base, byte, rec_type, datain, addr, checksum: string(2 downto 1);
|
| 289 |
|
|
variable startadd: string(4 downto 1);
|
| 290 |
|
|
variable ibase: integer := 0;
|
| 291 |
|
|
variable ibyte: integer := 0;
|
| 292 |
|
|
variable istartadd: integer := 0;
|
| 293 |
|
|
variable check_sum_vec, check_sum_vec_tmp: std_logic_vector(7 downto 0);
|
| 294 |
|
|
begin
|
| 295 |
|
|
-- INITIALIZE --
|
| 296 |
|
|
if NOT(mem_init) then
|
| 297 |
|
|
-- INITIALIZE TO 0 --
|
| 298 |
|
|
for i in mem_data'LOW to mem_data'HIGH loop
|
| 299 |
|
|
mem_data(i) := (OTHERS => '0');
|
| 300 |
|
|
end loop;
|
| 301 |
|
|
|
| 302 |
|
|
if (LPM_FILE = "UNUSED") then
|
| 303 |
|
|
ASSERT FALSE
|
| 304 |
|
|
REPORT "Initialization file not found!"
|
| 305 |
|
|
SEVERITY ERROR;
|
| 306 |
|
|
else
|
| 307 |
|
|
WHILE NOT ENDFILE(mem_data_file) loop
|
| 308 |
|
|
booval := true;
|
| 309 |
|
|
READLINE(mem_data_file, buf);
|
| 310 |
|
|
lineno := lineno + 1;
|
| 311 |
|
|
check_sum_vec := (OTHERS => '0');
|
| 312 |
|
|
if (buf(buf'LOW) = ':') then
|
| 313 |
|
|
i := 1;
|
| 314 |
|
|
shrink_line(buf, i);
|
| 315 |
|
|
READ(L=>buf, VALUE=>byte, good=>booval);
|
| 316 |
|
|
if not (booval) then
|
| 317 |
|
|
ASSERT FALSE
|
| 318 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format!"
|
| 319 |
|
|
SEVERITY ERROR;
|
| 320 |
|
|
end if;
|
| 321 |
|
|
ibyte := hex_str_to_int(byte);
|
| 322 |
|
|
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(ibyte, 8));
|
| 323 |
|
|
READ(L=>buf, VALUE=>startadd, good=>booval);
|
| 324 |
|
|
if not (booval) then
|
| 325 |
|
|
ASSERT FALSE
|
| 326 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 327 |
|
|
SEVERITY ERROR;
|
| 328 |
|
|
end if;
|
| 329 |
|
|
istartadd := hex_str_to_int(startadd);
|
| 330 |
|
|
addr(2) := startadd(4);
|
| 331 |
|
|
addr(1) := startadd(3);
|
| 332 |
|
|
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(hex_str_to_int(addr), 8));
|
| 333 |
|
|
addr(2) := startadd(2);
|
| 334 |
|
|
addr(1) := startadd(1);
|
| 335 |
|
|
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(hex_str_to_int(addr), 8));
|
| 336 |
|
|
READ(L=>buf, VALUE=>rec_type, good=>booval);
|
| 337 |
|
|
if not (booval) then
|
| 338 |
|
|
ASSERT FALSE
|
| 339 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 340 |
|
|
SEVERITY ERROR;
|
| 341 |
|
|
end if;
|
| 342 |
|
|
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(hex_str_to_int(rec_type), 8));
|
| 343 |
|
|
else
|
| 344 |
|
|
ASSERT FALSE
|
| 345 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 346 |
|
|
SEVERITY ERROR;
|
| 347 |
|
|
end if;
|
| 348 |
|
|
case rec_type is
|
| 349 |
|
|
when "00"=> -- Data record
|
| 350 |
|
|
i := 0;
|
| 351 |
|
|
k := lpm_width / 8;
|
| 352 |
|
|
if ((lpm_width MOD 8) /= 0) then
|
| 353 |
|
|
k := k + 1;
|
| 354 |
|
|
end if;
|
| 355 |
|
|
-- k = no. of bytes per CAM entry.
|
| 356 |
|
|
while (i < ibyte) loop
|
| 357 |
|
|
mem_data_tmp := 0;
|
| 358 |
|
|
for j in 1 to k loop
|
| 359 |
|
|
READ(L=>buf, VALUE=>datain,good=>booval); -- read in data a byte (2 hex chars) at a time.
|
| 360 |
|
|
if not (booval) then
|
| 361 |
|
|
ASSERT FALSE
|
| 362 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 363 |
|
|
SEVERITY ERROR;
|
| 364 |
|
|
end if;
|
| 365 |
|
|
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(hex_str_to_int(datain), 8));
|
| 366 |
|
|
mem_data_tmp := mem_data_tmp * 256 + hex_str_to_int(datain);
|
| 367 |
|
|
end loop;
|
| 368 |
|
|
i := i + k;
|
| 369 |
|
|
mem_data(ibase + istartadd) := CONV_STD_LOGIC_VECTOR(mem_data_tmp, lpm_width);
|
| 370 |
|
|
istartadd := istartadd + 1;
|
| 371 |
|
|
end loop;
|
| 372 |
|
|
when "01"=>
|
| 373 |
|
|
exit;
|
| 374 |
|
|
when "02"=>
|
| 375 |
|
|
ibase := 0;
|
| 376 |
|
|
if (ibyte /= 2) then
|
| 377 |
|
|
ASSERT FALSE
|
| 378 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format for record type 02! "
|
| 379 |
|
|
SEVERITY ERROR;
|
| 380 |
|
|
end if;
|
| 381 |
|
|
for i in 0 to (ibyte-1) loop
|
| 382 |
|
|
READ(L=>buf, VALUE=>base,good=>booval);
|
| 383 |
|
|
ibase := ibase * 256 + hex_str_to_int(base);
|
| 384 |
|
|
if not (booval) then
|
| 385 |
|
|
ASSERT FALSE
|
| 386 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal Intel Hex Format! "
|
| 387 |
|
|
SEVERITY ERROR;
|
| 388 |
|
|
end if;
|
| 389 |
|
|
check_sum_vec := unsigned(check_sum_vec) + unsigned(CONV_STD_LOGIC_VECTOR(hex_str_to_int(base), 8));
|
| 390 |
|
|
end loop;
|
| 391 |
|
|
ibase := ibase * 16;
|
| 392 |
|
|
when OTHERS =>
|
| 393 |
|
|
ASSERT FALSE
|
| 394 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Illegal record type in Intel Hex File! "
|
| 395 |
|
|
SEVERITY ERROR;
|
| 396 |
|
|
end case;
|
| 397 |
|
|
READ(L=>buf, VALUE=>checksum,good=>booval);
|
| 398 |
|
|
if not (booval) then
|
| 399 |
|
|
ASSERT FALSE
|
| 400 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Checksum is missing! "
|
| 401 |
|
|
SEVERITY ERROR;
|
| 402 |
|
|
end if;
|
| 403 |
|
|
|
| 404 |
|
|
check_sum_vec := unsigned(not (check_sum_vec)) + 1 ;
|
| 405 |
|
|
check_sum_vec_tmp := CONV_STD_LOGIC_VECTOR(hex_str_to_int(checksum),8);
|
| 406 |
|
|
|
| 407 |
|
|
if (unsigned(check_sum_vec) /= unsigned(check_sum_vec_tmp)) then
|
| 408 |
|
|
ASSERT FALSE
|
| 409 |
|
|
REPORT "[Line "& int_to_str(lineno) & "]:Incorrect checksum!"
|
| 410 |
|
|
SEVERITY ERROR;
|
| 411 |
|
|
end if;
|
| 412 |
|
|
end loop;
|
| 413 |
|
|
end if;
|
| 414 |
|
|
mem_init := TRUE;
|
| 415 |
|
|
end if;
|
| 416 |
|
|
|
| 417 |
|
|
-- MEMORY FUNCTION --
|
| 418 |
|
|
--if memenab = '1' then
|
| 419 |
|
|
q_tmp <= mem_data(conv_integer(address_tmp));
|
| 420 |
|
|
--else
|
| 421 |
|
|
-- q_tmp <= (OTHERS => 'Z');
|
| 422 |
|
|
--end if;
|
| 423 |
|
|
end process;
|
| 424 |
|
|
|
| 425 |
|
|
end LPM_SYN;
|
| 426 |
|
|
|
| 427 |
|
|
|
| 428 |
|
|
---------------------------------------------------------------------------
|
| 429 |
|
|
|
| 430 |
|
|
|
| 431 |
|
|
-- pragma translate_off
|
| 432 |
|
|
configuration lpm_rom_c0 of lpm_rom is
|
| 433 |
|
|
|
| 434 |
|
|
for lpm_syn
|
| 435 |
|
|
end for;
|
| 436 |
|
|
|
| 437 |
|
|
end lpm_rom_c0;
|
| 438 |
|
|
-- pragma translate_on
|
