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[/] [t48/] [tags/] [rel_0_4_beta/] [rtl/] [vhdl/] [system/] [syn_ram-lpm-c.vhd] - Blame information for rev 7

Line No.	Rev	Author	Line
1	7	arniml	`-------------------------------------------------------------------------------`
2			`--`
3			`-- A synchronous parametrizable RAM instantiating a standard RAM from`
4			`-- the Altera LPM.`
5			`--`
6			`-- $Id: syn_ram-lpm-c.vhd,v 1.1 2004-03-24 21:32:27 arniml Exp $`
7			`--`
8			`-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)`
9			`--`
10			`-- All rights reserved`
11			`--`
12			`-------------------------------------------------------------------------------`
13
14			`configuration syn_ram_lpm_c0 of syn_ram is`
15
16			`for lpm`
17
18			`for ram_b : lpm_ram_dq`
19			`use configuration work.lpm_ram_dq_c0;`
20			`end for;`
21
22			`end for;`
23
24			`end syn_ram_lpm_c0;`
25
26
27			`-------------------------------------------------------------------------------`
28			`-- File History:`
29			`--`
30			`-- $Log: not supported by cvs2svn $`
31			`-------------------------------------------------------------------------------`