1 |
4 |
arniml |
-------------------------------------------------------------------------------
|
2 |
|
|
--
|
3 |
|
|
-- The Conditional Branch Logic unit.
|
4 |
|
|
-- Decisions whether to take a jump or not are made here.
|
5 |
|
|
--
|
6 |
77 |
arniml |
-- $Id: cond_branch.vhd,v 1.2 2004-04-24 23:44:25 arniml Exp $
|
7 |
4 |
arniml |
--
|
8 |
|
|
-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
|
9 |
|
|
--
|
10 |
|
|
-- All rights reserved
|
11 |
|
|
--
|
12 |
|
|
-- Redistribution and use in source and synthezised forms, with or without
|
13 |
|
|
-- modification, are permitted provided that the following conditions are met:
|
14 |
|
|
--
|
15 |
|
|
-- Redistributions of source code must retain the above copyright notice,
|
16 |
|
|
-- this list of conditions and the following disclaimer.
|
17 |
|
|
--
|
18 |
|
|
-- Redistributions in synthesized form must reproduce the above copyright
|
19 |
|
|
-- notice, this list of conditions and the following disclaimer in the
|
20 |
|
|
-- documentation and/or other materials provided with the distribution.
|
21 |
|
|
--
|
22 |
|
|
-- Neither the name of the author nor the names of other contributors may
|
23 |
|
|
-- be used to endorse or promote products derived from this software without
|
24 |
|
|
-- specific prior written permission.
|
25 |
|
|
--
|
26 |
|
|
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
27 |
|
|
-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
28 |
|
|
-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
29 |
|
|
-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
|
30 |
|
|
-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
31 |
|
|
-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
32 |
|
|
-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
33 |
|
|
-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
34 |
|
|
-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
35 |
|
|
-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
36 |
|
|
-- POSSIBILITY OF SUCH DAMAGE.
|
37 |
|
|
--
|
38 |
|
|
-- Please report bugs to the author, but before you do so, please
|
39 |
|
|
-- make sure that this is not a derivative work and that
|
40 |
|
|
-- you have the latest version of this file.
|
41 |
|
|
--
|
42 |
|
|
-- The latest version of this file can be found at:
|
43 |
|
|
-- http://www.opencores.org/cvsweb.shtml/t48/
|
44 |
|
|
--
|
45 |
|
|
-------------------------------------------------------------------------------
|
46 |
|
|
|
47 |
|
|
library ieee;
|
48 |
|
|
use ieee.std_logic_1164.all;
|
49 |
|
|
|
50 |
|
|
use work.t48_pack.word_t;
|
51 |
|
|
|
52 |
|
|
use work.cond_branch_pack.all;
|
53 |
|
|
|
54 |
|
|
entity cond_branch is
|
55 |
|
|
|
56 |
|
|
port (
|
57 |
|
|
-- Global Interface -------------------------------------------------------
|
58 |
|
|
clk_i : in std_logic;
|
59 |
|
|
res_i : in std_logic;
|
60 |
|
|
en_clk_i : in boolean;
|
61 |
|
|
-- Decoder Interface ------------------------------------------------------
|
62 |
|
|
compute_take_i : in boolean;
|
63 |
|
|
branch_cond_i : in branch_conditions_t;
|
64 |
|
|
take_branch_o : out boolean;
|
65 |
|
|
accu_i : in word_t;
|
66 |
|
|
t0_i : in std_logic;
|
67 |
|
|
t1_i : in std_logic;
|
68 |
|
|
int_n_i : in std_logic;
|
69 |
|
|
f0_i : in std_logic;
|
70 |
|
|
f1_i : in std_logic;
|
71 |
|
|
tf_i : in std_logic;
|
72 |
|
|
carry_i : in std_logic;
|
73 |
|
|
comp_value_i : in comp_value_t
|
74 |
|
|
);
|
75 |
|
|
|
76 |
|
|
end cond_branch;
|
77 |
|
|
|
78 |
|
|
|
79 |
|
|
library ieee;
|
80 |
77 |
arniml |
use ieee.numeric_std.all;
|
81 |
4 |
arniml |
|
82 |
|
|
use work.t48_pack.res_active_c;
|
83 |
|
|
use work.t48_pack.clk_active_c;
|
84 |
|
|
|
85 |
|
|
architecture rtl of cond_branch is
|
86 |
|
|
|
87 |
|
|
-- marker for branch taken
|
88 |
|
|
signal take_branch_s,
|
89 |
|
|
take_branch_q : boolean;
|
90 |
|
|
|
91 |
|
|
begin
|
92 |
|
|
|
93 |
|
|
-----------------------------------------------------------------------------
|
94 |
|
|
-- Process decide_take
|
95 |
|
|
--
|
96 |
|
|
-- Purpose:
|
97 |
|
|
-- Decides whether a branch has to be taken or not.
|
98 |
|
|
--
|
99 |
|
|
decide_take: process (accu_i,
|
100 |
|
|
branch_cond_i,
|
101 |
|
|
t0_i, t1_i,
|
102 |
|
|
int_n_i,
|
103 |
|
|
f0_i, f1_i,
|
104 |
|
|
tf_i,
|
105 |
|
|
carry_i,
|
106 |
|
|
comp_value_i)
|
107 |
|
|
variable or_v : std_logic;
|
108 |
|
|
begin
|
109 |
|
|
-- default assignment
|
110 |
|
|
take_branch_s <= false;
|
111 |
77 |
arniml |
or_v := '0';
|
112 |
4 |
arniml |
|
113 |
|
|
case branch_cond_i is
|
114 |
|
|
-- Branch On: Accumulator Bit -------------------------------------------
|
115 |
|
|
when COND_ON_BIT =>
|
116 |
77 |
arniml |
if accu_i(TO_INTEGER(UNSIGNED(comp_value_i))) = '1' then
|
117 |
4 |
arniml |
take_branch_s <= true;
|
118 |
|
|
end if;
|
119 |
|
|
|
120 |
|
|
-- Branch On: Accumulator Zero ------------------------------------------
|
121 |
|
|
when COND_Z =>
|
122 |
|
|
for i in accu_i'range loop
|
123 |
|
|
or_v := or_v or accu_i(i);
|
124 |
|
|
end loop;
|
125 |
|
|
take_branch_s <= or_v = not comp_value_i(0);
|
126 |
|
|
|
127 |
|
|
-- Branch On: Carry -----------------------------------------------------
|
128 |
|
|
when COND_C =>
|
129 |
|
|
take_branch_s <= carry_i = comp_value_i(0);
|
130 |
|
|
|
131 |
|
|
-- Branch On: Flag 0 ----------------------------------------------------
|
132 |
|
|
when COND_F0 =>
|
133 |
|
|
take_branch_s <= f0_i = '1';
|
134 |
|
|
|
135 |
|
|
-- Branch On: Flag 1 ----------------------------------------------------
|
136 |
|
|
when COND_F1 =>
|
137 |
|
|
take_branch_s <= f1_i = '1';
|
138 |
|
|
|
139 |
|
|
-- Branch On: Interrupt -------------------------------------------------
|
140 |
|
|
when COND_INT =>
|
141 |
|
|
take_branch_s <= int_n_i = '0';
|
142 |
|
|
|
143 |
|
|
-- Branch On: Test 0 ----------------------------------------------------
|
144 |
|
|
when COND_T0 =>
|
145 |
|
|
take_branch_s <= t0_i = comp_value_i(0);
|
146 |
|
|
|
147 |
|
|
-- Branch On: Test 1 ----------------------------------------------------
|
148 |
|
|
when COND_T1 =>
|
149 |
|
|
take_branch_s <= t1_i = comp_value_i(0);
|
150 |
|
|
|
151 |
|
|
-- Branch On: Timer Flag ------------------------------------------------
|
152 |
|
|
when COND_TF =>
|
153 |
|
|
take_branch_s <= tf_i = '1';
|
154 |
|
|
|
155 |
|
|
when others =>
|
156 |
|
|
-- pragma translate_off
|
157 |
|
|
assert false
|
158 |
|
|
report "Unknown branch condition specified!"
|
159 |
|
|
severity error;
|
160 |
|
|
-- pragma translate_on
|
161 |
|
|
|
162 |
|
|
end case;
|
163 |
|
|
|
164 |
|
|
end process decide_take;
|
165 |
|
|
--
|
166 |
|
|
-----------------------------------------------------------------------------
|
167 |
|
|
|
168 |
|
|
|
169 |
|
|
-----------------------------------------------------------------------------
|
170 |
|
|
-- Process reg
|
171 |
|
|
--
|
172 |
|
|
-- Purpose:
|
173 |
|
|
-- Implement the marker register.
|
174 |
|
|
--
|
175 |
|
|
reg: process (res_i, clk_i)
|
176 |
|
|
begin
|
177 |
|
|
if res_i = res_active_c then
|
178 |
|
|
take_branch_q <= false;
|
179 |
|
|
|
180 |
|
|
elsif clk_i'event and clk_i = clk_active_c then
|
181 |
|
|
if en_clk_i then
|
182 |
|
|
|
183 |
|
|
if compute_take_i then
|
184 |
|
|
take_branch_q <= take_branch_s;
|
185 |
|
|
end if;
|
186 |
|
|
|
187 |
|
|
end if;
|
188 |
|
|
|
189 |
|
|
end if;
|
190 |
|
|
|
191 |
|
|
end process reg;
|
192 |
|
|
--
|
193 |
|
|
-----------------------------------------------------------------------------
|
194 |
|
|
|
195 |
|
|
|
196 |
|
|
-----------------------------------------------------------------------------
|
197 |
|
|
-- Output Mapping.
|
198 |
|
|
-----------------------------------------------------------------------------
|
199 |
|
|
take_branch_o <= take_branch_q;
|
200 |
|
|
|
201 |
|
|
end rtl;
|
202 |
|
|
|
203 |
|
|
|
204 |
|
|
-------------------------------------------------------------------------------
|
205 |
|
|
-- File History:
|
206 |
|
|
--
|
207 |
|
|
-- $Log: not supported by cvs2svn $
|
208 |
77 |
arniml |
-- Revision 1.1 2004/03/23 21:31:52 arniml
|
209 |
|
|
-- initial check-in
|
210 |
4 |
arniml |
--
|
211 |
77 |
arniml |
--
|
212 |
4 |
arniml |
-------------------------------------------------------------------------------
|