| 1 |
105 |
arniml |
|
| 2 |
|
|
Known bugs of the T48 uController core
|
| 3 |
|
|
======================================
|
| 4 |
117 |
arniml |
Version: $Date: 2004-06-29 20:41:52 $
|
| 5 |
105 |
arniml |
|
| 6 |
|
|
|
| 7 |
117 |
arniml |
Release 0.2 BETA
|
| 8 |
|
|
----------------
|
| 9 |
|
|
|
| 10 |
|
|
*******************************************************************************
|
| 11 |
|
|
Program Memory bank can be switched during interrupt
|
| 12 |
|
|
|
| 13 |
|
|
During an interrupt service routine (i.e. after vectoring to location 3 or 7
|
| 14 |
|
|
of the Program Memory and befor executing the RETR instruction) the Program
|
| 15 |
|
|
Memory bank can be switched by executing a JMP or CALL instruction. These
|
| 16 |
|
|
instructions honour the current state of the Program Memory Bank Flag and thus
|
| 17 |
|
|
switch the Program Memory bank upon execution.
|
| 18 |
|
|
|
| 19 |
|
|
|
| 20 |
|
|
|
| 21 |
105 |
arniml |
Release 0.1 BETA
|
| 22 |
|
|
----------------
|
| 23 |
|
|
|
| 24 |
117 |
arniml |
*******************************************************************************
|
| 25 |
|
|
Program Memory bank can be switched during interrupt
|
| 26 |
|
|
|
| 27 |
|
|
See above.
|
| 28 |
|
|
|
| 29 |
105 |
arniml |
******************************************************************************
|
| 30 |
109 |
arniml |
External Program Memory ignored when EA = 0
|
| 31 |
|
|
|
| 32 |
|
|
The external Program Memory is always ignored when EA = 0 with the t8048 system
|
| 33 |
|
|
toplevel. Desired behaviour is to access external Program Memory when code
|
| 34 |
|
|
has to be fetched from an address location that is outside the internal
|
| 35 |
|
|
Program Memory.
|
| 36 |
|
|
|
| 37 |
|
|
Fixed in t8048.vhd 1.3
|
| 38 |
|
|
Fix will be included in next release.
|
| 39 |
|
|
|
| 40 |
|
|
******************************************************************************
|
| 41 |
105 |
arniml |
ANL and ORL to P2 read port status instead of port output register
|
| 42 |
|
|
|
| 43 |
|
|
The ANL and ORL instructions for P2 read the port status and apply the logical
|
| 44 |
|
|
operation on this value. Instead, they should read the port output register
|
| 45 |
|
|
and operate on this value.
|
| 46 |
|
|
|
| 47 |
|
|
Fixed in p2.vhd 1.5
|
| 48 |
|
|
Regression test:
|
| 49 |
|
|
white_box/p2_port_reg_conflict
|
| 50 |
|
|
Fix will be included in next release.
|
| 51 |
|
|
|
| 52 |
|
|
******************************************************************************
|
| 53 |
|
|
Counter is not incremented
|
| 54 |
|
|
|
| 55 |
|
|
When in counter mode, the timer/counter module does not increment upon a
|
| 56 |
|
|
falling edge of T1. Reason is a typo in the code for the edge detection signal
|
| 57 |
|
|
t1_inc_s - it will never become true.
|
| 58 |
|
|
|
| 59 |
|
|
Fixed in timer.vhd 1.3
|
| 60 |
|
|
Regression tests:
|
| 61 |
|
|
black_box/cnt/cnt
|
| 62 |
|
|
black_box/cnt/int
|
| 63 |
|
|
Fix will be included in next release.
|
