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[/] [t48/] [tags/] [rel_0_6__beta/] [KNOWN_BUGS] - Blame information for rev 105
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105 |
arniml |
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Known bugs of the T48 uController core
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======================================
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Version: $Id: KNOWN_BUGS,v 1.1 2004-05-18 12:07:22 arniml Exp $
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Release 0.1 BETA
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----------------
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******************************************************************************
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ANL and ORL to P2 read port status instead of port output register
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The ANL and ORL instructions for P2 read the port status and apply the logical
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operation on this value. Instead, they should read the port output register
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and operate on this value.
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Fixed in p2.vhd 1.5
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Regression test:
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white_box/p2_port_reg_conflict
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Fix will be included in next release.
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******************************************************************************
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Counter is not incremented
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When in counter mode, the timer/counter module does not increment upon a
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falling edge of T1. Reason is a typo in the code for the edge detection signal
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t1_inc_s - it will never become true.
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Fixed in timer.vhd 1.3
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Regression tests:
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black_box/cnt/cnt
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black_box/cnt/int
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Fix will be included in next release.
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