OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [README] - Blame information for rev 114

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 114 arniml
 
2
README for the T48 uController project
3
======================================
4
Version: $Date: 2004-05-27 20:37:08 $
5
 
6
 
7
Introduction
8
------------
9
 
10
The T48 µController core an is implementation of the MCS-48 microcontroller
11
family architecture. While being a controller core for SoC, it also aims for
12
code-compatability and cycle-accuracy so that it can be used as a drop-in
13
replacement for any MCS-48 controller.
14
It can be configured to better suit the requirements and characteristics of
15
the integrating system. On the other hand, nearly the full functionality of a
16
stock 8048/8049 is available.
17
 
18
 
19
Download
20
--------
21
 
22
Download the latest stable release from the project homepage at OpenCores.org:
23
 
24
  http://www.opencores.org/projects.cgi/web/t48/overview/
25
 
26
You can get the latest version of the design files from CVS:
27
 
28
  http://www.opencores.org/pdownloads.cgi/list/t48
29
 
30
Please keep in mind that this is work in progress and might contain smaller or
31
bigger problems.
32
You should also check the Tracker for known bugs and see if they affect your
33
work.
34
 
35
 
36
Installation
37
------------
38
 
39
Once the directory structure is generated either by check-out from CVS or by
40
unpacking the tar-archive, the central project initialization file should be
41
set up. A template called init_project.template.sh is located in the sw
42
directory where a copy can be edited. Normally, only the definition for the
43
variable PROJECT_DIR has to be adjusted to the path where the directory
44
structure is located.
45
The commands for setting the necessary variables assume a bash/sh-like
46
shell. In case you run a different shell like csh or ksh, you should adjust
47
these commands as well.
48
 
49
The meaning of the variables is as follows:
50
 
51
  * PROJECT_DIR
52
    Points to the root of the project installation. All further references are
53
    derived from its setting.
54
 
55
  * VERIF_DIR
56
    Location of the verification suite.
57
 
58
  * SIM_DIR
59
    Directory for running simulations.
60
 
61
These variables must be properly set whenever scripts or makefiles of the T48
62
project are executed. Otherwise, you will most likely encounter error
63
messages.
64
 
65
NOTE: The concepts of the mentioned shells require that the init_project.sh is
66
      run in the context of the shell. I.e. you should 'source' the script
67
      instead of executing it like a command. This will make sure that the
68
      variable settings are really effective in the calling shell instance.
69
 
70
 
71
Directory Structure
72
-------------------
73
 
74
The project's directory structure follows the proposal of OpenCores.org.
75
 
76
t48
77
 |
78
 \--+-- rtl
79
    |    |
80
    |    \-- vhdl           : VHDL code containing the RTL description
81
    |         |               of the core.
82
    |         \-- system    : RTL VHDL code of sample systems.
83
    |
84
    +-- bench
85
    |    |
86
    |    \-- vhdl           : VHDL testbench code.
87
    |
88
    +-- sim
89
    |    |
90
    |    \-- rtl_sim        : Directory for running simulations.
91
    |
92
    \-- sw                  : General purpose scripts and files.
93
         |
94
         +-- i8039emu       : An MCS-48 emulator written in C.
95
         |
96
         \-- verif          : The verification suite.
97
              |
98
              +-- include   : Global includes and makefiles.
99
              |
100
              +-- black_box : Black-box verification tests.
101
              |
102
              +-- white_box : White-box verification tests.
103
              |
104
              \-- gp_sw     : General purpose software.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.