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[/] [t48/] [tags/] [rel_1_0/] [sim/] [rtl_sim/] [Makefile.hier] - Blame information for rev 9

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Line No. Rev Author Line
1 9 arniml
 
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SOURCE_DIR = ../..
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RTL_DIR   = $(SOURCE_DIR)/rtl/vhdl
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BENCH_DIR = $(SOURCE_DIR)/bench/vhdl
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$(LIB_WORK):
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        $(MAKE_LIB)
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.PHONY: clean
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clean:
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        $(CLEAN); \
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        rm -rf *~ tb_behav_c0 tb_t8048_behav_c0
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.PHONY: analyze
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analyze: $(LIB_WORK) $(tb_behav_c0) $(tb_t8048_behav_c0)
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$(alu) : $(RTL_DIR)/alu.vhd \
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                $(alu_pack) \
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                $(t48_pack) \
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                $(t48_tb_pack)
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        $(ANALYZE) $(RTL_DIR)/alu.vhd
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$(alu_pack) : $(RTL_DIR)/alu_pack-p.vhd \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/alu_pack-p.vhd
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$(alu_rtl_c0) : $(RTL_DIR)/alu-c.vhd \
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                $(alu)
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        $(ANALYZE) $(RTL_DIR)/alu-c.vhd
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$(bus_mux) : $(RTL_DIR)/bus_mux.vhd \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/bus_mux.vhd
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$(bus_mux_rtl_c0) : $(RTL_DIR)/bus_mux-c.vhd \
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                $(bus_mux-rtl) \
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                $(bus_mux)
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        $(ANALYZE) $(RTL_DIR)/bus_mux-c.vhd
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$(clock_ctrl) : $(RTL_DIR)/clock_ctrl.vhd \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/clock_ctrl.vhd
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$(clock_ctrl_rtl_c0) : $(RTL_DIR)/clock_ctrl-c.vhd \
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                $(clock_ctrl)
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        $(ANALYZE) $(RTL_DIR)/clock_ctrl-c.vhd
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$(cond_branch) : $(RTL_DIR)/cond_branch.vhd \
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                $(cond_branch_pack) \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/cond_branch.vhd
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$(cond_branch_pack) : $(RTL_DIR)/cond_branch_pack-p.vhd
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        $(ANALYZE) $(RTL_DIR)/cond_branch_pack-p.vhd
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$(cond_branch_rtl_c0) : $(RTL_DIR)/cond_branch-c.vhd \
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                $(cond_branch)
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        $(ANALYZE) $(RTL_DIR)/cond_branch-c.vhd
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$(db_bus) : $(RTL_DIR)/db_bus.vhd \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/db_bus.vhd
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$(db_bus_rtl_c0) : $(RTL_DIR)/db_bus-c.vhd \
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                $(db_bus)
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        $(ANALYZE) $(RTL_DIR)/db_bus-c.vhd
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$(decoder) : $(RTL_DIR)/decoder.vhd \
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                $(pmem_ctrl_pack) \
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                $(dmem_ctrl_pack) \
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                $(cond_branch_pack) \
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                $(alu_pack) \
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                $(t48_pack) \
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                $(t48_comp_pack) \
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                $(decoder_pack)
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        $(ANALYZE) $(RTL_DIR)/decoder.vhd
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$(decoder_pack) : $(RTL_DIR)/decoder_pack-p.vhd
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        $(ANALYZE) $(RTL_DIR)/decoder_pack-p.vhd
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$(decoder_rtl_c0) : $(RTL_DIR)/decoder-c.vhd \
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                $(opc_decoder_rtl_c0) \
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                $(int_rtl_c0) \
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                $(decoder)
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        $(ANALYZE) $(RTL_DIR)/decoder-c.vhd
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$(dmem_ctrl) : $(RTL_DIR)/dmem_ctrl.vhd \
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                $(dmem_ctrl_pack) \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/dmem_ctrl.vhd
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$(dmem_ctrl_pack) : $(RTL_DIR)/dmem_ctrl_pack-p.vhd
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        $(ANALYZE) $(RTL_DIR)/dmem_ctrl_pack-p.vhd
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$(dmem_ctrl_rtl_c0) : $(RTL_DIR)/dmem_ctrl-c.vhd \
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                $(dmem_ctrl)
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        $(ANALYZE) $(RTL_DIR)/dmem_ctrl-c.vhd
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$(int) : $(RTL_DIR)/int.vhd \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/int.vhd
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$(int_rtl_c0) : $(RTL_DIR)/int-c.vhd \
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                $(int)
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        $(ANALYZE) $(RTL_DIR)/int-c.vhd
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$(lpm_ram_dq) : $(RTL_DIR)/system/lpm_ram_dq.vhd
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        $(ANALYZE) $(RTL_DIR)/system/lpm_ram_dq.vhd
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$(lpm_rom) : $(RTL_DIR)/system/lpm_rom.vhd
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        $(ANALYZE) $(RTL_DIR)/system/lpm_rom.vhd
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$(opc_decoder) : $(RTL_DIR)/opc_decoder.vhd \
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                $(decoder_pack) \
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                $(t48_pack) \
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                $(pmem_ctrl_pack) \
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                $(dmem_ctrl_pack) \
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                $(cond_branch_pack) \
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                $(alu_pack) \
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                $(t48_comp_pack)
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        $(ANALYZE) $(RTL_DIR)/opc_decoder.vhd
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$(opc_decoder_rtl_c0) : $(RTL_DIR)/opc_decoder-c.vhd \
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                $(opc_table_rtl_c0) \
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                $(opc_decoder)
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        $(ANALYZE) $(RTL_DIR)/opc_decoder-c.vhd
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$(opc_table) : $(RTL_DIR)/opc_table.vhd \
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                $(decoder_pack) \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/opc_table.vhd
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$(opc_table_rtl_c0) : $(RTL_DIR)/opc_table-c.vhd \
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                $(opc_table)
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        $(ANALYZE) $(RTL_DIR)/opc_table-c.vhd
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$(p1) : $(RTL_DIR)/p1.vhd \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/p1.vhd
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$(p1_rtl_c0) : $(RTL_DIR)/p1-c.vhd \
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                $(p1)
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        $(ANALYZE) $(RTL_DIR)/p1-c.vhd
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$(p2) : $(RTL_DIR)/p2.vhd \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/p2.vhd
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$(p2_rtl_c0) : $(RTL_DIR)/p2-c.vhd \
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                $(p2)
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        $(ANALYZE) $(RTL_DIR)/p2-c.vhd
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$(pmem_ctrl) : $(RTL_DIR)/pmem_ctrl.vhd \
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                $(pmem_ctrl_pack) \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/pmem_ctrl.vhd
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$(pmem_ctrl_pack) : $(RTL_DIR)/pmem_ctrl_pack-p.vhd
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        $(ANALYZE) $(RTL_DIR)/pmem_ctrl_pack-p.vhd
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$(pmem_ctrl_rtl_c0) : $(RTL_DIR)/pmem_ctrl-c.vhd \
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                $(pmem_ctrl)
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        $(ANALYZE) $(RTL_DIR)/pmem_ctrl-c.vhd
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$(psw) : $(RTL_DIR)/psw.vhd \
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                $(t48_pack)
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        $(ANALYZE) $(RTL_DIR)/psw.vhd
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$(psw_rtl_c0) : $(RTL_DIR)/psw-c.vhd \
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                $(psw)
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        $(ANALYZE) $(RTL_DIR)/psw-c.vhd
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$(syn_ram) : $(RTL_DIR)/system/syn_ram-e.vhd
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        $(ANALYZE) $(RTL_DIR)/system/syn_ram-e.vhd
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$(syn_ram-lpm-a) : $(RTL_DIR)/system/syn_ram-lpm-a.vhd \
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                $(syn_ram)
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        $(ANALYZE) $(RTL_DIR)/system/syn_ram-lpm-a.vhd
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$(syn_ram_lpm_c0) : $(RTL_DIR)/system/syn_ram-lpm-c.vhd \
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                $(lpm_ram_dq) \
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                $(syn_ram-lpm-a)
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        $(ANALYZE) $(RTL_DIR)/system/syn_ram-lpm-c.vhd
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$(syn_rom) : $(RTL_DIR)/system/syn_rom-e.vhd
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        $(ANALYZE) $(RTL_DIR)/system/syn_rom-e.vhd
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$(syn_rom-lpm-a) : $(RTL_DIR)/system/syn_rom-lpm-a.vhd \
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                $(syn_rom)
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        $(ANALYZE) $(RTL_DIR)/system/syn_rom-lpm-a.vhd
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$(syn_rom_lpm_c0) : $(RTL_DIR)/system/syn_rom-lpm-c.vhd \
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                $(lpm_rom) \
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                $(syn_rom-lpm-a)
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        $(ANALYZE) $(RTL_DIR)/system/syn_rom-lpm-c.vhd
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$(t48_comp_pack) : $(RTL_DIR)/t48_comp_pack-p.vhd \
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                $(pmem_ctrl_pack) \
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                $(dmem_ctrl_pack) \
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                $(decoder_pack) \
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                $(cond_branch_pack) \
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                $(t48_pack) \
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                $(alu_pack)
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        $(ANALYZE) $(RTL_DIR)/t48_comp_pack-p.vhd
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$(t48_core) : $(RTL_DIR)/t48_core.vhd \
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                $(decoder_pack) \
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                $(t48_comp_pack) \
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                $(pmem_ctrl_pack) \
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                $(dmem_ctrl_pack) \
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                $(cond_branch_pack) \
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                $(t48_pack) \
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                $(alu_pack)
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        $(ANALYZE) $(RTL_DIR)/t48_core.vhd
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$(t48_core_comp_pack) : $(RTL_DIR)/t48_core_comp_pack-p.vhd
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        $(ANALYZE) $(RTL_DIR)/t48_core_comp_pack-p.vhd
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$(t48_core_struct_c0) : $(RTL_DIR)/t48_core-c.vhd \
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                $(psw_rtl_c0) \
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                $(pmem_ctrl_rtl_c0) \
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                $(p2_rtl_c0) \
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                $(p1_rtl_c0) \
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                $(timer_rtl_c0) \
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                $(dmem_ctrl_rtl_c0) \
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                $(decoder_rtl_c0) \
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                $(db_bus_rtl_c0) \
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                $(cond_branch_rtl_c0) \
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                $(clock_ctrl_rtl_c0) \
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                $(bus_mux_rtl_c0) \
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                $(alu_rtl_c0) \
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                $(decoder_pack) \
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                $(t48_comp_pack) \
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                $(pmem_ctrl_pack) \
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                $(dmem_ctrl_pack) \
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                $(cond_branch_pack) \
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                $(t48_pack) \
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                $(alu_pack) \
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                $(t48_core-struct) \
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                $(t48_core)
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        $(ANALYZE) $(RTL_DIR)/t48_core-c.vhd
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$(t48_pack) : $(RTL_DIR)/t48_pack-p.vhd
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        $(ANALYZE) $(RTL_DIR)/t48_pack-p.vhd
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$(t48_tb_pack) : $(RTL_DIR)/t48_tb_pack-p.vhd
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        $(ANALYZE) $(RTL_DIR)/t48_tb_pack-p.vhd
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$(t8048) : $(RTL_DIR)/system/t8048.vhd \
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                $(t48_core_comp_pack)
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        $(ANALYZE) $(RTL_DIR)/system/t8048.vhd
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$(t8048_struct_c0) : $(RTL_DIR)/system/t8048-c.vhd \
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                $(t48_core_struct_c0) \
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                $(syn_ram_lpm_c0) \
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                $(syn_rom_lpm_c0) \
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                $(clk_gen_rtl_c0) \
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                $(t48_core_comp_pack) \
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                $(t8048-struct) \
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                $(t8048)
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        $(ANALYZE) $(RTL_DIR)/system/t8048-c.vhd
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$(tb) : $(BENCH_DIR)/tb.vhd \
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                $(t48_tb_pack) \
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                $(t48_core_comp_pack)
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        $(ANALYZE) $(BENCH_DIR)/tb.vhd
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$(tb_behav_c0) : $(BENCH_DIR)/tb-c.vhd \
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                $(t48_core_struct_c0) \
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                $(syn_ram_lpm_c0) \
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                $(syn_rom_lpm_c0) \
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                $(t48_tb_pack) \
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                $(t48_core_comp_pack) \
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                $(tb-behav) \
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                $(tb)
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        $(ANALYZE) $(BENCH_DIR)/tb-c.vhd
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$(tb_t8048) : $(BENCH_DIR)/tb_t8048.vhd \
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                $(t48_tb_pack) \
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                $(t48_core_comp_pack)
284
        $(ANALYZE) $(BENCH_DIR)/tb_t8048.vhd
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$(tb_t8048_behav_c0) : $(BENCH_DIR)/tb_t8048-c.vhd \
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                $(t8048_struct_c0) \
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                $(syn_ram_lpm_c0) \
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                $(t48_tb_pack) \
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                $(t48_core_comp_pack) \
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                $(tb_t8048-behav) \
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                $(tb_t8048)
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        $(ANALYZE) $(BENCH_DIR)/tb_t8048-c.vhd
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$(timer) : $(RTL_DIR)/timer.vhd \
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                $(t48_pack)
297
        $(ANALYZE) $(RTL_DIR)/timer.vhd
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$(timer_rtl_c0) : $(RTL_DIR)/timer-c.vhd \
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                $(timer-rtl) \
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                $(t48_pack) \
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                $(timer)
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        $(ANALYZE) $(RTL_DIR)/timer-c.vhd

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