OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [sw/] [verif/] [black_box/] [addc/] [ind_rr/] [test.asm] - Blame information for rev 292

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 12 arniml
        ;; *******************************************************************
2 17 arniml
        ;; $Id: test.asm,v 1.2 2004-03-26 22:33:30 arniml Exp $
3 12 arniml
        ;;
4
        ;; Test ADDC A, @ Rr.
5
        ;; *******************************************************************
6
 
7
        INCLUDE "cpu.inc"
8
        INCLUDE "pass_fail.inc"
9
 
10
testADDC        MACRO   val
11
        jmp     goon
12
        ALIGN   040H
13 17 arniml
goon:   inc     r0
14
        inc     r1
15
        mov     a, #val
16 12 arniml
        addc    a, @r0
17
        jnz     fail
18
        jnc     fail
19
        mov     a, #val
20
        addc    a, @r0
21
        dec     a
22
        jnz     fail
23
        jnc     fail
24
        clr     c
25
        ;;
26
        mov     a, #val
27
        addc    a, @r1
28
        jnz     fail
29
        jnc     fail
30
        mov     a, #val
31
        addc    a, @r1
32
        dec     a
33
        jnz     fail
34
        jnc     fail
35
        clr     c
36
        jmp     pass
37
        ;;
38
fail:   FAIL
39
pass:
40
        ENDM
41
 
42
        ORG     0
43
 
44
        ;; Start of test
45
        mov     r0, #010H
46
        mov     r1, #020H
47
        mov     a, #0FEH
48
        mov     @r0, a
49
        mov     @r1, a
50
        inc     r0
51
        inc     r1
52
        mov     a, #0FDH
53
        mov     @r0, a
54
        mov     @r1, a
55
        inc     r0
56
        inc     r1
57
        mov     a, #0FBH
58
        mov     @r0, a
59
        mov     @r1, a
60
        inc     r0
61
        inc     r1
62
        mov     a, #0F7H
63
        mov     @r0, a
64
        mov     @r1, a
65
        inc     r0
66
        inc     r1
67
        mov     a, #0EFH
68
        mov     @r0, a
69
        mov     @r1, a
70
        inc     r0
71
        inc     r1
72
        mov     a, #0DFH
73
        mov     @r0, a
74
        mov     @r1, a
75
        inc     r0
76
        inc     r1
77
        mov     a, #0BFH
78
        mov     @r0, a
79
        mov     @r1, a
80
        inc     r0
81
        inc     r1
82
        mov     a, #07FH
83
        mov     @r0, a
84
        mov     @r1, a
85
 
86
        ;;
87
        mov     r0, #00FH
88
        mov     r1, #01FH
89
 
90
        testADDC        002H
91
        testADDC        003H
92
        testADDC        005H
93
        testADDC        009H
94
        testADDC        011H
95
        testADDC        021H
96
        testADDC        041H
97
        testADDC        081H
98
 
99
pass:   PASS

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.