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[/] [t48/] [tags/] [rel_1_2/] [sim/] [rtl_sim/] [Makefile.hier] - Blame information for rev 259

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##############################################################################
#
# Core Makefile for the T48 project.
#
# The dependencies for all VHDL source files are stored here.
# Include this file from within the tool-specific Makefile. See
# Makefile.ghdl for an example how to use it.
#
# The following environment/make variables are expected. Set them in the
# tool-specific Makefile or from the shell.
#
#  PROJECT_DIR : Project base directory
#                Set in sw/init_project.sh
#
#  LIB_WORK    : object directory for the work library
#                /t48/sim/rtl_sim/
#
#  MAKE_LIB    : command to create the work library
#
#  ANALYZE     : command calling the tool-specific compiler for analysis of
#                the VHDL code
#
#  CLEAN       : command to clean the tool-object directory
#
#  Various VHDL design units.
#
#
# Copyright (c) 2004-2006, Arnim Laeuger (arniml@opencores.org)
#
# All rights reserved
#
##############################################################################
 
RTL_DIR   = $(PROJECT_DIR)/rtl/vhdl
T8243_DIR = $(RTL_DIR)/t8243
BENCH_DIR = $(PROJECT_DIR)/bench/vhdl
 
 
$(LIB_WORK):
        $(MAKE_LIB)
 
.PHONY: clean
clean:
        $(CLEAN); \
        rm -rf *~
 
.PHONY: analyze
analyze: $(LIB_WORK) $(tb_behav_c0) $(tb_t8048_behav_c0)
 
 
$(alu) : $(RTL_DIR)/alu.vhd   \
                $(alu_pack)   \
                $(t48_pack)   \
                $(t48_tb_pack)
        $(ANALYZE) $<
 
$(alu_pack) : $(RTL_DIR)/alu_pack-p.vhd \
                $(t48_pack)
        $(ANALYZE) $<
 
$(alu_rtl_c0) : $(RTL_DIR)/alu-c.vhd \
                $(alu)
        $(ANALYZE) $<
 
$(bus_mux) : $(RTL_DIR)/bus_mux.vhd \
                $(t48_pack)
        $(ANALYZE) $<
 
$(bus_mux_rtl_c0) : $(RTL_DIR)/bus_mux-c.vhd \
                $(bus_mux-rtl)               \
                $(bus_mux)
        $(ANALYZE) $<
 
$(clock_ctrl) : $(RTL_DIR)/clock_ctrl.vhd \
                $(t48_pack)
        $(ANALYZE) $<
 
$(clock_ctrl_rtl_c0) : $(RTL_DIR)/clock_ctrl-c.vhd \
                $(clock_ctrl)
        $(ANALYZE) $<
 
$(cond_branch) : $(RTL_DIR)/cond_branch.vhd \
                $(cond_branch_pack)         \
                $(t48_pack)
        $(ANALYZE) $<
 
$(cond_branch_pack) : $(RTL_DIR)/cond_branch_pack-p.vhd
        $(ANALYZE) $<
 
$(cond_branch_rtl_c0) : $(RTL_DIR)/cond_branch-c.vhd \
                $(cond_branch)
        $(ANALYZE) $<
 
$(db_bus) : $(RTL_DIR)/db_bus.vhd \
                $(t48_pack)
        $(ANALYZE) $<
 
$(db_bus_rtl_c0) : $(RTL_DIR)/db_bus-c.vhd \
                $(db_bus)
        $(ANALYZE) $<
 
$(decoder) : $(RTL_DIR)/decoder.vhd \
                $(pmem_ctrl_pack)   \
                $(dmem_ctrl_pack)   \
                $(cond_branch_pack) \
                $(alu_pack)         \
                $(t48_pack)         \
                $(t48_comp_pack)    \
                $(t48_tb_pack)      \
                $(decoder_pack)
        $(ANALYZE) $<
 
$(decoder_pack) : $(RTL_DIR)/decoder_pack-p.vhd
        $(ANALYZE) $<
 
$(decoder_rtl_c0) : $(RTL_DIR)/decoder-c.vhd \
                $(opc_decoder_rtl_c0)        \
                $(int_rtl_c0)                \
                $(decoder)
        $(ANALYZE) $<
 
$(dmem_ctrl) : $(RTL_DIR)/dmem_ctrl.vhd \
                $(dmem_ctrl_pack)       \
                $(t48_pack)
        $(ANALYZE) $<
 
$(dmem_ctrl_pack) : $(RTL_DIR)/dmem_ctrl_pack-p.vhd
        $(ANALYZE) $<
 
$(dmem_ctrl_rtl_c0) : $(RTL_DIR)/dmem_ctrl-c.vhd \
                $(dmem_ctrl)
        $(ANALYZE) $<
 
$(int) : $(RTL_DIR)/int.vhd \
                $(t48_pack)
        $(ANALYZE) $<
 
$(int_rtl_c0) : $(RTL_DIR)/int-c.vhd \
                $(int)
        $(ANALYZE) $<
 
$(opc_decoder) : $(RTL_DIR)/opc_decoder.vhd \
                $(decoder_pack)             \
                $(t48_pack)                 \
                $(pmem_ctrl_pack)           \
                $(dmem_ctrl_pack)           \
                $(cond_branch_pack)         \
                $(alu_pack)                 \
                $(t48_comp_pack)
        $(ANALYZE) $<
 
$(opc_decoder_rtl_c0) : $(RTL_DIR)/opc_decoder-c.vhd \
                $(opc_table_rtl_c0) \
                $(opc_decoder)
        $(ANALYZE) $<
 
$(opc_table) : $(RTL_DIR)/opc_table.vhd \
                $(decoder_pack)         \
                $(t48_pack)
        $(ANALYZE) $<
 
$(opc_table_rtl_c0) : $(RTL_DIR)/opc_table-c.vhd \
                $(opc_table)
        $(ANALYZE) $<
 
$(p1) : $(RTL_DIR)/p1.vhd \
                $(t48_pack)
        $(ANALYZE) $<
 
$(p1_rtl_c0) : $(RTL_DIR)/p1-c.vhd \
                $(p1)
        $(ANALYZE) $<
 
$(p2) : $(RTL_DIR)/p2.vhd \
                $(t48_pack)
        $(ANALYZE) $<
 
$(p2_rtl_c0) : $(RTL_DIR)/p2-c.vhd \
                $(p2)
        $(ANALYZE) $<
 
$(pmem_ctrl) : $(RTL_DIR)/pmem_ctrl.vhd \
                $(pmem_ctrl_pack)       \
                $(t48_pack)
        $(ANALYZE) $<
 
$(pmem_ctrl_pack) : $(RTL_DIR)/pmem_ctrl_pack-p.vhd
        $(ANALYZE) $<
 
$(pmem_ctrl_rtl_c0) : $(RTL_DIR)/pmem_ctrl-c.vhd \
                $(pmem_ctrl)
        $(ANALYZE) $<
 
$(psw) : $(RTL_DIR)/psw.vhd \
                $(t48_pack)
        $(ANALYZE) $<
 
$(psw_rtl_c0) : $(RTL_DIR)/psw-c.vhd \
                $(psw)
        $(ANALYZE) $<
 
$(lpm_ram_dq) : $(RTL_DIR)/system/lpm_ram_dq.vhd
        $(ANALYZE) $<
 
$(generic_ram_ena) : $(RTL_DIR)/system/generic_ram_ena.vhd
        $(ANALYZE) $<
$(generic_ram_ena_rtl_c0) : $(RTL_DIR)/system/generic_ram_ena-c.vhd \
                            $(generic_ram_ena)
        $(ANALYZE) $<
 
$(lpm_rom) : $(RTL_DIR)/system/lpm_rom.vhd
        $(ANALYZE) $<
 
$(t48_rom) : $(RTL_DIR)/system/t48_rom-e.vhd
        $(ANALYZE) $<
$(t48_rom_lpm_a) : $(BENCH_DIR)/t48_rom-lpm-a.vhd \
                   $(t48_rom)
        $(ANALYZE) $<
$(t48_rom_lpm_c0) : $(BENCH_DIR)/t48_rom-lpm-c.vhd \
                    $(lpm_rom)                     \
                    $(t48_rom_lpm_a)
        $(ANALYZE) $<
 
$(t49_rom) : $(RTL_DIR)/system/t49_rom-e.vhd
        $(ANALYZE) $<
$(t49_rom_lpm_a) : $(BENCH_DIR)/t49_rom-lpm-a.vhd \
                   $(t49_rom)
        $(ANALYZE) $<
$(t49_rom_lpm_c0) : $(BENCH_DIR)/t49_rom-lpm-c.vhd \
                    $(lpm_rom)                     \
                    $(t49_rom_lpm_a)
        $(ANALYZE) $<
 
$(t48_comp_pack) : $(RTL_DIR)/t48_comp_pack-p.vhd \
                $(pmem_ctrl_pack)                 \
                $(dmem_ctrl_pack)                 \
                $(decoder_pack)                   \
                $(cond_branch_pack)               \
                $(t48_pack)                       \
                $(alu_pack)
        $(ANALYZE) $<
 
$(t48_core) : $(RTL_DIR)/t48_core.vhd \
                $(decoder_pack)       \
                $(t48_comp_pack)      \
                $(pmem_ctrl_pack)     \
                $(dmem_ctrl_pack)     \
                $(cond_branch_pack)   \
                $(t48_pack)           \
                $(alu_pack)
        $(ANALYZE) $<
 
$(t48_core_comp_pack) : $(RTL_DIR)/t48_core_comp_pack-p.vhd
        $(ANALYZE) $<
 
$(t48_core_struct_c0) : $(RTL_DIR)/t48_core-c.vhd \
                $(psw_rtl_c0)                     \
                $(pmem_ctrl_rtl_c0)               \
                $(p2_rtl_c0)                      \
                $(p1_rtl_c0)                      \
                $(timer_rtl_c0)                   \
                $(dmem_ctrl_rtl_c0)               \
                $(decoder_rtl_c0)                 \
                $(db_bus_rtl_c0)                  \
                $(cond_branch_rtl_c0)             \
                $(clock_ctrl_rtl_c0)              \
                $(bus_mux_rtl_c0)                 \
                $(alu_rtl_c0)                     \
                $(decoder_pack)                   \
                $(t48_comp_pack)                  \
                $(pmem_ctrl_pack)                 \
                $(dmem_ctrl_pack)                 \
                $(cond_branch_pack)               \
                $(t48_pack)                       \
                $(alu_pack)                       \
                $(t48_core-struct)                \
                $(t48_core)
        $(ANALYZE) $<
 
$(t48_pack) : $(RTL_DIR)/t48_pack-p.vhd
        $(ANALYZE) $<
 
$(t48_tb_pack) : $(RTL_DIR)/t48_tb_pack-p.vhd
        $(ANALYZE) $<
 
$(t8048_notri) : $(RTL_DIR)/system/t8048_notri.vhd \
                $(t48_core_comp_pack)
        $(ANALYZE) $<
 
$(t8048_notri_struct_c0) : $(RTL_DIR)/system/t8048_notri-c.vhd \
                $(t48_core_struct_c0)                          \
                $(generic_ram_ena_rtl_c0)                      \
                $(t48_rom_lpm_c0)                              \
                $(t48_core_comp_pack)                          \
                $(t8048_notri)
        $(ANALYZE) $<
 
$(t48_system_comp_pack) : $(RTL_DIR)/system/t48_system_comp_pack-p.vhd
        $(ANALYZE) $<
 
$(t8048) : $(RTL_DIR)/system/t8048.vhd \
                $(t48_system_comp_pack)
        $(ANALYZE) $<
 
$(t8048_struct_c0) : $(RTL_DIR)/system/t8048-c.vhd \
                $(t8048_notri_struct_c0)           \
                $(t8048)
        $(ANALYZE) $<
 
$(t8039_notri) : $(RTL_DIR)/system/t8039_notri.vhd \
                $(t48_core_comp_pack)
        $(ANALYZE) $<
 
$(t8039_notri_struct_c0) : $(RTL_DIR)/system/t8039_notri-c.vhd \
                $(t48_core_struct_c0)                          \
                $(generic_ram_ena_rtl_c0)                      \
                $(t8039_notri)
        $(ANALYZE) $<
 
$(t8039) : $(RTL_DIR)/system/t8039.vhd \
                $(t48_system_comp_pack)
        $(ANALYZE) $<
 
$(t8039_struct_c0) : $(RTL_DIR)/system/t8039-c.vhd \
                $(t8039_notri_struct_c0)           \
                $(t8039)
        $(ANALYZE) $<
 
$(if_timing) : $(BENCH_DIR)/if_timing.vhd
        $(ANALYZE) $<
 
$(if_timing_behav_c0) : $(BENCH_DIR)/if_timing-c.vhd \
                $(if_timing)
        $(ANALYZE) $<
 
$(tb) : $(BENCH_DIR)/tb.vhd           \
                $(t48_tb_pack)        \
                $(t48_core_comp_pack)
        $(ANALYZE) $<
 
$(tb_behav_c0) : $(BENCH_DIR)/tb-c.vhd    \
                $(if_timing_behav_c0)     \
                $(t48_core_struct_c0)     \
                $(generic_ram_ena_rtl_c0) \
                $(lpm_rom)                \
                $(t48_tb_pack)            \
                $(t48_core_comp_pack)     \
                $(tb)
        $(ANALYZE) $<
 
$(tb_t8039) : $(BENCH_DIR)/tb_t8039.vhd \
                $(t48_tb_pack)          \
                $(t48_core_comp_pack)   \
                $(t48_system_comp_pack)
        $(ANALYZE) $<
 
$(tb_t8039_behav_c0) : $(BENCH_DIR)/tb_t8039-c.vhd \
                $(t8039_struct_c0)                 \
                $(generic_ram_rtl_c0)              \
                $(lpm_rom)                         \
                $(t48_tb_pack)                     \
                $(tb_t8039)
        $(ANALYZE) $<
 
$(tb_t8048) : $(BENCH_DIR)/tb_t8048.vhd \
                $(t48_tb_pack)          \
                $(t48_core_comp_pack)   \
                $(t48_system_comp_pack)
        $(ANALYZE) $<
 
$(tb_t8048_behav_c0) : $(BENCH_DIR)/tb_t8048-c.vhd \
                $(t8048_struct_c0)                 \
                $(generic_ram_ena_rtl_c0)          \
                $(lpm_rom)                         \
                $(t48_tb_pack)                     \
                $(tb_t8048)
        $(ANALYZE) $<
 
$(timer) : $(RTL_DIR)/timer.vhd \
                $(t48_pack)
        $(ANALYZE) $<
 
$(timer_rtl_c0) : $(RTL_DIR)/timer-c.vhd \
                $(timer-rtl)             \
                $(t48_pack)              \
                $(timer)
        $(ANALYZE) $<
 
$(t8243_comp_pack) : $(T8243_DIR)/t8243_comp_pack-p.vhd
        $(ANALYZE) $<
 
$(t8243_core) : $(T8243_DIR)/t8243_core.vhd
        $(ANALYZE) $<
 
$(t8243_core_rtl_c0) : $(T8243_DIR)/t8243_core-c.vhd \
                       $(t8243_core)
        $(ANALYZE) $<
 
$(t8243_sync_notri) : $(T8243_DIR)/t8243_sync_notri.vhd \
                      $(t8243_comp_pack)
        $(ANALYZE) $<
 
$(t8243_sync_notri_struct_c0) : $(T8243_DIR)/t8243_sync_notri-c.vhd \
                                $(t8243_core_rtl_c0)                \
                                $(t8243_sync_notri)
        $(ANALYZE) $<
 
$(t8243_async_notri) : $(T8243_DIR)/t8243_async_notri.vhd \
                       $(t8243_comp_pack)
        $(ANALYZE) $<
 
$(t8243_async_notri_struct_c0) : $(T8243_DIR)/t8243_async_notri-c.vhd \
                                 $(t8243_core_rtl_c0)                 \
                                 $(t8243_async_notri)
        $(ANALYZE) $<
 
$(t8243) : $(T8243_DIR)/t8243.vhd \
           $(t8243_comp_pack)
        $(ANALYZE) $<
 
$(t8243_struct_c0) : $(T8243_DIR)/t8243-c.vhd       \
                     $(t8243_async_notri_struct_c0) \
                     $(t8243)
        $(ANALYZE) $<
 
$(tb_t8048_t8243) : $(BENCH_DIR)/tb_t8048_t8243.vhd \
                    $(t48_tb_pack)                  \
                    $(t48_core_comp_pack)           \
                    $(t48_system_comp_pack)         \
                    $(t8243_comp_pack)
        $(ANALYZE) $<
 
$(tb_t8048_t8243_behav_c0) : $(BENCH_DIR)/tb_t8048_t8243-c.vhd \
                             $(t8048_struct_c0)                \
                             $(t8243_struct_c0)                \
                             $(generic_ram_ena_rtl_c0)         \
                             $(lpm_rom)                        \
                             $(t48_tb_pack)                    \
                             $(tb_t8048_t8243)
        $(ANALYZE) $<
 
$(tb_t8243) : $(BENCH_DIR)/tb_t8243.vhd \
              $(t48_tb_pack)            \
              $(t48_core_comp_pack)     \
              $(t8243_comp_pack)
        $(ANALYZE) $<
 
$(tb_t8243_behav_c0) : $(BENCH_DIR)/tb_t8243-c.vhd   \
                       $(if_timing_behav_c0)         \
                       $(t48_core_struct_c0)         \
                       $(t8243_sync_notri_struct_c0) \
                       $(generic_ram_ena_rtl_c0)     \
                       $(lpm_rom)                    \
                       $(t48_tb_pack)                \
                       $(t48_core_comp_pack)         \
                       $(tb_t8243)
        $(ANALYZE) $<

Line No.	Rev	Author	Line
1	11	arniml	`##############################################################################`
2			`#`
3			`# Core Makefile for the T48 project.`
4			`#`
5			`# The dependencies for all VHDL source files are stored here.`
6			`# Include this file from within the tool-specific Makefile. See`
7			`# Makefile.ghdl for an example how to use it.`
8			`#`
9			`# The following environment/make variables are expected. Set them in the`
10			`# tool-specific Makefile or from the shell.`
11			`#`
12	31	arniml	`# PROJECT_DIR : Project base directory`
13			`# Set in sw/init_project.sh`
14	11	arniml	`#`
15	31	arniml	`# LIB_WORK : object directory for the work library`
16			`# /t48/sim/rtl_sim/`
17	11	arniml	`#`
18	31	arniml	`# MAKE_LIB : command to create the work library`
19	11	arniml	`#`
20	31	arniml	`# ANALYZE : command calling the tool-specific compiler for analysis of`
21			`# the VHDL code`
22	11	arniml	`#`
23	31	arniml	`# CLEAN : command to clean the tool-object directory`
24	11	arniml	`#`
25			`# Various VHDL design units.`
26			`#`
27			`#`
28	218	arniml	`# Copyright (c) 2004-2006, Arnim Laeuger (arniml@opencores.org)`
29	11	arniml	`#`
30			`# All rights reserved`
31			`#`
32			`##############################################################################`
33	9	arniml
34	31	arniml	`RTL_DIR = $(PROJECT_DIR)/rtl/vhdl`
35	259	arniml	`T8243_DIR = $(RTL_DIR)/t8243`
36	31	arniml	`BENCH_DIR = $(PROJECT_DIR)/bench/vhdl`
37	9	arniml
38
39			`$(LIB_WORK):`
40			`$(MAKE_LIB)`
41
42			`.PHONY: clean`
43			`clean:`
44			`$(CLEAN); \`
45	71	arniml	`rm -rf *~`
46	9	arniml
47			`.PHONY: analyze`
48			`analyze: $(LIB_WORK) $(tb_behav_c0) $(tb_t8048_behav_c0)`
49
50
51	232	arniml	`$(alu) : $(RTL_DIR)/alu.vhd \`
52			`$(alu_pack) \`
53			`$(t48_pack) \`
54	9	arniml	`$(t48_tb_pack)`
55	218	arniml	`$(ANALYZE) $<`
56	9	arniml
57			`$(alu_pack) : $(RTL_DIR)/alu_pack-p.vhd \`
58			`$(t48_pack)`
59	218	arniml	`$(ANALYZE) $<`
60	9	arniml
61			`$(alu_rtl_c0) : $(RTL_DIR)/alu-c.vhd \`
62			`$(alu)`
63	218	arniml	`$(ANALYZE) $<`
64	9	arniml
65			`$(bus_mux) : $(RTL_DIR)/bus_mux.vhd \`
66			`$(t48_pack)`
67	218	arniml	`$(ANALYZE) $<`
68	9	arniml
69			`$(bus_mux_rtl_c0) : $(RTL_DIR)/bus_mux-c.vhd \`
70	232	arniml	`$(bus_mux-rtl) \`
71	9	arniml	`$(bus_mux)`
72	218	arniml	`$(ANALYZE) $<`
73	9	arniml
74			`$(clock_ctrl) : $(RTL_DIR)/clock_ctrl.vhd \`
75			`$(t48_pack)`
76	218	arniml	`$(ANALYZE) $<`
77	9	arniml
78			`$(clock_ctrl_rtl_c0) : $(RTL_DIR)/clock_ctrl-c.vhd \`
79			`$(clock_ctrl)`
80	218	arniml	`$(ANALYZE) $<`
81	9	arniml
82			`$(cond_branch) : $(RTL_DIR)/cond_branch.vhd \`
83	232	arniml	`$(cond_branch_pack) \`
84	9	arniml	`$(t48_pack)`
85	218	arniml	`$(ANALYZE) $<`
86	9	arniml
87			`$(cond_branch_pack) : $(RTL_DIR)/cond_branch_pack-p.vhd`
88	218	arniml	`$(ANALYZE) $<`
89	9	arniml
90			`$(cond_branch_rtl_c0) : $(RTL_DIR)/cond_branch-c.vhd \`
91			`$(cond_branch)`
92	218	arniml	`$(ANALYZE) $<`
93	9	arniml
94			`$(db_bus) : $(RTL_DIR)/db_bus.vhd \`
95			`$(t48_pack)`
96	218	arniml	`$(ANALYZE) $<`
97	9	arniml
98			`$(db_bus_rtl_c0) : $(RTL_DIR)/db_bus-c.vhd \`
99			`$(db_bus)`
100	218	arniml	`$(ANALYZE) $<`
101	9	arniml
102			`$(decoder) : $(RTL_DIR)/decoder.vhd \`
103	232	arniml	`$(pmem_ctrl_pack) \`
104			`$(dmem_ctrl_pack) \`
105	9	arniml	`$(cond_branch_pack) \`
106	232	arniml	`$(alu_pack) \`
107			`$(t48_pack) \`
108			`$(t48_comp_pack) \`
109			`$(t48_tb_pack) \`
110	9	arniml	`$(decoder_pack)`
111	218	arniml	`$(ANALYZE) $<`
112	9	arniml
113			`$(decoder_pack) : $(RTL_DIR)/decoder_pack-p.vhd`
114	218	arniml	`$(ANALYZE) $<`
115	9	arniml
116			`$(decoder_rtl_c0) : $(RTL_DIR)/decoder-c.vhd \`
117	232	arniml	`$(opc_decoder_rtl_c0) \`
118			`$(int_rtl_c0) \`
119	9	arniml	`$(decoder)`
120	218	arniml	`$(ANALYZE) $<`
121	9	arniml
122			`$(dmem_ctrl) : $(RTL_DIR)/dmem_ctrl.vhd \`
123	232	arniml	`$(dmem_ctrl_pack) \`
124	9	arniml	`$(t48_pack)`
125	218	arniml	`$(ANALYZE) $<`
126	9	arniml
127			`$(dmem_ctrl_pack) : $(RTL_DIR)/dmem_ctrl_pack-p.vhd`
128	218	arniml	`$(ANALYZE) $<`
129	9	arniml
130			`$(dmem_ctrl_rtl_c0) : $(RTL_DIR)/dmem_ctrl-c.vhd \`
131			`$(dmem_ctrl)`
132	218	arniml	`$(ANALYZE) $<`
133	9	arniml
134			`$(int) : $(RTL_DIR)/int.vhd \`
135			`$(t48_pack)`
136	218	arniml	`$(ANALYZE) $<`
137	9	arniml
138			`$(int_rtl_c0) : $(RTL_DIR)/int-c.vhd \`
139			`$(int)`
140	218	arniml	`$(ANALYZE) $<`
141	9	arniml
142			`$(opc_decoder) : $(RTL_DIR)/opc_decoder.vhd \`
143	232	arniml	`$(decoder_pack) \`
144			`$(t48_pack) \`
145			`$(pmem_ctrl_pack) \`
146			`$(dmem_ctrl_pack) \`
147			`$(cond_branch_pack) \`
148			`$(alu_pack) \`
149	9	arniml	`$(t48_comp_pack)`
150	218	arniml	`$(ANALYZE) $<`
151	9	arniml
152			`$(opc_decoder_rtl_c0) : $(RTL_DIR)/opc_decoder-c.vhd \`
153			`$(opc_table_rtl_c0) \`
154			`$(opc_decoder)`
155	218	arniml	`$(ANALYZE) $<`
156	9	arniml
157			`$(opc_table) : $(RTL_DIR)/opc_table.vhd \`
158	232	arniml	`$(decoder_pack) \`
159	9	arniml	`$(t48_pack)`
160	218	arniml	`$(ANALYZE) $<`
161	9	arniml
162			`$(opc_table_rtl_c0) : $(RTL_DIR)/opc_table-c.vhd \`
163			`$(opc_table)`
164	218	arniml	`$(ANALYZE) $<`
165	9	arniml
166			`$(p1) : $(RTL_DIR)/p1.vhd \`
167			`$(t48_pack)`
168	218	arniml	`$(ANALYZE) $<`
169	9	arniml
170			`$(p1_rtl_c0) : $(RTL_DIR)/p1-c.vhd \`
171			`$(p1)`
172	218	arniml	`$(ANALYZE) $<`
173	9	arniml
174			`$(p2) : $(RTL_DIR)/p2.vhd \`
175			`$(t48_pack)`
176	218	arniml	`$(ANALYZE) $<`
177	9	arniml
178			`$(p2_rtl_c0) : $(RTL_DIR)/p2-c.vhd \`
179			`$(p2)`
180	218	arniml	`$(ANALYZE) $<`
181	9	arniml
182			`$(pmem_ctrl) : $(RTL_DIR)/pmem_ctrl.vhd \`
183	232	arniml	`$(pmem_ctrl_pack) \`
184	9	arniml	`$(t48_pack)`
185	218	arniml	`$(ANALYZE) $<`
186	9	arniml
187			`$(pmem_ctrl_pack) : $(RTL_DIR)/pmem_ctrl_pack-p.vhd`
188	218	arniml	`$(ANALYZE) $<`
189	9	arniml
190			`$(pmem_ctrl_rtl_c0) : $(RTL_DIR)/pmem_ctrl-c.vhd \`
191			`$(pmem_ctrl)`
192	218	arniml	`$(ANALYZE) $<`
193	9	arniml
194			`$(psw) : $(RTL_DIR)/psw.vhd \`
195			`$(t48_pack)`
196	218	arniml	`$(ANALYZE) $<`
197	9	arniml
198			`$(psw_rtl_c0) : $(RTL_DIR)/psw-c.vhd \`
199			`$(psw)`
200	218	arniml	`$(ANALYZE) $<`
201	9	arniml
202	232	arniml	`$(lpm_ram_dq) : $(RTL_DIR)/system/lpm_ram_dq.vhd`
203	218	arniml	`$(ANALYZE) $<`
204	9	arniml
205	232	arniml	`$(generic_ram_ena) : $(RTL_DIR)/system/generic_ram_ena.vhd`
206	218	arniml	`$(ANALYZE) $<`
207	232	arniml	`$(generic_ram_ena_rtl_c0) : $(RTL_DIR)/system/generic_ram_ena-c.vhd \`
208			`$(generic_ram_ena)`
209	218	arniml	`$(ANALYZE) $<`
210	9	arniml
211	232	arniml	`$(lpm_rom) : $(RTL_DIR)/system/lpm_rom.vhd`
212	218	arniml	`$(ANALYZE) $<`
213	9	arniml
214	232	arniml	`$(t48_rom) : $(RTL_DIR)/system/t48_rom-e.vhd`
215	218	arniml	`$(ANALYZE) $<`
216	232	arniml	`$(t48_rom_lpm_a) : $(BENCH_DIR)/t48_rom-lpm-a.vhd \`
217			`$(t48_rom)`
218			`$(ANALYZE) $<`
219			`$(t48_rom_lpm_c0) : $(BENCH_DIR)/t48_rom-lpm-c.vhd \`
220			`$(lpm_rom) \`
221			`$(t48_rom_lpm_a)`
222			`$(ANALYZE) $<`
223	9	arniml
224	232	arniml	`$(t49_rom) : $(RTL_DIR)/system/t49_rom-e.vhd`
225	218	arniml	`$(ANALYZE) $<`
226	232	arniml	`$(t49_rom_lpm_a) : $(BENCH_DIR)/t49_rom-lpm-a.vhd \`
227			`$(t49_rom)`
228			`$(ANALYZE) $<`
229			`$(t49_rom_lpm_c0) : $(BENCH_DIR)/t49_rom-lpm-c.vhd \`
230			`$(lpm_rom) \`
231			`$(t49_rom_lpm_a)`
232			`$(ANALYZE) $<`
233	9	arniml
234			`$(t48_comp_pack) : $(RTL_DIR)/t48_comp_pack-p.vhd \`
235	232	arniml	`$(pmem_ctrl_pack) \`
236			`$(dmem_ctrl_pack) \`
237			`$(decoder_pack) \`
238			`$(cond_branch_pack) \`
239			`$(t48_pack) \`
240	9	arniml	`$(alu_pack)`
241	218	arniml	`$(ANALYZE) $<`
242	9	arniml
243			`$(t48_core) : $(RTL_DIR)/t48_core.vhd \`
244	232	arniml	`$(decoder_pack) \`
245			`$(t48_comp_pack) \`
246			`$(pmem_ctrl_pack) \`
247			`$(dmem_ctrl_pack) \`
248			`$(cond_branch_pack) \`
249			`$(t48_pack) \`
250	9	arniml	`$(alu_pack)`
251	218	arniml	`$(ANALYZE) $<`
252	9	arniml
253			`$(t48_core_comp_pack) : $(RTL_DIR)/t48_core_comp_pack-p.vhd`
254	218	arniml	`$(ANALYZE) $<`
255	9	arniml
256			`$(t48_core_struct_c0) : $(RTL_DIR)/t48_core-c.vhd \`
257	232	arniml	`$(psw_rtl_c0) \`
258			`$(pmem_ctrl_rtl_c0) \`
259			`$(p2_rtl_c0) \`
260			`$(p1_rtl_c0) \`
261			`$(timer_rtl_c0) \`
262			`$(dmem_ctrl_rtl_c0) \`
263			`$(decoder_rtl_c0) \`
264			`$(db_bus_rtl_c0) \`
265			`$(cond_branch_rtl_c0) \`
266			`$(clock_ctrl_rtl_c0) \`
267			`$(bus_mux_rtl_c0) \`
268			`$(alu_rtl_c0) \`
269			`$(decoder_pack) \`
270			`$(t48_comp_pack) \`
271			`$(pmem_ctrl_pack) \`
272			`$(dmem_ctrl_pack) \`
273			`$(cond_branch_pack) \`
274			`$(t48_pack) \`
275			`$(alu_pack) \`
276			`$(t48_core-struct) \`
277	9	arniml	`$(t48_core)`
278	218	arniml	`$(ANALYZE) $<`
279	9	arniml
280			`$(t48_pack) : $(RTL_DIR)/t48_pack-p.vhd`
281	218	arniml	`$(ANALYZE) $<`
282	9	arniml
283			`$(t48_tb_pack) : $(RTL_DIR)/t48_tb_pack-p.vhd`
284	218	arniml	`$(ANALYZE) $<`
285	9	arniml
286	151	arniml	`$(t8048_notri) : $(RTL_DIR)/system/t8048_notri.vhd \`
287	9	arniml	`$(t48_core_comp_pack)`
288	218	arniml	`$(ANALYZE) $<`
289	9	arniml
290	151	arniml	`$(t8048_notri_struct_c0) : $(RTL_DIR)/system/t8048_notri-c.vhd \`
291	232	arniml	`$(t48_core_struct_c0) \`
292			`$(generic_ram_ena_rtl_c0) \`
293			`$(t48_rom_lpm_c0) \`
294			`$(t48_core_comp_pack) \`
295	151	arniml	`$(t8048_notri)`
296	218	arniml	`$(ANALYZE) $<`
297	151	arniml
298			`$(t48_system_comp_pack) : $(RTL_DIR)/system/t48_system_comp_pack-p.vhd`
299	218	arniml	`$(ANALYZE) $<`
300	151	arniml
301			`$(t8048) : $(RTL_DIR)/system/t8048.vhd \`
302			`$(t48_system_comp_pack)`
303	218	arniml	`$(ANALYZE) $<`
304	151	arniml
305			`$(t8048_struct_c0) : $(RTL_DIR)/system/t8048-c.vhd \`
306	232	arniml	`$(t8048_notri_struct_c0) \`
307	9	arniml	`$(t8048)`
308	218	arniml	`$(ANALYZE) $<`
309	9	arniml
310	154	arniml	`$(t8039_notri) : $(RTL_DIR)/system/t8039_notri.vhd \`
311			`$(t48_core_comp_pack)`
312	218	arniml	`$(ANALYZE) $<`
313	154	arniml
314			`$(t8039_notri_struct_c0) : $(RTL_DIR)/system/t8039_notri-c.vhd \`
315	232	arniml	`$(t48_core_struct_c0) \`
316			`$(generic_ram_ena_rtl_c0) \`
317	154	arniml	`$(t8039_notri)`
318	218	arniml	`$(ANALYZE) $<`
319	154	arniml
320	71	arniml	`$(t8039) : $(RTL_DIR)/system/t8039.vhd \`
321	198	arniml	`$(t48_system_comp_pack)`
322	218	arniml	`$(ANALYZE) $<`
323	71	arniml
324			`$(t8039_struct_c0) : $(RTL_DIR)/system/t8039-c.vhd \`
325	232	arniml	`$(t8039_notri_struct_c0) \`
326	71	arniml	`$(t8039)`
327	218	arniml	`$(ANALYZE) $<`
328	71	arniml
329	79	arniml	`$(if_timing) : $(BENCH_DIR)/if_timing.vhd`
330	218	arniml	`$(ANALYZE) $<`
331	79	arniml
332			`$(if_timing_behav_c0) : $(BENCH_DIR)/if_timing-c.vhd \`
333			`$(if_timing)`
334	218	arniml	`$(ANALYZE) $<`
335	79	arniml
336	232	arniml	`$(tb) : $(BENCH_DIR)/tb.vhd \`
337			`$(t48_tb_pack) \`
338	9	arniml	`$(t48_core_comp_pack)`
339	218	arniml	`$(ANALYZE) $<`
340	9	arniml
341	232	arniml	`$(tb_behav_c0) : $(BENCH_DIR)/tb-c.vhd \`
342			`$(if_timing_behav_c0) \`
343			`$(t48_core_struct_c0) \`
344			`$(generic_ram_ena_rtl_c0) \`
345			`$(lpm_rom) \`
346			`$(t48_tb_pack) \`
347			`$(t48_core_comp_pack) \`
348	9	arniml	`$(tb)`
349	218	arniml	`$(ANALYZE) $<`
350	9	arniml
351	71	arniml	`$(tb_t8039) : $(BENCH_DIR)/tb_t8039.vhd \`
352	232	arniml	`$(t48_tb_pack) \`
353	235	arniml	`$(t48_core_comp_pack) \`
354			`$(t48_system_comp_pack)`
355	218	arniml	`$(ANALYZE) $<`
356	71	arniml
357			`$(tb_t8039_behav_c0) : $(BENCH_DIR)/tb_t8039-c.vhd \`
358	232	arniml	`$(t8039_struct_c0) \`
359			`$(generic_ram_rtl_c0) \`
360			`$(lpm_rom) \`
361			`$(t48_tb_pack) \`
362	71	arniml	`$(tb_t8039)`
363	218	arniml	`$(ANALYZE) $<`
364	71	arniml
365	9	arniml	`$(tb_t8048) : $(BENCH_DIR)/tb_t8048.vhd \`
366	232	arniml	`$(t48_tb_pack) \`
367	235	arniml	`$(t48_core_comp_pack) \`
368			`$(t48_system_comp_pack)`
369	218	arniml	`$(ANALYZE) $<`
370	9	arniml
371			`$(tb_t8048_behav_c0) : $(BENCH_DIR)/tb_t8048-c.vhd \`
372	232	arniml	`$(t8048_struct_c0) \`
373			`$(generic_ram_ena_rtl_c0) \`
374	235	arniml	`$(lpm_rom) \`
375	232	arniml	`$(t48_tb_pack) \`
376	9	arniml	`$(tb_t8048)`
377	218	arniml	`$(ANALYZE) $<`
378	9	arniml
379			`$(timer) : $(RTL_DIR)/timer.vhd \`
380			`$(t48_pack)`
381	218	arniml	`$(ANALYZE) $<`
382	9	arniml
383			`$(timer_rtl_c0) : $(RTL_DIR)/timer-c.vhd \`
384	232	arniml	`$(timer-rtl) \`
385			`$(t48_pack) \`
386	9	arniml	`$(timer)`
387	218	arniml	`$(ANALYZE) $<`
388	259	arniml
389			`$(t8243_comp_pack) : $(T8243_DIR)/t8243_comp_pack-p.vhd`
390			`$(ANALYZE) $<`
391
392			`$(t8243_core) : $(T8243_DIR)/t8243_core.vhd`
393			`$(ANALYZE) $<`
394
395			`$(t8243_core_rtl_c0) : $(T8243_DIR)/t8243_core-c.vhd \`
396			`$(t8243_core)`
397			`$(ANALYZE) $<`
398
399			`$(t8243_sync_notri) : $(T8243_DIR)/t8243_sync_notri.vhd \`
400			`$(t8243_comp_pack)`
401			`$(ANALYZE) $<`
402
403			`$(t8243_sync_notri_struct_c0) : $(T8243_DIR)/t8243_sync_notri-c.vhd \`
404			`$(t8243_core_rtl_c0) \`
405			`$(t8243_sync_notri)`
406			`$(ANALYZE) $<`
407
408			`$(t8243_async_notri) : $(T8243_DIR)/t8243_async_notri.vhd \`
409			`$(t8243_comp_pack)`
410			`$(ANALYZE) $<`
411
412			`$(t8243_async_notri_struct_c0) : $(T8243_DIR)/t8243_async_notri-c.vhd \`
413			`$(t8243_core_rtl_c0) \`
414			`$(t8243_async_notri)`
415			`$(ANALYZE) $<`
416
417			`$(t8243) : $(T8243_DIR)/t8243.vhd \`
418			`$(t8243_comp_pack)`
419			`$(ANALYZE) $<`
420
421			`$(t8243_struct_c0) : $(T8243_DIR)/t8243-c.vhd \`
422			`$(t8243_async_notri_struct_c0) \`
423			`$(t8243)`
424			`$(ANALYZE) $<`
425
426			`$(tb_t8048_t8243) : $(BENCH_DIR)/tb_t8048_t8243.vhd \`
427			`$(t48_tb_pack) \`
428			`$(t48_core_comp_pack) \`
429			`$(t48_system_comp_pack) \`
430			`$(t8243_comp_pack)`
431			`$(ANALYZE) $<`
432
433			`$(tb_t8048_t8243_behav_c0) : $(BENCH_DIR)/tb_t8048_t8243-c.vhd \`
434			`$(t8048_struct_c0) \`
435			`$(t8243_struct_c0) \`
436			`$(generic_ram_ena_rtl_c0) \`
437			`$(lpm_rom) \`
438			`$(t48_tb_pack) \`
439			`$(tb_t8048_t8243)`
440			`$(ANALYZE) $<`
441
442			`$(tb_t8243) : $(BENCH_DIR)/tb_t8243.vhd \`
443			`$(t48_tb_pack) \`
444			`$(t48_core_comp_pack) \`
445			`$(t8243_comp_pack)`
446			`$(ANALYZE) $<`
447
448			`$(tb_t8243_behav_c0) : $(BENCH_DIR)/tb_t8243-c.vhd \`
449			`$(if_timing_behav_c0) \`
450			`$(t48_core_struct_c0) \`
451			`$(t8243_sync_notri_struct_c0) \`
452			`$(generic_ram_ena_rtl_c0) \`
453			`$(lpm_rom) \`
454			`$(t48_tb_pack) \`
455			`$(t48_core_comp_pack) \`
456			`$(tb_t8243)`
457			`$(ANALYZE) $<`

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[/] [t48/] [tags/] [rel_1_2/] [sim/] [rtl_sim/] [Makefile.hier] - Blame information for rev 259