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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
 
entity upi_stim is
 
  port (
    cs_n_o : out   std_logic;
    rd_n_o : out   std_logic;
    wr_n_o : out   std_logic;
    a0_o   : out   std_logic;
    db_b   : inout std_logic_vector(7 downto 0);
    p1_b   : inout std_logic_vector(7 downto 0);
    p2_b   : inout std_logic_vector(7 downto 0);
    fail_o : out   boolean
  );
 
end upi_stim;
 
 
architecture behav of upi_stim is
 
  subtype word_t is std_logic_vector(7 downto 0);
  alias dack_n    : std_logic is p2_b(7);
  alias drq       : std_logic is p2_b(6);
  alias int_ibf_n : std_logic is p2_b(5);
  alias int_obf   : std_logic is p2_b(4);
 
begin
 
  stim: process
 
    constant test_echo_c       : word_t := "00000001";
    constant test_status41_c   : word_t := "00000010";
    constant test_status41a_c  : word_t := "00000011";
    constant test_master_int_c : word_t := "00000100";
    constant test_dma_int_c    : word_t := "00000101";
 
    constant del_seq_c  : time :=   5 us;
    constant del_dat_c  : time :=  10 us;
    constant del_step_c : time :=  20 us;
 
    variable rdata : std_logic_vector(db_b'range);
 
    procedure write_dbbin(data : in word_t;
                          a0   : in std_logic) is
    begin
      cs_n_o <= '0';
      a0_o <= a0;
      wait for del_seq_c;
      wr_n_o <= '0';
      wait for del_seq_c;
      db_b <= data;
      wait for del_dat_c;
      wr_n_o <= '1';
      wait for del_seq_c;
      cs_n_o <= '1';
      wait for del_seq_c;
      db_b <= (others => 'Z');
      wait for del_step_c;
    end;
 
    procedure read_dbbout(a0 : in std_logic) is
    begin
      cs_n_o <= '0';
      a0_o <= a0;
      wait for del_seq_c;
      rd_n_o <= '0';
      wait for del_dat_c;
      rdata := db_b;
      rd_n_o <= '1';
      wait for del_seq_c;
      cs_n_o <= '1';
      wait for del_seq_c;
      wait for del_step_c;
    end;
 
    procedure read_dma is
    begin
      wait for del_seq_c;
      dack_n <= '0';
      wait for del_seq_c;
      rd_n_o <= '0';
      wait for del_dat_c;
      rdata := db_b;
      rd_n_o <= '1';
      wait for del_seq_c;
      dack_n <= '1';
      wait for del_seq_c;
      wait for del_step_c;
    end;
 
    procedure write_dma(data : in word_t) is
    begin
      wait for del_seq_c;
      dack_n <= '0';
      wait for del_seq_c;
      wr_n_o <= '0';
      wait for del_seq_c;
      db_b <= data;
      wait for del_dat_c;
      wr_n_o <= '1';
      wait for del_seq_c;
      dack_n <= '1';
      wait for del_seq_c;
      db_b <= (others => 'Z');
      wait for del_step_c;
    end;
 
    procedure poll_obf is
    begin
      -- poll for OBF
      rdata := (others => '0');
      while rdata(0) = '0' loop
        read_dbbout(a0 => '1');
      end loop;
    end;
 
    ---------------------------------------------------------------------------
    --
    procedure echo_test is
    begin
      -- write data
      write_dbbin(data => "01010101", a0 => '0');
 
      poll_obf;
 
      read_dbbout(a0 => '0');
      if rdata /= "10101010" then
        fail_o <= true;
      end if;
 
      -- send ok to dut
      write_dbbin(data => test_echo_c, a0 => '1');
    end;
 
    ---------------------------------------------------------------------------
    --
    procedure status41_test is
    begin
      -- test F1=0, F0=0, IBF=0, OBF=0
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "0000" then
        fail_o <= true;
      end if;
 
      -- Step 1:
      -- set IBF and F1, DUT software doesn't read data
      write_dbbin(data => test_status41_c, a0 => '1');
      -- test F1=1, F0=0, IBF=1, OBF=0
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "1010" then
        fail_o <= true;
      end if;
 
      -- Step 2:
      -- set IBF and clear F1, DUT software doesn't read data
      write_dbbin(data => test_status41_c, a0 => '0');
      -- test F1=0, F0=0, IBF=1, OBF=0
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "0010" then
        fail_o <= true;
      end if;
 
      -- Step 3:
      -- set IBF and set F1, DUT software reads data and sets F0
      write_dbbin(data => not test_status41_c, a0 => '1');
      -- test F1=1, F0=1, IBF=0, OBF=0
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "1100" then
        fail_o <= true;
      end if;
 
      -- Step 4:
      -- set IBF and clear F1, DUT software reads data and clears F0
      write_dbbin(data => not test_status41_c, a0 => '0');
      -- test F1=0, F0=0, IBF=0, OBF=0
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "0000" then
        fail_o <= true;
      end if;
 
      -- Step 5:
      -- set IBF and set F1, DUT software reads data and loads OBF with F0=1
      write_dbbin(data => test_status41_c, a0 => '1');
      -- test F1=1, F0=1, IBF=0, OBF=1
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "1101" then
        fail_o <= true;
      end if;
      -- read OBF, test for 099H
      read_dbbout(a0 => '0');
      if rdata /= "10011001" then
        fail_o <= true;
      end if;
      -- test F1=1, F0=1, IBF=0, OBF=0
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "1100" then
        fail_o <= true;
      end if;
 
      -- Step 6:
      -- set IBF and clear F1, DUT software reads data and loads OBF with F0=0
      -- and F1=1
      write_dbbin(data => test_status41_c, a0 => '0');
      -- test F1=1, F0=0, IBF=0, OBF=1
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "1001" then
        fail_o <= true;
      end if;
      -- read OBF; test for 066H
      read_dbbout(a0 => '0');
      if rdata /= "01100110" then
        fail_o <= true;
      end if;
      -- test F1=1, F0=0, IBF=0, OBF=0
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "1000" then
        fail_o <= true;
      end if;
 
      -- send ok to dut
      write_dbbin(data => test_status41_c, a0 => '1');
    end;
 
    ---------------------------------------------------------------------------
    --
    procedure status41a_test is
    begin
      -- test F1=0, F0=0, IBF=0, OBF=0
      read_dbbout(a0 => '1');
      if rdata(3 downto 0) /= "0000" then
        fail_o <= true;
      end if;
 
      -- Step 1:
      -- set IBF and F1, DUT software sets STS to A
      write_dbbin(data => test_status41a_c, a0 => '1');
      -- test STS=A, F1=1, F0=0, IBF=0, OBF=1
      read_dbbout(a0 => '1');
      if rdata /= "10101001" then
        fail_o <= true;
      end if;
      --
      read_dbbout(a0 => '0');
      if rdata /= "00000001" then
        fail_o <= true;
      end if;
 
      -- Step 2:
      -- set IBF and clear F1, DUT software sets STS to 5
      write_dbbin(data => not test_status41a_c, a0 => '0');
      -- test STS=5, F1=0, F0=0, IBF=0, OBF=1
      read_dbbout(a0 => '1');
      if rdata /= "01010001" then
        fail_o <= true;
      end if;
      --
      read_dbbout(a0 => '0');
      if rdata /= "00000010" then
        fail_o <= true;
      end if;
 
      -- Step 3:
      -- set IBF and set F1, DUT software sets STS to 0
      write_dbbin(data => test_status41a_c, a0 => '1');
      -- test STS=0, F1=1, F0=0, IBF=0, OBF=1
      read_dbbout(a0 => '1');
      if rdata /= "00001001" then
        fail_o <= true;
      end if;
      --
      read_dbbout(a0 => '0');
      if rdata /= "00000011" then
        fail_o <= true;
      end if;
 
      -- Step 4:
      -- set IBF and clear F1, DUT software sets STS to 0
      write_dbbin(data => not test_status41a_c, a0 => '0');
      -- test STS=0, F1=0, F0=0, IBF=0, OBF=1
      read_dbbout(a0 => '1');
      if rdata /= "00000001" then
        fail_o <= true;
      end if;
      --
      read_dbbout(a0 => '0');
      if rdata /= "00000100" then
        fail_o <= true;
      end if;
 
      -- send ok to dut
      write_dbbin(data => test_status41a_c, a0 => '1');
    end;
 
    ---------------------------------------------------------------------------
    --
    procedure master_int_test is
    begin
      -- check master interrupt lines are still high
      if int_ibf_n /= 'H' or int_obf /= 'H' then
        fail_o <= true;
      end if;
      -- acknowledge
      write_dbbin(data => not test_master_int_c, a0 => '0');
 
      while int_ibf_n = '0' loop
      end loop;
 
      -- test IBF=1, OBF=0
      if int_ibf_n /= 'H' or int_obf /= '0' then
        fail_o <= true;
      end if;
 
      -- send another byte
      write_dbbin(data => test_master_int_c, a0 => '1');
 
      while int_ibf_n = '0' loop
      end loop;
 
      -- test IBF=1, OBF=0
      if int_ibf_n /= 'H' or int_obf /= '0' then
        fail_o <= true;
      end if;
 
      -- send turnover byte
      write_dbbin(data => "10101010", a0 => '0');
 
      while int_obf = '0' loop
      end loop;
 
      -- test IBF=0, OBF=1
      if int_ibf_n /= '0' and int_obf /= 'H' then
        fail_o <= true;
      end if;
      --
      read_dbbout(a0 => '0');
      if rdata /= "01000000" then
        fail_o <= true;
      end if;
 
      while int_obf = '0' loop
      end loop;
 
      -- test IBF=0, OBF=1
      if int_ibf_n /= '0' and int_obf /= 'H' then
        fail_o <= true;
      end if;
      --
      read_dbbout(a0 => '0');
      if rdata /= "01010000" then
        fail_o <= true;
      end if;
 
      -- test IBF=0, OBF=1
      if int_ibf_n /= '0' and int_obf /= '0' then
        fail_o <= true;
      end if;
 
      -- send ok to dut
      write_dbbin(data => test_master_int_c, a0 => '1');
    end;
 
    ---------------------------------------------------------------------------
    --
    procedure dma_int_test is
    begin
      -- acknowledge
      write_dbbin(data => not test_dma_int_c, a0 => '0');
 
      -- test DRQ line low
      if drq /= '0' then
        fail_o <= true;
      end if;
 
      -- read 4 bytes with DMA
      for byte in 4 downto 1 loop
        -- wait for DRQ
        wait until rising_edge(drq);
 
        -- check status
        read_dbbout(a0 => '1');
        if rdata /= "00000001" then
          fail_o <= true;
        end if;
        -- check DRQ still active
        if drq /= 'H' then
          fail_o <= true;
        end if;
 
        -- finally read data
        read_dma;
        if unsigned(rdata) /= byte then
          fail_o <= true;
        end if;
 
        -- check status
        read_dbbout(a0 => '1');
        if rdata /= "00000000" then
          fail_o <= true;
        end if;
      end loop;
      --wait;
 
      -- write 4 bytes with DMA
      for byte in 4 downto 1 loop
        -- wait for DRQ
        wait until rising_edge(drq);
 
        -- check status
        read_dbbout(a0 => '1');
        if rdata /= "00000000" then
          fail_o <= true;
        end if;
        -- check DRQ still active
        if drq /= 'H' then
          fail_o <= true;
        end if;
 
        -- finally write data
        write_dma(data => std_logic_vector(to_unsigned(byte, word_t'length)));
      end loop;
 
      -- send ok to dut
      write_dbbin(data => test_dma_int_c, a0 => '1');
 
    end;
 
  begin
 
    fail_o <= false;
    cs_n_o <= '1';
    rd_n_o <= '1';
    wr_n_o <= '1';
    a0_o   <= '0';
    db_b   <= (others => 'Z');
    dack_n <= 'H';
 
    wait until falling_edge(p1_b(2));
    wait for 100 us;
 
    while true loop
      poll_obf;
 
      -- read and interpret request
      read_dbbout(a0 => '0');
 
      case rdata is
        when test_echo_c =>
          echo_test;
 
        when test_status41_c =>
          status41_test;
 
        when test_status41a_c =>
          status41a_test;
 
        when test_master_int_c =>
          master_int_test;
 
        when test_dma_int_c =>
          dma_int_test;
 
        when others =>
          null;
      end case;
 
    end loop;
 
 
    wait;
 
  end process stim;
 
end;

Line No.	Rev	Author	Line
1	306	arniml
2			`library ieee;`
3			`use ieee.std_logic_1164.all;`
4	319	arniml	`use ieee.numeric_std.all;`
5	306	arniml
6			`entity upi_stim is`
7
8			`port (`
9			`cs_n_o : out std_logic;`
10			`rd_n_o : out std_logic;`
11			`wr_n_o : out std_logic;`
12			`a0_o : out std_logic;`
13			`db_b : inout std_logic_vector(7 downto 0);`
14			`p1_b : inout std_logic_vector(7 downto 0);`
15			`p2_b : inout std_logic_vector(7 downto 0);`
16			`fail_o : out boolean`
17			`);`
18
19			`end upi_stim;`
20
21
22			`architecture behav of upi_stim is`
23
24	308	arniml	`subtype word_t is std_logic_vector(7 downto 0);`
25	319	arniml	`alias dack_n : std_logic is p2_b(7);`
26			`alias drq : std_logic is p2_b(6);`
27	313	arniml	`alias int_ibf_n : std_logic is p2_b(5);`
28			`alias int_obf : std_logic is p2_b(4);`
29	308	arniml
30	306	arniml	`begin`
31
32			`stim: process`
33
34	313	arniml	`constant test_echo_c : word_t := "00000001";`
35			`constant test_status41_c : word_t := "00000010";`
36			`constant test_status41a_c : word_t := "00000011";`
37			`constant test_master_int_c : word_t := "00000100";`
38	319	arniml	`constant test_dma_int_c : word_t := "00000101";`
39	308	arniml
40	306	arniml	`constant del_seq_c : time := 5 us;`
41			`constant del_dat_c : time := 10 us;`
42			`constant del_step_c : time := 20 us;`
43
44			`variable rdata : std_logic_vector(db_b'range);`
45
46	319	arniml	`procedure write_dbbin(data : in word_t;`
47	306	arniml	`a0 : in std_logic) is`
48			`begin`
49			`cs_n_o <= '0';`
50	324	arniml	`a0_o <= a0;`
51	306	arniml	`wait for del_seq_c;`
52			`wr_n_o <= '0';`
53			`wait for del_seq_c;`
54			`db_b <= data;`
55			`wait for del_dat_c;`
56			`wr_n_o <= '1';`
57			`wait for del_seq_c;`
58			`cs_n_o <= '1';`
59			`wait for del_seq_c;`
60			`db_b <= (others => 'Z');`
61			`wait for del_step_c;`
62			`end;`
63
64			`procedure read_dbbout(a0 : in std_logic) is`
65			`begin`
66			`cs_n_o <= '0';`
67	324	arniml	`a0_o <= a0;`
68	306	arniml	`wait for del_seq_c;`
69			`rd_n_o <= '0';`
70			`wait for del_dat_c;`
71			`rdata := db_b;`
72			`rd_n_o <= '1';`
73			`wait for del_seq_c;`
74			`cs_n_o <= '1';`
75			`wait for del_seq_c;`
76			`wait for del_step_c;`
77			`end;`
78
79	319	arniml	`procedure read_dma is`
80			`begin`
81			`wait for del_seq_c;`
82			`dack_n <= '0';`
83			`wait for del_seq_c;`
84			`rd_n_o <= '0';`
85			`wait for del_dat_c;`
86			`rdata := db_b;`
87			`rd_n_o <= '1';`
88			`wait for del_seq_c;`
89			`dack_n <= '1';`
90			`wait for del_seq_c;`
91			`wait for del_step_c;`
92			`end;`
93
94			`procedure write_dma(data : in word_t) is`
95			`begin`
96			`wait for del_seq_c;`
97			`dack_n <= '0';`
98			`wait for del_seq_c;`
99			`wr_n_o <= '0';`
100			`wait for del_seq_c;`
101			`db_b <= data;`
102			`wait for del_dat_c;`
103			`wr_n_o <= '1';`
104			`wait for del_seq_c;`
105			`dack_n <= '1';`
106			`wait for del_seq_c;`
107			`db_b <= (others => 'Z');`
108			`wait for del_step_c;`
109			`end;`
110
111	306	arniml	`procedure poll_obf is`
112			`begin`
113			`-- poll for OBF`
114			`rdata := (others => '0');`
115			`while rdata(0) = '0' loop`
116			`read_dbbout(a0 => '1');`
117			`end loop;`
118			`end;`
119
120	308	arniml	`---------------------------------------------------------------------------`
121			`--`
122	306	arniml	`procedure echo_test is`
123			`begin`
124			`-- write data`
125			`write_dbbin(data => "01010101", a0 => '0');`
126
127			`poll_obf;`
128
129			`read_dbbout(a0 => '0');`
130			`if rdata /= "10101010" then`
131			`fail_o <= true;`
132			`end if;`
133
134			`-- send ok to dut`
135	308	arniml	`write_dbbin(data => test_echo_c, a0 => '1');`
136	306	arniml	`end;`
137
138	308	arniml	`---------------------------------------------------------------------------`
139			`--`
140			`procedure status41_test is`
141	306	arniml	`begin`
142	308	arniml	`-- test F1=0, F0=0, IBF=0, OBF=0`
143			`read_dbbout(a0 => '1');`
144			`if rdata(3 downto 0) /= "0000" then`
145			`fail_o <= true;`
146			`end if;`
147
148			`-- Step 1:`
149			`-- set IBF and F1, DUT software doesn't read data`
150			`write_dbbin(data => test_status41_c, a0 => '1');`
151			`-- test F1=1, F0=0, IBF=1, OBF=0`
152			`read_dbbout(a0 => '1');`
153			`if rdata(3 downto 0) /= "1010" then`
154			`fail_o <= true;`
155			`end if;`
156
157			`-- Step 2:`
158			`-- set IBF and clear F1, DUT software doesn't read data`
159			`write_dbbin(data => test_status41_c, a0 => '0');`
160			`-- test F1=0, F0=0, IBF=1, OBF=0`
161			`read_dbbout(a0 => '1');`
162			`if rdata(3 downto 0) /= "0010" then`
163			`fail_o <= true;`
164			`end if;`
165
166			`-- Step 3:`
167			`-- set IBF and set F1, DUT software reads data and sets F0`
168			`write_dbbin(data => not test_status41_c, a0 => '1');`
169			`-- test F1=1, F0=1, IBF=0, OBF=0`
170			`read_dbbout(a0 => '1');`
171			`if rdata(3 downto 0) /= "1100" then`
172			`fail_o <= true;`
173			`end if;`
174
175			`-- Step 4:`
176			`-- set IBF and clear F1, DUT software reads data and clears F0`
177			`write_dbbin(data => not test_status41_c, a0 => '0');`
178			`-- test F1=0, F0=0, IBF=0, OBF=0`
179			`read_dbbout(a0 => '1');`
180			`if rdata(3 downto 0) /= "0000" then`
181			`fail_o <= true;`
182			`end if;`
183
184			`-- Step 5:`
185			`-- set IBF and set F1, DUT software reads data and loads OBF with F0=1`
186			`write_dbbin(data => test_status41_c, a0 => '1');`
187			`-- test F1=1, F0=1, IBF=0, OBF=1`
188			`read_dbbout(a0 => '1');`
189			`if rdata(3 downto 0) /= "1101" then`
190			`fail_o <= true;`
191			`end if;`
192			`-- read OBF, test for 099H`
193			`read_dbbout(a0 => '0');`
194			`if rdata /= "10011001" then`
195			`fail_o <= true;`
196			`end if;`
197			`-- test F1=1, F0=1, IBF=0, OBF=0`
198			`read_dbbout(a0 => '1');`
199			`if rdata(3 downto 0) /= "1100" then`
200			`fail_o <= true;`
201			`end if;`
202
203			`-- Step 6:`
204			`-- set IBF and clear F1, DUT software reads data and loads OBF with F0=0`
205			`-- and F1=1`
206			`write_dbbin(data => test_status41_c, a0 => '0');`
207			`-- test F1=1, F0=0, IBF=0, OBF=1`
208			`read_dbbout(a0 => '1');`
209			`if rdata(3 downto 0) /= "1001" then`
210			`fail_o <= true;`
211			`end if;`
212			`-- read OBF; test for 066H`
213			`read_dbbout(a0 => '0');`
214			`if rdata /= "01100110" then`
215			`fail_o <= true;`
216			`end if;`
217			`-- test F1=1, F0=0, IBF=0, OBF=0`
218			`read_dbbout(a0 => '1');`
219			`if rdata(3 downto 0) /= "1000" then`
220			`fail_o <= true;`
221			`end if;`
222
223			`-- send ok to dut`
224			`write_dbbin(data => test_status41_c, a0 => '1');`
225	306	arniml	`end;`
226
227	312	arniml	`---------------------------------------------------------------------------`
228			`--`
229			`procedure status41a_test is`
230			`begin`
231			`-- test F1=0, F0=0, IBF=0, OBF=0`
232			`read_dbbout(a0 => '1');`
233			`if rdata(3 downto 0) /= "0000" then`
234			`fail_o <= true;`
235			`end if;`
236
237			`-- Step 1:`
238			`-- set IBF and F1, DUT software sets STS to A`
239			`write_dbbin(data => test_status41a_c, a0 => '1');`
240			`-- test STS=A, F1=1, F0=0, IBF=0, OBF=1`
241			`read_dbbout(a0 => '1');`
242			`if rdata /= "10101001" then`
243			`fail_o <= true;`
244			`end if;`
245			`--`
246			`read_dbbout(a0 => '0');`
247			`if rdata /= "00000001" then`
248			`fail_o <= true;`
249			`end if;`
250
251			`-- Step 2:`
252			`-- set IBF and clear F1, DUT software sets STS to 5`
253			`write_dbbin(data => not test_status41a_c, a0 => '0');`
254			`-- test STS=5, F1=0, F0=0, IBF=0, OBF=1`
255			`read_dbbout(a0 => '1');`
256			`if rdata /= "01010001" then`
257			`fail_o <= true;`
258			`end if;`
259			`--`
260			`read_dbbout(a0 => '0');`
261			`if rdata /= "00000010" then`
262			`fail_o <= true;`
263			`end if;`
264
265			`-- Step 3:`
266			`-- set IBF and set F1, DUT software sets STS to 0`
267			`write_dbbin(data => test_status41a_c, a0 => '1');`
268			`-- test STS=0, F1=1, F0=0, IBF=0, OBF=1`
269			`read_dbbout(a0 => '1');`
270			`if rdata /= "00001001" then`
271			`fail_o <= true;`
272			`end if;`
273			`--`
274			`read_dbbout(a0 => '0');`
275			`if rdata /= "00000011" then`
276			`fail_o <= true;`
277			`end if;`
278
279			`-- Step 4:`
280			`-- set IBF and clear F1, DUT software sets STS to 0`
281			`write_dbbin(data => not test_status41a_c, a0 => '0');`
282			`-- test STS=0, F1=0, F0=0, IBF=0, OBF=1`
283			`read_dbbout(a0 => '1');`
284			`if rdata /= "00000001" then`
285			`fail_o <= true;`
286			`end if;`
287			`--`
288			`read_dbbout(a0 => '0');`
289			`if rdata /= "00000100" then`
290			`fail_o <= true;`
291			`end if;`
292
293			`-- send ok to dut`
294			`write_dbbin(data => test_status41a_c, a0 => '1');`
295			`end;`
296
297	313	arniml	`---------------------------------------------------------------------------`
298			`--`
299			`procedure master_int_test is`
300			`begin`
301	315	arniml	`-- check master interrupt lines are still high`
302			`if int_ibf_n /= 'H' or int_obf /= 'H' then`
303	313	arniml	`fail_o <= true;`
304			`end if;`
305			`-- acknowledge`
306			`write_dbbin(data => not test_master_int_c, a0 => '0');`
307
308			`while int_ibf_n = '0' loop`
309			`end loop;`
310
311			`-- test IBF=1, OBF=0`
312			`if int_ibf_n /= 'H' or int_obf /= '0' then`
313			`fail_o <= true;`
314			`end if;`
315
316			`-- send another byte`
317			`write_dbbin(data => test_master_int_c, a0 => '1');`
318
319			`while int_ibf_n = '0' loop`
320			`end loop;`
321
322			`-- test IBF=1, OBF=0`
323			`if int_ibf_n /= 'H' or int_obf /= '0' then`
324			`fail_o <= true;`
325			`end if;`
326
327			`-- send turnover byte`
328			`write_dbbin(data => "10101010", a0 => '0');`
329
330			`while int_obf = '0' loop`
331			`end loop;`
332
333			`-- test IBF=0, OBF=1`
334			`if int_ibf_n /= '0' and int_obf /= 'H' then`
335			`fail_o <= true;`
336			`end if;`
337			`--`
338			`read_dbbout(a0 => '0');`
339			`if rdata /= "01000000" then`
340			`fail_o <= true;`
341			`end if;`
342
343			`while int_obf = '0' loop`
344			`end loop;`
345
346			`-- test IBF=0, OBF=1`
347			`if int_ibf_n /= '0' and int_obf /= 'H' then`
348			`fail_o <= true;`
349			`end if;`
350			`--`
351			`read_dbbout(a0 => '0');`
352			`if rdata /= "01010000" then`
353			`fail_o <= true;`
354			`end if;`
355
356			`-- test IBF=0, OBF=1`
357			`if int_ibf_n /= '0' and int_obf /= '0' then`
358			`fail_o <= true;`
359			`end if;`
360
361			`-- send ok to dut`
362			`write_dbbin(data => test_master_int_c, a0 => '1');`
363			`end;`
364
365	319	arniml	`---------------------------------------------------------------------------`
366			`--`
367			`procedure dma_int_test is`
368			`begin`
369			`-- acknowledge`
370			`write_dbbin(data => not test_dma_int_c, a0 => '0');`
371
372			`-- test DRQ line low`
373			`if drq /= '0' then`
374			`fail_o <= true;`
375			`end if;`
376
377			`-- read 4 bytes with DMA`
378			`for byte in 4 downto 1 loop`
379			`-- wait for DRQ`
380			`wait until rising_edge(drq);`
381
382			`-- check status`
383			`read_dbbout(a0 => '1');`
384			`if rdata /= "00000001" then`
385			`fail_o <= true;`
386			`end if;`
387			`-- check DRQ still active`
388			`if drq /= 'H' then`
389			`fail_o <= true;`
390			`end if;`
391
392			`-- finally read data`
393			`read_dma;`
394			`if unsigned(rdata) /= byte then`
395			`fail_o <= true;`
396			`end if;`
397
398			`-- check status`
399			`read_dbbout(a0 => '1');`
400			`if rdata /= "00000000" then`
401			`fail_o <= true;`
402			`end if;`
403			`end loop;`
404			`--wait;`
405
406			`-- write 4 bytes with DMA`
407			`for byte in 4 downto 1 loop`
408			`-- wait for DRQ`
409			`wait until rising_edge(drq);`
410
411			`-- check status`
412			`read_dbbout(a0 => '1');`
413			`if rdata /= "00000000" then`
414			`fail_o <= true;`
415			`end if;`
416			`-- check DRQ still active`
417			`if drq /= 'H' then`
418			`fail_o <= true;`
419			`end if;`
420
421			`-- finally write data`
422			`write_dma(data => std_logic_vector(to_unsigned(byte, word_t'length)));`
423			`end loop;`
424
425			`-- send ok to dut`
426			`write_dbbin(data => test_dma_int_c, a0 => '1');`
427
428			`end;`
429
430	306	arniml	`begin`
431
432			`fail_o <= false;`
433			`cs_n_o <= '1';`
434			`rd_n_o <= '1';`
435			`wr_n_o <= '1';`
436			`a0_o <= '0';`
437			`db_b <= (others => 'Z');`
438	319	arniml	`dack_n <= 'H';`
439	306	arniml
440			`wait until falling_edge(p1_b(2));`
441			`wait for 100 us;`
442
443			`while true loop`
444			`poll_obf;`
445
446			`-- read and interpret request`
447			`read_dbbout(a0 => '0');`
448	308	arniml
449	306	arniml	`case rdata is`
450	308	arniml	`when test_echo_c =>`
451	306	arniml	`echo_test;`
452	308	arniml
453			`when test_status41_c =>`
454			`status41_test;`
455
456	312	arniml	`when test_status41a_c =>`
457			`status41a_test;`
458
459	313	arniml	`when test_master_int_c =>`
460			`master_int_test;`
461
462	319	arniml	`when test_dma_int_c =>`
463			`dma_int_test;`
464
465	306	arniml	`when others =>`
466			`null;`
467			`end case;`
468
469			`end loop;`
470
471
472			`wait;`
473
474			`end process stim;`
475
476			`end;`

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